DE69736969D1 - Verfahren zur Behandlung der Oberfläche von halbleitenden Substraten - Google Patents

Verfahren zur Behandlung der Oberfläche von halbleitenden Substraten

Info

Publication number
DE69736969D1
DE69736969D1 DE69736969T DE69736969T DE69736969D1 DE 69736969 D1 DE69736969 D1 DE 69736969D1 DE 69736969 T DE69736969 T DE 69736969T DE 69736969 T DE69736969 T DE 69736969T DE 69736969 D1 DE69736969 D1 DE 69736969D1
Authority
DE
Germany
Prior art keywords
treating
semiconductive substrates
hydrocarbon
substrate
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69736969T
Other languages
English (en)
Other versions
DE69736969T2 (de
Inventor
Jyoti Kiron Bhardwaj
Huma Ashraf
Babak Khamsehpour
Janet Hopkins
Martin Edward Ryan
David Mark Haynes
Alan Michael Hynes
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Surface Technology Systems Ltd
Original Assignee
Surface Technology Systems Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Surface Technology Systems Ltd filed Critical Surface Technology Systems Ltd
Publication of DE69736969D1 publication Critical patent/DE69736969D1/de
Application granted granted Critical
Publication of DE69736969T2 publication Critical patent/DE69736969T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H01L21/30655—Plasma etching; Reactive-ion etching comprising alternated and repeated etching and passivation steps, e.g. Bosch process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/3086—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/312—Organic layers, e.g. photoresist
DE69736969T 1996-08-01 1997-07-28 Verfahren zur Behandlung der Oberfläche von halbleitenden Substraten Expired - Lifetime DE69736969T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GBGB9616225.0A GB9616225D0 (en) 1996-08-01 1996-08-01 Method of surface treatment of semiconductor substrates
GB9616225 1996-08-01

Publications (2)

Publication Number Publication Date
DE69736969D1 true DE69736969D1 (de) 2007-01-04
DE69736969T2 DE69736969T2 (de) 2007-10-18

Family

ID=10797892

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69736969T Expired - Lifetime DE69736969T2 (de) 1996-08-01 1997-07-28 Verfahren zur Behandlung der Oberfläche von halbleitenden Substraten

Country Status (6)

Country Link
US (1) US6261962B1 (de)
EP (1) EP0822584B1 (de)
JP (1) JP4237281B2 (de)
AT (1) ATE346379T1 (de)
DE (1) DE69736969T2 (de)
GB (1) GB9616225D0 (de)

Families Citing this family (89)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6969635B2 (en) 2000-12-07 2005-11-29 Reflectivity, Inc. Methods for depositing, releasing and packaging micro-electromechanical devices on wafer substrates
US6849471B2 (en) 2003-03-28 2005-02-01 Reflectivity, Inc. Barrier layers for microelectromechanical systems
GB9709659D0 (en) 1997-05-13 1997-07-02 Surface Tech Sys Ltd Method and apparatus for etching a workpiece
JP4475548B2 (ja) * 1998-03-20 2010-06-09 サーフィス テクノロジー システムズ ピーエルシー ミクロメカニカルデバイスを製造する方法と装置
ATE458261T1 (de) 1998-12-11 2010-03-15 Surface Technology Systems Plc Plasmabehandlungsgerät
JP4865948B2 (ja) * 1999-04-14 2012-02-01 サーフィス テクノロジー システムズ ピーエルシー プラズマを安定させる方法と装置
DE60041341D1 (de) * 1999-08-17 2009-02-26 Tokyo Electron Ltd Gepulstes plasmabehandlungsverfahren und vorrichtung
US6949202B1 (en) 1999-10-26 2005-09-27 Reflectivity, Inc Apparatus and method for flow of process gas in an ultra-clean environment
US6942811B2 (en) 1999-10-26 2005-09-13 Reflectivity, Inc Method for achieving improved selectivity in an etching process
US7041224B2 (en) 1999-10-26 2006-05-09 Reflectivity, Inc. Method for vapor phase etching of silicon
US6960305B2 (en) 1999-10-26 2005-11-01 Reflectivity, Inc Methods for forming and releasing microelectromechanical structures
US6290864B1 (en) 1999-10-26 2001-09-18 Reflectivity, Inc. Fluoride gas etching of silicon with improved selectivity
US7019376B2 (en) 2000-08-11 2006-03-28 Reflectivity, Inc Micromirror array device with a small pitch size
US6451673B1 (en) * 2001-02-15 2002-09-17 Advanced Micro Devices, Inc. Carrier gas modification for preservation of mask layer during plasma etching
US6812152B2 (en) * 2001-08-09 2004-11-02 Comlase Ab Method to obtain contamination free laser mirrors and passivation of these
US7189332B2 (en) 2001-09-17 2007-03-13 Texas Instruments Incorporated Apparatus and method for detecting an endpoint in a vapor phase etch
US7115516B2 (en) * 2001-10-09 2006-10-03 Applied Materials, Inc. Method of depositing a material layer
US6965468B2 (en) 2003-07-03 2005-11-15 Reflectivity, Inc Micromirror array having reduced gap between adjacent micromirrors of the micromirror array
US7027200B2 (en) 2002-03-22 2006-04-11 Reflectivity, Inc Etching method used in fabrications of microstructures
DE60218643D1 (de) * 2002-06-28 2007-04-19 St Microelectronics Srl Herstellungsverfahren für Gräben mit schrägem Profil und gerundeten Oberkanten
US7074723B2 (en) * 2002-08-02 2006-07-11 Applied Materials, Inc. Method of plasma etching a deeply recessed feature in a substrate using a plasma source gas modulated etchant system
US6924235B2 (en) * 2002-08-16 2005-08-02 Unaxis Usa Inc. Sidewall smoothing in high aspect ratio/deep etching using a discrete gas switching method
CA2498320A1 (en) 2002-09-20 2004-04-01 Integrated Dna Technologies, Inc. Anthraquinone quencher dyes, their methods of preparation and use
US7169695B2 (en) * 2002-10-11 2007-01-30 Lam Research Corporation Method for forming a dual damascene structure
US6833325B2 (en) * 2002-10-11 2004-12-21 Lam Research Corporation Method for plasma etching performance enhancement
US7977390B2 (en) 2002-10-11 2011-07-12 Lam Research Corporation Method for plasma etching performance enhancement
DE10247913A1 (de) 2002-10-14 2004-04-22 Robert Bosch Gmbh Plasmaanlage und Verfahren zum anisotropen Einätzen von Strukturen in ein Substrat
US20040097077A1 (en) * 2002-11-15 2004-05-20 Applied Materials, Inc. Method and apparatus for etching a deep trench
US6913942B2 (en) 2003-03-28 2005-07-05 Reflectvity, Inc Sacrificial layers for use in fabrications of microelectromechanical devices
US6916746B1 (en) * 2003-04-09 2005-07-12 Lam Research Corporation Method for plasma etching using periodic modulation of gas chemistry
US7294580B2 (en) * 2003-04-09 2007-11-13 Lam Research Corporation Method for plasma stripping using periodic modulation of gas chemistry and hydrocarbon addition
US7192531B1 (en) 2003-06-24 2007-03-20 Lam Research Corporation In-situ plug fill
US6980347B2 (en) 2003-07-03 2005-12-27 Reflectivity, Inc Micromirror having reduced space between hinge and mirror plate of the micromirror
DE10333995B4 (de) * 2003-07-25 2018-10-25 Robert Bosch Gmbh Verfahren zum Ätzen eines Halbleitermaterials
US7250371B2 (en) * 2003-08-26 2007-07-31 Lam Research Corporation Reduction of feature critical dimensions
US7645704B2 (en) 2003-09-17 2010-01-12 Texas Instruments Incorporated Methods and apparatus of etch process control in fabrications of microstructures
US7196017B2 (en) * 2003-10-24 2007-03-27 Avago Technologies Fiber Ip (Singapore) Pte. Ltd. Method for etching smooth sidewalls in III-V based compounds for electro-optical devices
JP3882806B2 (ja) * 2003-10-29 2007-02-21 ソニー株式会社 エッチング方法
US7041226B2 (en) * 2003-11-04 2006-05-09 Lexmark International, Inc. Methods for improving flow through fluidic channels
JP2005150332A (ja) * 2003-11-14 2005-06-09 Sony Corp エッチング方法
US20070212888A1 (en) * 2004-03-29 2007-09-13 Sumitomo Precision Products Co., Ltd. Silicon Substrate Etching Method
US20060011578A1 (en) * 2004-07-16 2006-01-19 Lam Research Corporation Low-k dielectric etch
JP4578887B2 (ja) * 2004-08-11 2010-11-10 住友精密工業株式会社 エッチング方法及びエッチング装置
DE102004043357B4 (de) * 2004-09-08 2015-10-22 Robert Bosch Gmbh Verfahren zur Herstellung eines mikromechanischen Sensorelements
JP4666575B2 (ja) * 2004-11-08 2011-04-06 東京エレクトロン株式会社 セラミック溶射部材の製造方法、該方法を実行するためのプログラム、記憶媒体、及びセラミック溶射部材
US7202178B2 (en) * 2004-12-01 2007-04-10 Lexmark International, Inc. Micro-fluid ejection head containing reentrant fluid feed slots
US20060134917A1 (en) * 2004-12-16 2006-06-22 Lam Research Corporation Reduction of etch mask feature critical dimensions
US7459100B2 (en) * 2004-12-22 2008-12-02 Lam Research Corporation Methods and apparatus for sequentially alternating among plasma processes in order to optimize a substrate
US7241683B2 (en) * 2005-03-08 2007-07-10 Lam Research Corporation Stabilized photoresist structure for etching process
US7491647B2 (en) * 2005-03-08 2009-02-17 Lam Research Corporation Etch with striation control
FR2887073B1 (fr) * 2005-06-14 2007-08-10 Alcatel Sa Procede de pilotage de la pression dans une chambre de procede
JP4512533B2 (ja) * 2005-07-27 2010-07-28 住友精密工業株式会社 エッチング方法及びエッチング装置
US7273815B2 (en) * 2005-08-18 2007-09-25 Lam Research Corporation Etch features with reduced line edge roughness
US20090130436A1 (en) * 2005-08-22 2009-05-21 Yoshio Harada Spray coating member having excellent heat emmision property and so on and method for producing the same
JP4555865B2 (ja) 2005-08-22 2010-10-06 トーカロ株式会社 耐損傷性等に優れる溶射皮膜被覆部材およびその製造方法
JP4571561B2 (ja) 2005-09-08 2010-10-27 トーカロ株式会社 耐プラズマエロージョン性に優れる溶射皮膜被覆部材およびその製造方法
EP1804281B1 (de) * 2005-12-28 2011-12-14 STMicroelectronics Srl Verfahren zum Ätzen eines tiefen Grabens in einem halbleitenden Gegenstand, und halbleitender Gegenstand so hergestellt.
US7910489B2 (en) * 2006-02-17 2011-03-22 Lam Research Corporation Infinitely selective photoresist mask etch
JP4643478B2 (ja) * 2006-03-20 2011-03-02 トーカロ株式会社 半導体加工装置用セラミック被覆部材の製造方法
JP4996868B2 (ja) * 2006-03-20 2012-08-08 東京エレクトロン株式会社 プラズマ処理装置およびプラズマ処理方法
US7648782B2 (en) 2006-03-20 2010-01-19 Tokyo Electron Limited Ceramic coating member for semiconductor processing apparatus
US7850864B2 (en) 2006-03-20 2010-12-14 Tokyo Electron Limited Plasma treating apparatus and plasma treating method
US7309646B1 (en) 2006-10-10 2007-12-18 Lam Research Corporation De-fluoridation process
JP2008205436A (ja) * 2007-01-26 2008-09-04 Toshiba Corp 微細構造体の製造方法
JP4769737B2 (ja) * 2007-01-30 2011-09-07 住友精密工業株式会社 エッチング方法及びエッチング装置
US20080239428A1 (en) * 2007-04-02 2008-10-02 Inphase Technologies, Inc. Non-ft plane angular filters
US9123509B2 (en) 2007-06-29 2015-09-01 Varian Semiconductor Equipment Associates, Inc. Techniques for plasma processing a substrate
US20090004836A1 (en) * 2007-06-29 2009-01-01 Varian Semiconductor Equipment Associates, Inc. Plasma doping with enhanced charge neutralization
US7846846B2 (en) * 2007-09-25 2010-12-07 Applied Materials, Inc. Method of preventing etch profile bending and bowing in high aspect ratio openings by treating a polymer formed on the opening sidewalls
JP5172417B2 (ja) * 2008-03-27 2013-03-27 Ｓｐｐテクノロジーズ株式会社 シリコン構造体の製造方法及びその製造装置並びにその製造プログラム
KR101795658B1 (ko) * 2009-01-31 2017-11-08 어플라이드 머티어리얼스, 인코포레이티드 에칭을 위한 방법 및 장치
US8133349B1 (en) 2010-11-03 2012-03-13 Lam Research Corporation Rapid and uniform gas switching for a plasma etch process
US8304262B2 (en) * 2011-02-17 2012-11-06 Lam Research Corporation Wiggling control for pseudo-hardmask
US8609548B2 (en) 2011-06-06 2013-12-17 Lam Research Corporation Method for providing high etch rate
US8440473B2 (en) 2011-06-06 2013-05-14 Lam Research Corporation Use of spectrum to synchronize RF switching with gas switching during etch
JP5792613B2 (ja) * 2011-12-28 2015-10-14 株式会社日立ハイテクノロジーズ プラズマエッチング方法
GB2499816A (en) * 2012-02-29 2013-09-04 Oxford Instr Nanotechnology Tools Ltd Controlling deposition and etching in a chamber with fine time control of parameters and gas flow
DE102013100035B4 (de) * 2012-05-24 2019-10-24 Universität Kassel Ätzverfahren für III-V Halbleitermaterialien
JP6128972B2 (ja) * 2013-06-06 2017-05-17 キヤノン株式会社 液体吐出ヘッド用基板の製造方法
US8883648B1 (en) * 2013-09-09 2014-11-11 United Microelectronics Corp. Manufacturing method of semiconductor structure
US9401263B2 (en) * 2013-09-19 2016-07-26 Globalfoundries Inc. Feature etching using varying supply of power pulses
CN103730411B (zh) * 2013-11-15 2017-01-25 中微半导体设备(上海)有限公司 一种深硅通孔刻蚀方法
CN103745945B (zh) * 2013-11-15 2017-02-15 中微半导体设备(上海)有限公司 一种深硅通孔刻蚀装置及其刻蚀方法
CN105679700B (zh) * 2014-11-21 2019-08-23 北京北方华创微电子装备有限公司 硅深孔刻蚀方法
JP2017079273A (ja) * 2015-10-21 2017-04-27 パナソニックＩｐマネジメント株式会社 プラズマ処理方法
KR20180134182A (ko) * 2017-06-08 2018-12-18 삼성전자주식회사 플라즈마 처리 장치
US10903109B2 (en) 2017-12-29 2021-01-26 Micron Technology, Inc. Methods of forming high aspect ratio openings and methods of forming high aspect ratio features
KR20200100555A (ko) * 2019-02-18 2020-08-26 도쿄엘렉트론가부시키가이샤 에칭 방법
US20210391181A1 (en) * 2020-06-15 2021-12-16 Tokyo Electron Limited Forming a semiconductor device using a protective layer

Family Cites Families (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3174468D1 (en) 1980-09-17 1986-05-28 Hitachi Ltd Semiconductor device and method of manufacturing the same
JPS58147032A (ja) * 1982-02-24 1983-09-01 Toshiba Corp 半導体装置の製造方法
US4599135A (en) 1983-09-30 1986-07-08 Hitachi, Ltd. Thin film deposition
US4533430A (en) 1984-01-04 1985-08-06 Advanced Micro Devices, Inc. Process for forming slots having near vertical sidewalls at their upper extremities
US4512841A (en) 1984-04-02 1985-04-23 International Business Machines Corporation RF Coupling techniques
US4784720A (en) 1985-05-03 1988-11-15 Texas Instruments Incorporated Trench etch process for a single-wafer RIE dry etch reactor
US4855017A (en) * 1985-05-03 1989-08-08 Texas Instruments Incorporated Trench etch process for a single-wafer RIE dry etch reactor
DE3682195D1 (de) 1985-09-27 1991-11-28 Unisys Corp Verfahren zur herstellung einer konischen kontaktoeffnung in polyimid.
JPS62136066A (ja) 1985-12-09 1987-06-19 Mitsubishi Electric Corp 半導体装置の製造方法
EP0246514A3 (de) 1986-05-16 1989-09-20 Air Products And Chemicals, Inc. Ätzung tiefer Nuten in monokristallinen Silizium
KR900007687B1 (ko) * 1986-10-17 1990-10-18 가부시기가이샤 히다찌세이사꾸쇼 플라즈마처리방법 및 장치
US4707218A (en) 1986-10-28 1987-11-17 International Business Machines Corporation Lithographic image size reduction
FR2615655B1 (fr) * 1987-05-21 1989-06-30 Loic Henry Procede de gravure anisotrope d'un materiau iii-v : application au traitement de surface en vue d'une croissance epitaxiale
NL8701867A (nl) 1987-08-07 1989-03-01 Cobrain Nv Werkwijze voor het behandelen, in het bijzonder droog etsen van een substraat en etsinrichting.
US5007982A (en) 1988-07-11 1991-04-16 North American Philips Corporation Reactive ion etching of silicon with hydrogen bromide
JP2772643B2 (ja) * 1988-08-26 1998-07-02 株式会社半導体エネルギー研究所 被膜作製方法
JP2918892B2 (ja) 1988-10-14 1999-07-12 株式会社日立製作所 プラズマエッチング処理方法
IT1225636B (it) 1988-12-15 1990-11-22 Sgs Thomson Microelectronics Metodo di scavo con profilo di fondo arrotondato per strutture di isolamento incassate nel silicio
FR2640809B1 (fr) * 1988-12-19 1993-10-22 Chouan Yannick Procede de gravure d'une couche d'oxyde metallique et depot simultane d'un film de polymere, application de ce procede a la fabrication d'un transistor
KR900013595A (ko) 1989-02-15 1990-09-06 미다 가쓰시게 플라즈마 에칭방법 및 장치
JPH03126222A (ja) 1989-10-12 1991-05-29 Canon Inc 堆積膜形成方法
JPH03129820A (ja) 1989-10-16 1991-06-03 Seiko Epson Corp 半導体製造装置及び半導体装置の製造方法
KR910010516A (ko) 1989-11-15 1991-06-29 아오이 죠이치 반도체 메모리장치
US5474650A (en) 1991-04-04 1995-12-12 Hitachi, Ltd. Method and apparatus for dry etching
JP2913936B2 (ja) 1991-10-08 1999-06-28 日本電気株式会社 半導体装置の製造方法
JP3129820B2 (ja) 1992-03-04 2001-01-31 シスメックス株式会社 粒子検出装置
US5368685A (en) * 1992-03-24 1994-11-29 Hitachi, Ltd. Dry etching apparatus and method
JP2661455B2 (ja) 1992-03-27 1997-10-08 株式会社日立製作所 真空処理装置
JP3126222B2 (ja) 1992-05-18 2001-01-22 株式会社たつみや漆器 合成樹脂製食品容器
JPH0612767A (ja) 1992-06-25 1994-01-21 Victor Co Of Japan Ltd 自動再生装置
DE4241045C1 (de) * 1992-12-05 1994-05-26 Bosch Gmbh Robert Verfahren zum anisotropen Ätzen von Silicium
US5478437A (en) * 1994-08-01 1995-12-26 Motorola, Inc. Selective processing using a hydrocarbon and hydrogen
US5605600A (en) 1995-03-13 1997-02-25 International Business Machines Corporation Etch profile shaping through wafer temperature control
ATE251341T1 (de) * 1996-08-01 2003-10-15 Surface Technology Systems Plc Verfahren zur ätzung von substraten

Also Published As

Publication number Publication date
JPH10144654A (ja) 1998-05-29
EP0822584A2 (de) 1998-02-04
GB9616225D0 (en) 1996-09-11
EP0822584A3 (de) 1998-05-13
US6261962B1 (en) 2001-07-17
EP0822584B1 (de) 2006-11-22
JP4237281B2 (ja) 2009-03-11
DE69736969T2 (de) 2007-10-18
ATE346379T1 (de) 2006-12-15

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