DE69632567D1 - MOS-Transistor und Verfahren zur Herstellung desselben - Google Patents

MOS-Transistor und Verfahren zur Herstellung desselben

Info

Publication number
DE69632567D1
DE69632567D1 DE69632567T DE69632567T DE69632567D1 DE 69632567 D1 DE69632567 D1 DE 69632567D1 DE 69632567 T DE69632567 T DE 69632567T DE 69632567 T DE69632567 T DE 69632567T DE 69632567 D1 DE69632567 D1 DE 69632567D1
Authority
DE
Germany
Prior art keywords
manufacturing
same
mos transistor
mos
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69632567T
Other languages
English (en)
Other versions
DE69632567T2 (de
Inventor
Katsuji Iguchi
Kenichi Azuma
Akio Kawamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Publication of DE69632567D1 publication Critical patent/DE69632567D1/de
Application granted granted Critical
Publication of DE69632567T2 publication Critical patent/DE69632567T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26586Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28114Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor characterised by the sectional shape, e.g. T, inverted-T
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28123Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS
    • H01L21/823814Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS
    • H01L21/823828Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
    • H01L21/82385Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes gate conductors with different shapes, lengths or dimensions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42372Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
    • H01L29/42376Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the length or the sectional shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66553Unipolar field-effect transistors with an insulated gate, i.e. MISFET using inside spacers, permanent or not
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66575Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
    • H01L29/66583Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with initial gate mask or masking layer complementary to the prospective gate location, e.g. with dummy source and drain contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66537Unipolar field-effect transistors with an insulated gate, i.e. MISFET using a self aligned punch through stopper or threshold implant under the gate region
DE69632567T 1995-12-01 1996-08-15 MOS-Transistor und Verfahren zur Herstellung desselben Expired - Lifetime DE69632567T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP31444695A JP3239202B2 (ja) 1995-12-01 1995-12-01 Mosトランジスタ及びその製造方法
JP31444695 1995-12-01

Publications (2)

Publication Number Publication Date
DE69632567D1 true DE69632567D1 (de) 2004-07-01
DE69632567T2 DE69632567T2 (de) 2005-06-02

Family

ID=18053462

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69632567T Expired - Lifetime DE69632567T2 (de) 1995-12-01 1996-08-15 MOS-Transistor und Verfahren zur Herstellung desselben

Country Status (6)

Country Link
US (1) US5734185A (de)
EP (1) EP0777269B1 (de)
JP (1) JP3239202B2 (de)
KR (1) KR100221063B1 (de)
DE (1) DE69632567T2 (de)
TW (1) TW319900B (de)

Families Citing this family (47)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100206876B1 (ko) * 1995-12-28 1999-07-01 구본준 모스전계효과트랜지스터 제조방법
US6037627A (en) * 1996-08-02 2000-03-14 Seiko Instruments Inc. MOS semiconductor device
US6297111B1 (en) * 1997-08-20 2001-10-02 Advanced Micro Devices Self-aligned channel transistor and method for making same
DE19742397C2 (de) * 1997-09-25 2000-07-06 Siemens Ag Verfahren zur Herstellung einer Halbleiterstruktur mit einer Mehrzahl von Gräben
US6060733A (en) * 1997-12-18 2000-05-09 Advanced Micro Devices, Inc. Formation of lightly doped regions under a gate having a reduced gate oxide
US6127235A (en) 1998-01-05 2000-10-03 Advanced Micro Devices Method for making asymmetrical gate oxide thickness in channel MOSFET region
DE19837395C2 (de) * 1998-08-18 2001-07-19 Infineon Technologies Ag Verfahren zur Herstellung eines eine strukturierte Isolationsschicht enthaltenden Halbleiterbauelements
US6107667A (en) * 1998-09-10 2000-08-22 Advanced Micro Devices, Inc. MOS transistor with low-k spacer to suppress capacitive coupling between gate and source/drain extensions
US6117739A (en) * 1998-10-02 2000-09-12 Advanced Micro Devices, Inc. Semiconductor device with layered doped regions and methods of manufacture
US6018179A (en) * 1998-11-05 2000-01-25 Advanced Micro Devices Transistors having a scaled channel length and integrated spacers with enhanced silicidation properties
US6531713B1 (en) * 1999-03-19 2003-03-11 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and manufacturing method thereof
TW444257B (en) 1999-04-12 2001-07-01 Semiconductor Energy Lab Semiconductor device and method for fabricating the same
TW497210B (en) * 1999-05-11 2002-08-01 Mosel Vitelic Inc Self-aligned contact via process
US6184116B1 (en) 2000-01-11 2001-02-06 Taiwan Semiconductor Manufacturing Company Method to fabricate the MOS gate
US6433371B1 (en) 2000-01-29 2002-08-13 Advanced Micro Devices, Inc. Controlled gate length and gate profile semiconductor device
US20020113268A1 (en) * 2000-02-01 2002-08-22 Jun Koyama Nonvolatile memory, semiconductor device and method of manufacturing the same
KR100359773B1 (ko) * 2000-05-01 2002-11-07 주식회사 하이닉스반도체 반도체 소자 제조방법
JP2002164442A (ja) * 2000-11-28 2002-06-07 Hitachi Ltd 半導体装置およびその製造方法
JP2002198443A (ja) * 2000-12-26 2002-07-12 Nec Corp 半導体装置及びその製造方法
JP2002299611A (ja) * 2001-03-30 2002-10-11 Fujitsu Ltd ゲート電極を有する半導体素子の特性の計算方法及びプログラム
KR100761547B1 (ko) * 2001-06-22 2007-09-27 매그나칩 반도체 유한회사 트랜지스터 및 그의 제조 방법
US7002208B2 (en) 2001-07-02 2006-02-21 Oki Electric Industry Co., Ltd. Semiconductor device and manufacturing method of the same
US6534822B1 (en) * 2001-07-17 2003-03-18 Advanced Micro Devices, Inc. Silicon on insulator field effect transistor with a double Schottky gate structure
JP2003060073A (ja) * 2001-08-10 2003-02-28 Mitsubishi Electric Corp 半導体装置およびその製造方法
US20040018738A1 (en) * 2002-07-22 2004-01-29 Wei Liu Method for fabricating a notch gate structure of a field effect transistor
US6740535B2 (en) * 2002-07-29 2004-05-25 International Business Machines Corporation Enhanced T-gate structure for modulation doped field effect transistors
US20040121524A1 (en) * 2002-12-20 2004-06-24 Micron Technology, Inc. Apparatus and method for controlling diffusion
JP4793840B2 (ja) * 2003-11-10 2011-10-12 オンセミコンダクター・トレーディング・リミテッド 半導体装置の製造方法
US6885072B1 (en) * 2003-11-18 2005-04-26 Applied Intellectual Properties Co., Ltd. Nonvolatile memory with undercut trapping structure
KR101044380B1 (ko) * 2004-01-08 2011-06-29 매그나칩 반도체 유한회사 반도체 소자의 제조방법
KR100598033B1 (ko) * 2004-02-03 2006-07-07 삼성전자주식회사 반도체 소자의 듀얼 게이트 산화막 형성 방법
US7638400B2 (en) * 2004-04-07 2009-12-29 United Microelectronics Corp. Method for fabricating semiconductor device
US6975000B2 (en) * 2004-04-08 2005-12-13 Taiwan Semiconductor Manufacturing Company Method of forming a recessed buried-diffusion device
KR100613371B1 (ko) * 2004-04-23 2006-08-17 동부일렉트로닉스 주식회사 반도체 소자 및 그 제조방법
US7294882B2 (en) * 2004-09-28 2007-11-13 Sandisk Corporation Non-volatile memory with asymmetrical doping profile
US7674697B2 (en) * 2005-07-06 2010-03-09 International Business Machines Corporation MOSFET with multiple fully silicided gate and method for making the same
JP4667279B2 (ja) * 2006-03-14 2011-04-06 Okiセミコンダクタ株式会社 半導体装置の製造方法
JP5630939B2 (ja) * 2007-07-11 2014-11-26 ピーエスフォー ルクスコ エスエイアールエルPS4 Luxco S.a.r.l. 半導体装置及びその製造方法
TWI471915B (zh) * 2009-07-10 2015-02-01 United Microelectronics Corp 閘極結構及其製作方法
US8513712B2 (en) 2009-09-28 2013-08-20 Taiwan Semiconductor Manufacturing Company, Ltd. Method and apparatus for forming a semiconductor gate
JP5267497B2 (ja) * 2010-04-05 2013-08-21 ソニー株式会社 固体撮像装置
US8541296B2 (en) * 2011-09-01 2013-09-24 The Institute of Microelectronics Chinese Academy of Science Method of manufacturing dummy gates in gate last process
US9029956B2 (en) 2011-10-26 2015-05-12 Global Foundries, Inc. SRAM cell with individual electrical device threshold control
US9048136B2 (en) 2011-10-26 2015-06-02 GlobalFoundries, Inc. SRAM cell with individual electrical device threshold control
JP6094159B2 (ja) * 2012-11-13 2017-03-15 三菱電機株式会社 半導体装置の製造方法
US9893060B2 (en) * 2015-12-17 2018-02-13 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and manufacturing method thereof
US10515969B2 (en) 2016-11-17 2019-12-24 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and manufacturing method thereof

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6336564A (ja) * 1986-07-31 1988-02-17 Nec Corp 半導体装置の製造方法
JPS6430270A (en) * 1987-07-24 1989-02-01 Fujitsu Ltd Manufacture of insulated-gate semiconductor device
JPH07120705B2 (ja) * 1987-11-17 1995-12-20 三菱電機株式会社 素子間分離領域を有する半導体装置の製造方法
US5102816A (en) * 1990-03-27 1992-04-07 Sematech, Inc. Staircase sidewall spacer for improved source/drain architecture
US5270234A (en) * 1992-10-30 1993-12-14 International Business Machines Corporation Deep submicron transistor fabrication method
JP3203845B2 (ja) * 1992-12-22 2001-08-27 ソニー株式会社 ゲート電極の形成方法
US5342803A (en) * 1993-02-03 1994-08-30 Rohm, Co., Ltd. Method for isolating circuit elements for semiconductor device
DE4415137C1 (de) * 1994-04-29 1995-07-20 Gold Star Electronics Halbleiter-Bauelement und Verfahren zu dessen Herstellung

Also Published As

Publication number Publication date
JPH09153612A (ja) 1997-06-10
KR100221063B1 (ko) 1999-09-15
KR970054487A (ko) 1997-07-31
EP0777269A3 (de) 1999-02-03
US5734185A (en) 1998-03-31
EP0777269B1 (de) 2004-05-26
DE69632567T2 (de) 2005-06-02
JP3239202B2 (ja) 2001-12-17
EP0777269A2 (de) 1997-06-04
TW319900B (de) 1997-11-11

Similar Documents

Publication Publication Date Title
DE69632567D1 (de) MOS-Transistor und Verfahren zur Herstellung desselben
DE69630944D1 (de) Hochspannungsfester MOS-Transistor und Verfahren zur Herstellung
DE69715802T2 (de) Quantentopf-mos-transistor und verfahren zur herstellung
DE69842110D1 (de) MOS-Feldeffekttransistor und Verfahren zur Herstellung
DE69413860D1 (de) Transistoren und Verfahren zur Herstellung
DE69622295T2 (de) MIS-Anordnung und Verfahren zur Herstellung
DE19781457T1 (de) Thermoelektrisches Element und Verfahren zur Herstellung desselben
DE69515189D1 (de) SOI-Substrat und Verfahren zur Herstellung
DE69739763D1 (de) Halbleiteranordnung und Verfahren zur Herstellung
DE69530232D1 (de) Halbleiteranordnung mit isoliertem Gate und Verfahren zur Herstellung derselben
DE69837030D1 (de) Silizium-germanium-halbleiteranordnung und verfahren zur herstellung
DE69528111T2 (de) Biosensor und Verfahren zur Herstellung desselben
DE69316810D1 (de) SiGe-SOI-MOSFET und Verfahren zur Herstellung
DE69609903T2 (de) Diode und Verfahren zur Herstellung
DE69631579D1 (de) Nichtflüchtige Halbleiteranordnung und Verfahren zur Herstellung
DE59401845D1 (de) Rotor und Verfahren zur Herstellung desselben
DE69627975D1 (de) MOS-Transistor und Verfahren zu seiner Herstellung
DE69431023D1 (de) Halbleiteraufbau und Verfahren zur Herstellung
DE69606009T2 (de) Keramisches Bauteil vom Hülsentyp und Verfahren zur Herstellung desselben
DE69621088D1 (de) Bipolartransistor und Verfahren zur Herstellung
DE69631315T2 (de) Halbleiterspeicheranordnung und Verfahren zur Herstellung
DE69624278D1 (de) Bipolartransistor und Verfahren zur Herstellung
DE69637746D1 (de) Transistor und verfahren zur herstellung
DE69508885T2 (de) Halbleiterdiode und Verfahren zur Herstellung
DE69022346T2 (de) MOS-Feldeffekttransistor und Verfahren zur Herstellung.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition