DE69624278T2 - Bipolartransistor und Verfahren zur Herstellung - Google Patents

Bipolartransistor und Verfahren zur Herstellung

Info

Publication number
DE69624278T2
DE69624278T2 DE69624278T DE69624278T DE69624278T2 DE 69624278 T2 DE69624278 T2 DE 69624278T2 DE 69624278 T DE69624278 T DE 69624278T DE 69624278 T DE69624278 T DE 69624278T DE 69624278 T2 DE69624278 T2 DE 69624278T2
Authority
DE
Germany
Prior art keywords
manufacturing
bipolar transistor
bipolar
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69624278T
Other languages
English (en)
Other versions
DE69624278D1 (de
Inventor
Scott F Johnson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Application granted granted Critical
Publication of DE69624278D1 publication Critical patent/DE69624278D1/de
Publication of DE69624278T2 publication Critical patent/DE69624278T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/66272—Silicon vertical transistors
DE69624278T 1995-03-23 1996-03-19 Bipolartransistor und Verfahren zur Herstellung Expired - Lifetime DE69624278T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US40955895A 1995-03-23 1995-03-23

Publications (2)

Publication Number Publication Date
DE69624278D1 DE69624278D1 (de) 2002-11-21
DE69624278T2 true DE69624278T2 (de) 2003-06-26

Family

ID=23621022

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69624278T Expired - Lifetime DE69624278T2 (de) 1995-03-23 1996-03-19 Bipolartransistor und Verfahren zur Herstellung

Country Status (6)

Country Link
US (1) US5592017A (de)
EP (1) EP0734073B1 (de)
JP (1) JPH08274110A (de)
KR (1) KR100379586B1 (de)
DE (1) DE69624278T2 (de)
TW (1) TW317016B (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5760458A (en) * 1996-10-22 1998-06-02 Foveonics, Inc. Bipolar-based active pixel sensor cell with poly contact and increased capacitive coupling to the base region
US6087239A (en) 1996-11-22 2000-07-11 Micron Technology, Inc. Disposable spacer and method of forming and using same
KR100248504B1 (ko) * 1997-04-01 2000-03-15 윤종용 바이폴라 트랜지스터 및 그의 제조 방법
KR100303078B1 (ko) * 1997-05-12 2001-11-30 윤종용 파워오프(PowerOff)시전원관리장치및방법
US5869380A (en) * 1998-07-06 1999-02-09 Industrial Technology Research Institute Method for forming a bipolar junction transistor
DE19842106A1 (de) * 1998-09-08 2000-03-09 Inst Halbleiterphysik Gmbh Vertikaler Bipolartransistor und Verfahren zu seiner Herstellung
US6180478B1 (en) 1999-04-19 2001-01-30 Industrial Technology Research Institute Fabrication process for a single polysilicon layer, bipolar junction transistor featuring reduced junction capacitance
SE517833C2 (sv) * 1999-11-26 2002-07-23 Ericsson Telefon Ab L M Metod vid tillverkning av en bipolär kiseltransistor för att bilda basområden och öppna ett emitterfönster samt bipolär kiseltransistor tillverkad enligt metoden
FR2805923B1 (fr) * 2000-03-06 2002-05-24 St Microelectronics Sa Procede de fabrication d'un transistor bipolaire double- polysilicium auto-aligne
US6506653B1 (en) 2000-03-13 2003-01-14 International Business Machines Corporation Method using disposable and permanent films for diffusion and implant doping
US6465870B2 (en) * 2001-01-25 2002-10-15 International Business Machines Corporation ESD robust silicon germanium transistor with emitter NP-block mask extrinsic base ballasting resistor with doped facet region
ATE544176T1 (de) * 2001-07-18 2012-02-15 Infineon Technologies Ag Selektives basisätzen
KR100437494B1 (ko) * 2002-03-25 2004-06-25 주식회사 케이이씨 트랜지스터 및 그 제조 방법
US6869854B2 (en) * 2002-07-18 2005-03-22 International Business Machines Corporation Diffused extrinsic base and method for fabrication
DE10329664B4 (de) * 2003-07-01 2005-11-17 Infineon Technologies Ag Verfahren zum Kontaktieren einer aktiven Region eines elektronischen Bauelements und elektronisches Bauelement
US20080237657A1 (en) * 2007-03-26 2008-10-02 Dsm Solution, Inc. Signaling circuit and method for integrated circuit devices and systems
US11563084B2 (en) 2019-10-01 2023-01-24 Analog Devices International Unlimited Company Bipolar junction transistor, and a method of forming an emitter for a bipolar junction transistor
US11404540B2 (en) 2019-10-01 2022-08-02 Analog Devices International Unlimited Company Bipolar junction transistor, and a method of forming a collector for a bipolar junction transistor
US11355585B2 (en) 2019-10-01 2022-06-07 Analog Devices International Unlimited Company Bipolar junction transistor, and a method of forming a charge control structure for a bipolar junction transistor

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5946105B2 (ja) * 1981-10-27 1984-11-10 日本電信電話株式会社 バイポ−ラ型トランジスタ装置及びその製法
JPS61164262A (ja) * 1985-01-17 1986-07-24 Toshiba Corp 半導体装置
JPS62183558A (ja) * 1986-02-07 1987-08-11 Fujitsu Ltd バイポ−ラトランジスタの製造方法
US4892837A (en) * 1987-12-04 1990-01-09 Hitachi, Ltd. Method for manufacturing semiconductor integrated circuit device
US5198689A (en) * 1988-11-30 1993-03-30 Fujitsu Limited Heterojunction bipolar transistor
JPH0744186B2 (ja) * 1989-03-13 1995-05-15 株式会社東芝 半導体装置の製造方法
US5121184A (en) * 1991-03-05 1992-06-09 Hewlett-Packard Company Bipolar transistor containing a self-aligned emitter contact and method for forming transistor
JP2855908B2 (ja) * 1991-09-05 1999-02-10 日本電気株式会社 半導体装置及びその製造方法
JPH05182980A (ja) * 1992-01-07 1993-07-23 Toshiba Corp ヘテロ接合バイポーラトランジスタ
US5242847A (en) * 1992-07-27 1993-09-07 North Carolina State University At Raleigh Selective deposition of doped silion-germanium alloy on semiconductor substrate
JPH0793316B2 (ja) * 1992-12-28 1995-10-09 日本電気株式会社 半導体装置の製造方法
JP2626535B2 (ja) * 1993-12-28 1997-07-02 日本電気株式会社 半導体装置
US5593905A (en) * 1995-02-23 1997-01-14 Texas Instruments Incorporated Method of forming stacked barrier-diffusion source and etch stop for double polysilicon BJT with patterned base link

Also Published As

Publication number Publication date
JPH08274110A (ja) 1996-10-18
EP0734073A2 (de) 1996-09-25
TW317016B (de) 1997-10-01
US5592017A (en) 1997-01-07
KR100379586B1 (ko) 2004-01-13
DE69624278D1 (de) 2002-11-21
EP0734073A3 (de) 1996-12-04
EP0734073B1 (de) 2002-10-16
KR960036121A (ko) 1996-10-28

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Legal Events

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8364 No opposition during term of opposition