DE69637500D1 - Bipolartransistor mit epitaxialer Basis und Verfahren zur Herstellung - Google Patents

Bipolartransistor mit epitaxialer Basis und Verfahren zur Herstellung

Info

Publication number
DE69637500D1
DE69637500D1 DE69637500T DE69637500T DE69637500D1 DE 69637500 D1 DE69637500 D1 DE 69637500D1 DE 69637500 T DE69637500 T DE 69637500T DE 69637500 T DE69637500 T DE 69637500T DE 69637500 D1 DE69637500 D1 DE 69637500D1
Authority
DE
Germany
Prior art keywords
manufacture
bipolar transistor
epitaxial base
base bipolar
epitaxial
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69637500T
Other languages
English (en)
Other versions
DE69637500T2 (de
Inventor
Hiroshi Naruse
Hiroyuki Sugaya
Hidenori Saihara
Yoshiro Baba
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE69637500D1 publication Critical patent/DE69637500D1/de
Publication of DE69637500T2 publication Critical patent/DE69637500T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/66272—Silicon vertical transistors
    • H01L29/66287—Silicon vertical transistors with a single crystalline emitter, collector or base including extrinsic, link or graft base formed on the silicon substrate, e.g. by epitaxy, recrystallisation, after insulating device isolation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1004—Base region of bipolar transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
  • Recrystallisation Techniques (AREA)
DE69637500T 1995-12-15 1996-12-13 Bipolartransistor mit epitaxialer Basis und Verfahren zur Herstellung Expired - Lifetime DE69637500T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP7347688A JPH09167777A (ja) 1995-12-15 1995-12-15 半導体装置及びその製造方法
JP34768895 1995-12-15

Publications (2)

Publication Number Publication Date
DE69637500D1 true DE69637500D1 (de) 2008-05-29
DE69637500T2 DE69637500T2 (de) 2009-05-28

Family

ID=18391904

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69637500T Expired - Lifetime DE69637500T2 (de) 1995-12-15 1996-12-13 Bipolartransistor mit epitaxialer Basis und Verfahren zur Herstellung

Country Status (5)

Country Link
US (1) US5877540A (de)
EP (1) EP0779663B1 (de)
JP (1) JPH09167777A (de)
KR (1) KR100314347B1 (de)
DE (1) DE69637500T2 (de)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2937253B2 (ja) * 1996-01-17 1999-08-23 日本電気株式会社 半導体装置およびその製造方法
JPH10326793A (ja) * 1997-05-23 1998-12-08 Nec Corp 半導体装置の製造方法
JP2000012552A (ja) * 1998-06-17 2000-01-14 Toshiba Corp 半導体装置の製造方法及び半導体装置
US6331727B1 (en) * 1998-08-07 2001-12-18 Kabushiki Kaisha Toshiba Semiconductor device and method of fabricating the same
US6228733B1 (en) * 1999-09-23 2001-05-08 Industrial Technology Research Institute Non-selective epitaxial depostion technology
US6784065B1 (en) 2001-06-15 2004-08-31 National Semiconductor Corporation Bipolar transistor with ultra small self-aligned polysilicon emitter and method of forming the transistor
US7087979B1 (en) 2001-06-15 2006-08-08 National Semiconductor Corporation Bipolar transistor with an ultra small self-aligned polysilicon emitter
US6649482B1 (en) 2001-06-15 2003-11-18 National Semiconductor Corporation Bipolar transistor with a silicon germanium base and an ultra small self-aligned polysilicon emitter and method of forming the transistor
US6703685B2 (en) 2001-12-10 2004-03-09 Intel Corporation Super self-aligned collector device for mono-and hetero bipolar junction transistors
US6579771B1 (en) * 2001-12-10 2003-06-17 Intel Corporation Self aligned compact bipolar junction transistor layout, and method of making same

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63308377A (ja) * 1987-06-10 1988-12-15 Fujitsu Ltd バイポ−ラトランジスタの製造方法
JP3132101B2 (ja) * 1991-11-20 2001-02-05 日本電気株式会社 半導体装置の製造方法
JPH05343413A (ja) * 1992-06-11 1993-12-24 Fujitsu Ltd バイポーラトランジスタとその製造方法
JPH0758116A (ja) * 1993-08-10 1995-03-03 Toshiba Corp 半導体装置
JP2720793B2 (ja) * 1994-05-12 1998-03-04 日本電気株式会社 半導体装置の製造方法

Also Published As

Publication number Publication date
DE69637500T2 (de) 2009-05-28
US5877540A (en) 1999-03-02
KR970054357A (ko) 1997-07-31
EP0779663A2 (de) 1997-06-18
EP0779663A3 (de) 1997-09-03
EP0779663B1 (de) 2008-04-16
KR100314347B1 (ko) 2001-12-28
JPH09167777A (ja) 1997-06-24

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