ATE544176T1 - Selektives basisätzen - Google Patents

Selektives basisätzen

Info

Publication number
ATE544176T1
ATE544176T1 AT02746284T AT02746284T ATE544176T1 AT E544176 T1 ATE544176 T1 AT E544176T1 AT 02746284 T AT02746284 T AT 02746284T AT 02746284 T AT02746284 T AT 02746284T AT E544176 T1 ATE544176 T1 AT E544176T1
Authority
AT
Austria
Prior art keywords
layer
silicon
amorphous
germanium
etching
Prior art date
Application number
AT02746284T
Other languages
English (en)
Inventor
Ted Johansson
Hans Norstroem
Original Assignee
Infineon Technologies Ag
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from SE0102560A external-priority patent/SE0102560L/xx
Application filed by Infineon Technologies Ag filed Critical Infineon Technologies Ag
Application granted granted Critical
Publication of ATE544176T1 publication Critical patent/ATE544176T1/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/66242—Heterojunction transistors [HBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H01L21/32137—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers
AT02746284T 2001-07-18 2002-07-09 Selektives basisätzen ATE544176T1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
SE0102560A SE0102560L (sv) 2001-07-18 2001-07-18 Selektiv basetsning
SE0103980 2001-11-28
PCT/SE2002/001361 WO2003009353A1 (en) 2001-07-18 2002-07-09 Selective base etching

Publications (1)

Publication Number Publication Date
ATE544176T1 true ATE544176T1 (de) 2012-02-15

Family

ID=26655521

Family Applications (1)

Application Number Title Priority Date Filing Date
AT02746284T ATE544176T1 (de) 2001-07-18 2002-07-09 Selektives basisätzen

Country Status (4)

Country Link
US (1) US6852638B2 (de)
EP (1) EP1415330B1 (de)
AT (1) ATE544176T1 (de)
WO (1) WO2003009353A1 (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111685237A (zh) * 2019-03-13 2020-09-22 沈阳博阳饲料股份有限公司 貂、狐、貉复合预混合颗粒饲料的制备方法

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1294016A1 (de) * 2001-09-18 2003-03-19 Paul Scherrer Institut Herstellung von selbstorganisierten gestapelten Inseln für selbstjustierte Kontakte von Strukturen mit kleinen Abmessungen
EP1650796A3 (de) * 2004-10-20 2010-12-08 STMicroelectronics (Crolles 2) SAS Verfahren für einen Kontaktanschluss auf einer Region einer integrierten Schaltung, insbesondere auf Transistorelektroden
GB2425400A (en) 2005-04-18 2006-10-25 X Fab Semiconductor Foundries Improvements in transistor manufacture
KR100625124B1 (ko) * 2005-08-30 2006-09-15 삼성전자주식회사 스택형 반도체 장치의 제조 방법
US7902074B2 (en) * 2006-04-07 2011-03-08 Micron Technology, Inc. Simplified pitch doubling process flow
US20150371889A1 (en) * 2014-06-20 2015-12-24 Applied Materials, Inc. Methods for shallow trench isolation formation in a silicon germanium layer
US9991129B1 (en) * 2017-05-23 2018-06-05 Applied Materials, Inc. Selective etching of amorphous silicon over epitaxial silicon
CN111509079A (zh) * 2020-01-20 2020-08-07 中国科学院微电子研究所 一种锗探测器及其制作方法

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5217564A (en) * 1980-04-10 1993-06-08 Massachusetts Institute Of Technology Method of producing sheets of crystalline material and devices made therefrom
US4988632A (en) * 1990-01-02 1991-01-29 Motorola, Inc. Bipolar process using selective silicon deposition
US5266504A (en) * 1992-03-26 1993-11-30 International Business Machines Corporation Low temperature emitter process for high performance bipolar devices
US5213989A (en) * 1992-06-24 1993-05-25 Motorola, Inc. Method for forming a grown bipolar electrode contact using a sidewall seed
US5431777A (en) * 1992-09-17 1995-07-11 International Business Machines Corporation Methods and compositions for the selective etching of silicon
US5484740A (en) * 1994-06-06 1996-01-16 Motorola, Inc. Method of manufacturing a III-V semiconductor gate structure
US5600174A (en) * 1994-10-11 1997-02-04 The Board Of Trustees Of The Leeland Stanford Junior University Suspended single crystal silicon structures and method of making same
US5616508A (en) * 1995-01-09 1997-04-01 Texas Instruments Incorporated High speed bipolar transistor using a patterned etch stop and diffusion source
US5593905A (en) * 1995-02-23 1997-01-14 Texas Instruments Incorporated Method of forming stacked barrier-diffusion source and etch stop for double polysilicon BJT with patterned base link
US5592017A (en) * 1995-03-23 1997-01-07 Texas Instruments Incorporated Self-aligned double poly BJT using sige spacers as extrinsic base contacts
SE508635C2 (sv) * 1995-11-20 1998-10-26 Ericsson Telefon Ab L M Förfarande för selektiv etsning vid tillverkning av en bipolär transistor med självregistrerande bas-emitterstruktur
US6077752A (en) * 1995-11-20 2000-06-20 Telefonaktiebolaget Lm Ericsson Method in the manufacturing of a semiconductor device
US5817580A (en) * 1996-02-08 1998-10-06 Micron Technology, Inc. Method of etching silicon dioxide
US6309975B1 (en) * 1997-03-14 2001-10-30 Micron Technology, Inc. Methods of making implanted structures
US6255183B1 (en) * 1997-05-23 2001-07-03 U.S. Phillips Corporation Manufacture of a semiconductor device with a MOS transistor having an LDD structure using SiGe spacers

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111685237A (zh) * 2019-03-13 2020-09-22 沈阳博阳饲料股份有限公司 貂、狐、貉复合预混合颗粒饲料的制备方法

Also Published As

Publication number Publication date
US20040157455A1 (en) 2004-08-12
EP1415330A1 (de) 2004-05-06
EP1415330B1 (de) 2012-02-01
US6852638B2 (en) 2005-02-08
WO2003009353A1 (en) 2003-01-30

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