DE69232381T2 - Halbleiteranordnung und Verfahren zu ihrer Herstellung - Google Patents

Halbleiteranordnung und Verfahren zu ihrer Herstellung

Info

Publication number
DE69232381T2
DE69232381T2 DE69232381T DE69232381T DE69232381T2 DE 69232381 T2 DE69232381 T2 DE 69232381T2 DE 69232381 T DE69232381 T DE 69232381T DE 69232381 T DE69232381 T DE 69232381T DE 69232381 T2 DE69232381 T2 DE 69232381T2
Authority
DE
Germany
Prior art keywords
manufacture
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69232381T
Other languages
English (en)
Other versions
DE69232381D1 (de
Inventor
Teruhiko Okada
Hirotada Kuriyama
Yoshio Kohno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE69232381D1 publication Critical patent/DE69232381D1/de
Application granted granted Critical
Publication of DE69232381T2 publication Critical patent/DE69232381T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/6675Amorphous silicon or polysilicon transistors
    • H01L29/66765Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78636Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with supplementary region or layer for improving the flatness of the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651Silicon transistors
    • H01L29/7866Non-monocrystalline silicon transistors
    • H01L29/78672Polycrystalline or microcrystalline silicon transistor
    • H01L29/78678Polycrystalline or microcrystalline silicon transistor with inverted-type structure, e.g. with bottom gate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B10/00Static random access memory [SRAM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Thin Film Transistor (AREA)
DE69232381T 1991-08-08 1992-08-07 Halbleiteranordnung und Verfahren zu ihrer Herstellung Expired - Fee Related DE69232381T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3199434A JP2901163B2 (ja) 1991-08-08 1991-08-08 半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
DE69232381D1 DE69232381D1 (de) 2002-03-14
DE69232381T2 true DE69232381T2 (de) 2002-11-14

Family

ID=16407758

Family Applications (2)

Application Number Title Priority Date Filing Date
DE69232381T Expired - Fee Related DE69232381T2 (de) 1991-08-08 1992-08-07 Halbleiteranordnung und Verfahren zu ihrer Herstellung
DE69220432T Expired - Fee Related DE69220432T2 (de) 1991-08-08 1992-08-07 Halbleiteranordnung und Verfahren zu ihrer Herstellung

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE69220432T Expired - Fee Related DE69220432T2 (de) 1991-08-08 1992-08-07 Halbleiteranordnung und Verfahren zu ihrer Herstellung

Country Status (5)

Country Link
US (1) US5550390A (de)
EP (2) EP0528290B1 (de)
JP (1) JP2901163B2 (de)
KR (1) KR960012916B1 (de)
DE (2) DE69232381T2 (de)

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2503864C3 (de) * 1975-01-30 1981-09-24 Siemens AG, 1000 Berlin und 8000 München Halbleiterbauelement
JPS55132072A (en) * 1979-03-31 1980-10-14 Toshiba Corp Mos semiconductor device
JPS5688354A (en) * 1979-12-20 1981-07-17 Toshiba Corp Semiconductor integrated circuit device
JPS57132365A (en) * 1981-02-10 1982-08-16 Toshiba Corp Nonvolatile semiconductor memory storage
JPS58124261A (ja) * 1982-01-21 1983-07-23 Toshiba Corp 半導体装置
JPS58218169A (ja) * 1982-06-14 1983-12-19 Seiko Epson Corp 半導体集積回路装置
JPS59108360A (ja) * 1982-12-14 1984-06-22 Mitsubishi Electric Corp 半導体装置
JPH0616560B2 (ja) * 1982-12-17 1994-03-02 セイコー電子工業株式会社 薄膜トランジスタの製造方法
DE3533032A1 (de) * 1985-09-17 1987-03-19 Standard Elektrik Lorenz Ag Duennschicht-feldeffekt-transistor und ein verfahren zu seiner herstellung
JP2892683B2 (ja) * 1989-05-29 1999-05-17 株式会社日立製作所 半導体記憶装置およびその製造方法
JPS62190761A (ja) * 1986-02-18 1987-08-20 Nissan Motor Co Ltd 半導体装置
JPS63104373A (ja) * 1986-10-20 1988-05-09 Mitsubishi Electric Corp 半導体記憶装置
JPH01229229A (ja) * 1988-03-09 1989-09-12 Seikosha Co Ltd 非晶質シリコン薄膜トランジスタおよびその製造方法
JPH01268064A (ja) * 1988-04-20 1989-10-25 Hitachi Ltd 多結晶シリコン薄膜の形成方法
JPH01276672A (ja) * 1988-04-27 1989-11-07 Seikosha Co Ltd 逆スタガー型非晶質シリコン薄膜トランジスタ
JPH022175A (ja) * 1988-06-14 1990-01-08 Matsushita Electric Ind Co Ltd 薄膜トランジスタ及びその製造方法
JPH0348463A (ja) * 1989-03-01 1991-03-01 Mitsubishi Electric Corp 薄膜トランジスタ
JPH0341774A (ja) * 1989-07-10 1991-02-22 Sharp Corp 薄膜トランジスタ
JPH03293773A (ja) * 1990-04-12 1991-12-25 Casio Comput Co Ltd 薄膜トランジスタメモリ
JPH04505833A (ja) * 1990-10-05 1992-10-08 ゼネラル・エレクトリック・カンパニイ 基準構造の地形の伝搬地形による装置の自己アライメント
JPH04162668A (ja) * 1990-10-26 1992-06-08 Hitachi Ltd 半導体装置およびその製造方法

Also Published As

Publication number Publication date
EP0528290A1 (de) 1993-02-24
JP2901163B2 (ja) 1999-06-07
DE69220432T2 (de) 1998-01-22
KR960012916B1 (ko) 1996-09-25
EP0771035A1 (de) 1997-05-02
EP0528290B1 (de) 1997-06-18
KR930005258A (ko) 1993-03-23
EP0771035B1 (de) 2002-01-23
JPH0547793A (ja) 1993-02-26
DE69232381D1 (de) 2002-03-14
DE69220432D1 (de) 1997-07-24
US5550390A (en) 1996-08-27

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee