DE69033662T2 - Integrierte Halbleitervorrichtung und Verfahren zu ihrer Herstellung - Google Patents

Integrierte Halbleitervorrichtung und Verfahren zu ihrer Herstellung

Info

Publication number
DE69033662T2
DE69033662T2 DE69033662T DE69033662T DE69033662T2 DE 69033662 T2 DE69033662 T2 DE 69033662T2 DE 69033662 T DE69033662 T DE 69033662T DE 69033662 T DE69033662 T DE 69033662T DE 69033662 T2 DE69033662 T2 DE 69033662T2
Authority
DE
Germany
Prior art keywords
manufacture
semiconductor device
integrated semiconductor
integrated
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69033662T
Other languages
English (en)
Other versions
DE69033662D1 (de
Inventor
Hiroshi Momose
Takeo Maeda
Koji Makita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE69033662D1 publication Critical patent/DE69033662D1/de
Publication of DE69033662T2 publication Critical patent/DE69033662T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/07Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
    • H01L27/0705Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type
    • H01L27/0711Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with bipolar transistors and diodes, or capacitors, or resistors
    • H01L27/0716Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with bipolar transistors and diodes, or capacitors, or resistors in combination with vertical bipolar transistors and diodes, or capacitors, or resistors
DE69033662T 1989-01-30 1990-01-30 Integrierte Halbleitervorrichtung und Verfahren zu ihrer Herstellung Expired - Fee Related DE69033662T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1020214A JP2549726B2 (ja) 1989-01-30 1989-01-30 半導体集積回路とその製造方法

Publications (2)

Publication Number Publication Date
DE69033662D1 DE69033662D1 (de) 2000-12-21
DE69033662T2 true DE69033662T2 (de) 2001-05-03

Family

ID=12020912

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69033662T Expired - Fee Related DE69033662T2 (de) 1989-01-30 1990-01-30 Integrierte Halbleitervorrichtung und Verfahren zu ihrer Herstellung

Country Status (5)

Country Link
US (1) US5583363A (de)
EP (1) EP0381139B1 (de)
JP (1) JP2549726B2 (de)
KR (1) KR930009028B1 (de)
DE (1) DE69033662T2 (de)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR970000425B1 (ko) * 1990-09-20 1997-01-09 이해욱 BiCMOS형 전계효과 트랜지스터 및 그의 제조방법
KR920008922A (ko) * 1990-10-29 1992-05-28 김광호 일체형 바이 시모스 회로
DE4220788A1 (de) * 1992-06-25 1994-01-20 Inst Halbleiterphysik Gmbh Halbleiteranordnung und damit aufgebaute Logikgrundschaltung
JPH11163278A (ja) * 1997-11-25 1999-06-18 Mitsubishi Electric Corp 半導体装置およびその製造方法
US6225674B1 (en) * 1999-04-02 2001-05-01 Motorola, Inc. Semiconductor structure and method of manufacture
US6909150B2 (en) * 2001-07-23 2005-06-21 Agere Systems Inc. Mixed signal integrated circuit with improved isolation
JP4800816B2 (ja) * 2006-03-31 2011-10-26 富士通セミコンダクター株式会社 半導体集積回路装置
JP4209433B2 (ja) * 2006-06-12 2009-01-14 Necエレクトロニクス株式会社 静電破壊保護装置
FR2999802A1 (fr) * 2012-12-14 2014-06-20 St Microelectronics Sa Cellule cmos realisee dans une technologie fd soi

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4066917A (en) * 1976-05-03 1978-01-03 National Semiconductor Corporation Circuit combining bipolar transistor and JFET's to produce a constant voltage characteristic
JPS56152260A (en) * 1980-04-25 1981-11-25 Oki Electric Ind Co Ltd Manufacture of semiconductor device
US4441117A (en) * 1981-07-27 1984-04-03 Intersil, Inc. Monolithically merged field effect transistor and bipolar junction transistor
JPS60117765A (ja) * 1983-11-30 1985-06-25 Fujitsu Ltd 半導体装置の製造方法
JPS60182171A (ja) * 1984-02-29 1985-09-17 Oki Electric Ind Co Ltd 半導体装置の製造方法
JPS6120425A (ja) * 1984-07-06 1986-01-29 Nec Corp 論理回路
DD266212A1 (de) * 1985-06-25 1989-03-22 Adw Ddr Hochgeschwindigkeitstreiber und verfahren zu dessen herstellung
US4752589A (en) * 1985-12-17 1988-06-21 Siemens Aktiengesellschaft Process for the production of bipolar transistors and complementary MOS transistors on a common silicon substrate
JPS62150760A (ja) * 1985-12-24 1987-07-04 Toshiba Corp 半導体集積回路
JPS62169466A (ja) * 1986-01-22 1987-07-25 Toshiba Corp 半導体集積回路
JPS62174965A (ja) * 1986-01-28 1987-07-31 Nec Corp 集積回路
JPS62200757A (ja) * 1986-02-28 1987-09-04 Toshiba Corp Mos型半導体装置
JPS62293665A (ja) * 1986-06-13 1987-12-21 Hitachi Ltd 半導体集積回路装置の製造方法
KR910006374B1 (ko) * 1986-08-22 1991-08-21 삼성전자 주식회사 영상처리 시스템의 전원공급 및 입력신호 조절회로
JPS63244767A (ja) * 1987-03-31 1988-10-12 Matsushita Electric Ind Co Ltd バイポ−ラ・cmos半導体集積回路
US4819047A (en) * 1987-05-15 1989-04-04 Advanced Micro Devices, Inc. Protection system for CMOS integrated circuits
US4830973A (en) * 1987-10-06 1989-05-16 Motorola, Inc. Merged complementary bipolar and MOS means and method
JPH05226181A (ja) * 1992-02-18 1993-09-03 Mitsubishi Materials Corp セラミックス電子部品の外部電極焼成方法

Also Published As

Publication number Publication date
EP0381139B1 (de) 2000-11-15
KR900012360A (ko) 1990-08-03
JPH02201952A (ja) 1990-08-10
JP2549726B2 (ja) 1996-10-30
EP0381139A3 (de) 1992-07-01
EP0381139A2 (de) 1990-08-08
KR930009028B1 (ko) 1993-09-18
US5583363A (en) 1996-12-10
DE69033662D1 (de) 2000-12-21

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee