DE69227743T2 - Integrierte Halbleiterschaltung mit Abtastpfad - Google Patents

Integrierte Halbleiterschaltung mit Abtastpfad

Info

Publication number
DE69227743T2
DE69227743T2 DE69227743T DE69227743T DE69227743T2 DE 69227743 T2 DE69227743 T2 DE 69227743T2 DE 69227743 T DE69227743 T DE 69227743T DE 69227743 T DE69227743 T DE 69227743T DE 69227743 T2 DE69227743 T2 DE 69227743T2
Authority
DE
Germany
Prior art keywords
semiconductor circuit
scan path
integrated semiconductor
integrated
scan
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69227743T
Other languages
English (en)
Other versions
DE69227743D1 (de
Inventor
Takeshi Yamamura
Tadahiro Saitoh
Kazuhiro Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP23841091A external-priority patent/JP3287590B2/ja
Priority claimed from JP3240010A external-priority patent/JPH0580128A/ja
Priority claimed from JP03241046A external-priority patent/JP3111533B2/ja
Priority claimed from JP25495491A external-priority patent/JP3170758B2/ja
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE69227743D1 publication Critical patent/DE69227743D1/de
Application granted granted Critical
Publication of DE69227743T2 publication Critical patent/DE69227743T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318536—Scan chain arrangements, e.g. connections, test bus, analog signals
    • G01R31/318538—Topological or mechanical aspects
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
DE69227743T 1991-09-18 1992-09-17 Integrierte Halbleiterschaltung mit Abtastpfad Expired - Fee Related DE69227743T2 (de)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP23841091A JP3287590B2 (ja) 1991-09-18 1991-09-18 半導体集積回路装置
JP3240010A JPH0580128A (ja) 1991-09-19 1991-09-19 半導体集積回路
JP03241046A JP3111533B2 (ja) 1991-09-20 1991-09-20 半導体集積回路
JP25495491A JP3170758B2 (ja) 1991-10-02 1991-10-02 半導体集積回路

Publications (2)

Publication Number Publication Date
DE69227743D1 DE69227743D1 (de) 1999-01-14
DE69227743T2 true DE69227743T2 (de) 1999-04-22

Family

ID=27477726

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69227743T Expired - Fee Related DE69227743T2 (de) 1991-09-18 1992-09-17 Integrierte Halbleiterschaltung mit Abtastpfad

Country Status (4)

Country Link
US (1) US6487682B2 (de)
EP (1) EP0533476B1 (de)
KR (1) KR970001840B1 (de)
DE (1) DE69227743T2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6708238B1 (en) * 2001-01-19 2004-03-16 Sun Microsystems, Inc. Input/output cell with a programmable delay element
JP2003121497A (ja) * 2001-10-09 2003-04-23 Fujitsu Ltd 論理回路テスト用スキャンパス回路及びこれを備えた集積回路装置
US7281227B2 (en) * 2004-09-30 2007-10-09 Infineon Technologies Ag Method and device for the computer-aided design of a supply network
JP5124904B2 (ja) * 2005-03-14 2013-01-23 日本電気株式会社 半導体試験方法及び半導体装置
KR100780775B1 (ko) 2006-11-24 2007-11-30 주식회사 하이닉스반도체 자기 조립 더미 패턴이 삽입된 회로 레이아웃을 이용한반도체 소자 제조 방법
JP5625249B2 (ja) * 2009-03-24 2014-11-19 富士通株式会社 回路モジュール、半導体集積回路、および検査装置
US8775108B2 (en) * 2011-06-29 2014-07-08 Duke University Method and architecture for pre-bond probing of TSVs in 3D stacked integrated circuits

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
UST944007I4 (de) * 1973-08-27 1976-03-02
JPS57133644A (en) 1981-02-12 1982-08-18 Fujitsu Ltd Semiconductor integrated circuit device
JPS57211248A (en) 1981-06-22 1982-12-25 Hitachi Ltd Semiconductor integrated circuit device
JPS6034036A (ja) 1983-08-04 1985-02-21 Nec Corp マスタスライス方式ｌｓｉ基板
JPS6049648A (ja) 1983-08-30 1985-03-18 Sumitomo Electric Ind Ltd マスタスライスｉｃ
US4819166A (en) * 1983-08-31 1989-04-04 Amdahl Corporation Multimode scan apparatus
JPS6082871A (ja) 1983-10-13 1985-05-11 Nec Corp 論理集積回路
JPS60136241A (ja) 1983-12-23 1985-07-19 Toshiba Corp ゲ−トアレイの入力回路
JPS60234341A (ja) 1984-05-07 1985-11-21 Hitachi Ltd 半導体集回路装置
JPS60242380A (ja) 1984-05-16 1985-12-02 Hitachi Ltd 集積回路の故彰診断容易化回路
JPS60251643A (ja) 1984-05-28 1985-12-12 Sharp Corp 半導体ゲ−トアレイ装置
JPS6143464A (ja) 1984-08-08 1986-03-03 Hitachi Ltd 半導体装置
JPS6154470A (ja) 1984-08-27 1986-03-18 Toshiba Corp テスト容易化回路
JPS61179577A (ja) 1985-02-04 1986-08-12 Sumitomo Electric Ind Ltd 半導体デバイスとその製造方法
JPS62126371A (ja) 1985-11-27 1987-06-08 Nec Corp デイジタル回路のテスト信号発生回路
JPS62154775A (ja) 1985-12-27 1987-07-09 Hitachi Ltd 論理集積回路
JPS62155550A (ja) 1985-12-27 1987-07-10 Nec Corp 大規模集積回路
JPS62155549A (ja) 1985-12-27 1987-07-10 Nec Corp 大規模集積回路
JPS62179742A (ja) 1986-02-03 1987-08-06 Seiko Epson Corp ゲ−トアレイ
JPS62195169A (ja) 1986-02-21 1987-08-27 Nec Corp 大規模集積回路
JPS62224056A (ja) 1986-03-26 1987-10-02 Hitachi Ltd 半導体装置
JPS62261144A (ja) 1986-05-07 1987-11-13 Mitsubishi Electric Corp 半導体集積回路
JPS63108747A (ja) 1986-10-27 1988-05-13 Nec Corp ゲ−トアレイ集積回路
JPS63243890A (ja) 1987-03-31 1988-10-11 Toshiba Corp 半導体集積回路装置
JPS63300528A (ja) 1987-05-29 1988-12-07 Nec Corp ゲ−トアレイ集積回路
JPS6486536A (en) 1987-09-29 1989-03-31 Toshiba Corp Semiconductor device
JPH01134280A (ja) 1987-11-19 1989-05-26 Nec Corp ゲートアレイ
JPH01259560A (ja) 1988-04-08 1989-10-17 Ricoh Co Ltd 半導体集積回路装置
JPH0758727B2 (ja) 1988-07-15 1995-06-21 沖電気工業株式会社 半導体素子の製造方法
JPH02105468A (ja) 1988-10-13 1990-04-18 Nec Corp 電界効果型トランジスタ回路
JPH0330452A (ja) 1989-06-28 1991-02-08 Hitachi Ltd 半導体集積回路装置
JPH0372281A (ja) 1989-08-14 1991-03-27 Hitachi Ltd 半導体集積回路装置
JPH03165533A (ja) 1989-11-25 1991-07-17 Seiko Epson Corp 半導体装置
JPH03203363A (ja) 1989-12-29 1991-09-05 Nec Corp 半導体装置
DE4003453A1 (de) * 1990-02-06 1991-08-08 Bosch Gmbh Robert Schaltungsanordnung fuer eine drehwinkelstellungs-erfassung
JP2561164B2 (ja) * 1990-02-26 1996-12-04 三菱電機株式会社 半導体集積回路
JP2977959B2 (ja) 1991-07-12 1999-11-15 シチズン時計株式会社 半導体装置およびその測定方法
US5347519A (en) * 1991-12-03 1994-09-13 Crosspoint Solutions Inc. Preprogramming testing in a field programmable gate array
JP3227207B2 (ja) 1992-06-12 2001-11-12 シチズン時計株式会社 半導体装置およびその測定方法
JPH06160489A (ja) * 1992-11-17 1994-06-07 Hitachi Ltd バウンダリスキャン内部テスト方式
EP0600594B1 (de) * 1992-11-24 1998-03-04 Advanced Micro Devices, Inc. Abtastprüfung für integrierte Schaltungen
US5477545A (en) * 1993-02-09 1995-12-19 Lsi Logic Corporation Method and apparatus for testing of core-cell based integrated circuits
JPH08101867A (ja) * 1994-09-30 1996-04-16 Fujitsu Ltd ソフトウェア利用許可システム
US5487074A (en) * 1995-03-20 1996-01-23 Cray Research, Inc. Boundary scan testing using clocked signal

Also Published As

Publication number Publication date
KR970001840B1 (ko) 1997-02-17
US6487682B2 (en) 2002-11-26
EP0533476A2 (de) 1993-03-24
EP0533476B1 (de) 1998-12-02
DE69227743D1 (de) 1999-01-14
US20020049927A1 (en) 2002-04-25
EP0533476A3 (de) 1994-03-23

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee