DE68923624D1 - Halbleiterspeicheranordnung. - Google Patents

Halbleiterspeicheranordnung.

Info

Publication number
DE68923624D1
DE68923624D1 DE68923624T DE68923624T DE68923624D1 DE 68923624 D1 DE68923624 D1 DE 68923624D1 DE 68923624 T DE68923624 T DE 68923624T DE 68923624 T DE68923624 T DE 68923624T DE 68923624 D1 DE68923624 D1 DE 68923624D1
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68923624T
Other languages
English (en)
Other versions
DE68923624T2 (de
Inventor
Hiroto Nakai
Hiroshi Iwahashi
Kazuhisa Kanazawa
Shigeru Kumagai
Isao Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba Electronic Device Solutions Corp
Original Assignee
Toshiba Corp
Toshiba Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP15653988A external-priority patent/JPH07109719B2/ja
Priority claimed from JP16134488A external-priority patent/JPH0642320B2/ja
Application filed by Toshiba Corp, Toshiba Microelectronics Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE68923624D1 publication Critical patent/DE68923624D1/de
Publication of DE68923624T2 publication Critical patent/DE68923624T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G11C16/28—Sensing or reading circuits; Data output circuits using differential sensing or reference cells, e.g. dummy cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/062—Differential amplifiers of non-latching type, e.g. comparators, long-tailed pairs
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/14—Dummy cell management; Sense reference voltage generators
DE68923624T 1988-06-24 1989-06-23 Halbleiterspeicheranordnung. Expired - Fee Related DE68923624T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP15653988A JPH07109719B2 (ja) 1988-06-24 1988-06-24 半導体記憶装置
JP16134488A JPH0642320B2 (ja) 1988-06-29 1988-06-29 半導体記憶装置

Publications (2)

Publication Number Publication Date
DE68923624D1 true DE68923624D1 (de) 1995-08-31
DE68923624T2 DE68923624T2 (de) 1996-02-01

Family

ID=26484252

Family Applications (3)

Application Number Title Priority Date Filing Date
DE68923624T Expired - Fee Related DE68923624T2 (de) 1988-06-24 1989-06-23 Halbleiterspeicheranordnung.
DE68923588T Expired - Fee Related DE68923588T2 (de) 1988-06-24 1989-06-23 Halbleiterspeicheranordnung.
DE68926124T Expired - Fee Related DE68926124T2 (de) 1988-06-24 1989-06-23 Halbleiterspeicheranordnung

Family Applications After (2)

Application Number Title Priority Date Filing Date
DE68923588T Expired - Fee Related DE68923588T2 (de) 1988-06-24 1989-06-23 Halbleiterspeicheranordnung.
DE68926124T Expired - Fee Related DE68926124T2 (de) 1988-06-24 1989-06-23 Halbleiterspeicheranordnung

Country Status (4)

Country Link
US (1) US5040148A (de)
EP (3) EP0576046B1 (de)
KR (1) KR930001735B1 (de)
DE (3) DE68923624T2 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5191552A (en) * 1988-06-24 1993-03-02 Kabushiki Kaisha Toshiba Semiconductor memory device with address transition actuated dummy cell
US5276643A (en) * 1988-08-11 1994-01-04 Siemens Aktiengesellschaft Integrated semiconductor circuit
JPH03156795A (ja) * 1989-11-15 1991-07-04 Toshiba Micro Electron Kk 半導体メモリ回路装置
IT1246241B (it) * 1990-02-23 1994-11-17 Sgs Thomson Microelectronics Circuito per la lettura dell'informazione contenuta in celle di memoria non volatili
DE69029968T2 (de) * 1990-11-19 1997-06-05 Sgs Thomson Microelectronics Speichern mit ungleichen Lasten und mit Kompensation
KR940005688B1 (ko) * 1991-09-05 1994-06-22 삼성전자 주식회사 메모리 소자에 있어서 데이터 라인의 프리챠아지 자동 검사 장치
JPH0574181A (ja) * 1991-09-10 1993-03-26 Nec Corp 半導体メモリ装置のデータ読み出し回路
JP3397427B2 (ja) * 1994-02-02 2003-04-14 株式会社東芝 半導体記憶装置
US5390147A (en) * 1994-03-02 1995-02-14 Atmel Corporation Core organization and sense amplifier having lubricating current, active clamping and buffered sense node for speed enhancement for non-volatile memory
DE69424771T2 (de) * 1994-03-22 2000-10-26 St Microelectronics Srl Anordnung zum Lesen einer Speicherzellenmatrix
EP0675501B1 (de) * 1994-03-31 2001-06-13 STMicroelectronics S.r.l. Nichtflüchtiges Speicherelement mit doppelt programmierbarer Zelle und entsprechende Leseschaltung für Redundanzschaltung
GB9423034D0 (en) * 1994-11-15 1995-01-04 Sgs Thomson Microelectronics A reference circuit
JPH08221996A (ja) * 1995-02-17 1996-08-30 Nec Corp 半導体記憶装置
JP3734550B2 (ja) * 1996-01-30 2006-01-11 株式会社ルネサステクノロジ 半導体記憶装置
DE69630672D1 (de) * 1996-03-29 2003-12-18 St Microelectronics Srl Referenzsystem zur Bestimmung des Programmierungs-/Nicht-Programmierungszustandes einer Speicherzelle, insbesondere für nichtflüchtige Speicher
US5602788A (en) * 1996-06-07 1997-02-11 International Business Machines Corporation Read only memory having localized reference bit lines
US5729493A (en) * 1996-08-23 1998-03-17 Motorola Inc. Memory suitable for operation at low power supply voltages and sense amplifier therefor
EP1063654B1 (de) * 1999-06-21 2003-03-05 STMicroelectronics S.r.l. Lesevorgang für nichtflüchtige Speicher mit einem mit der Lesespannung variablen Abtaststrom, und Anordnung zur Verwirkligung dieses Vorgangs
TW559814B (en) * 2001-05-31 2003-11-01 Semiconductor Energy Lab Nonvolatile memory and method of driving the same
JP2003077282A (ja) * 2001-08-31 2003-03-14 Fujitsu Ltd 不揮発性半導体記憶装置
KR100454145B1 (ko) * 2001-11-23 2004-10-26 주식회사 하이닉스반도체 플래쉬 메모리 장치

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53117341A (en) * 1977-03-24 1978-10-13 Toshiba Corp Semiconductor memory
US4611301A (en) * 1983-04-07 1986-09-09 Kabushiki Kaisha Toshiba Read only memory
JPH0666115B2 (ja) * 1983-09-26 1994-08-24 株式会社東芝 半導体記憶装置
JPS60150297A (ja) * 1984-01-13 1985-08-07 Nec Corp 記憶装置
US4805143A (en) * 1986-01-16 1989-02-14 Hitachi Ltd. Read-only memory
JPS62197996A (ja) * 1986-02-24 1987-09-01 Toshiba Corp 半導体メモリのセンスアンプ
JPS62231500A (ja) * 1986-03-31 1987-10-12 Toshiba Corp 半導体記憶装置
US4819212A (en) * 1986-05-31 1989-04-04 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device with readout test circuitry
IT1213343B (it) * 1986-09-12 1989-12-20 Sgs Microelettronica Spa Circuito di rilevamento dello stato di celle di matrice in memorie eprom in tecnologia mos.
JP2507529B2 (ja) * 1988-03-31 1996-06-12 株式会社東芝 不揮発性半導体記憶装置

Also Published As

Publication number Publication date
DE68923624T2 (de) 1996-02-01
EP0347935B1 (de) 1995-07-26
EP0347935A3 (de) 1991-05-29
EP0347935A2 (de) 1989-12-27
DE68923588T2 (de) 1996-07-04
DE68926124D1 (de) 1996-05-02
EP0576046A2 (de) 1993-12-29
DE68926124T2 (de) 1996-09-19
EP0576045B1 (de) 1995-07-26
EP0576046A3 (de) 1994-02-09
DE68923588D1 (de) 1995-08-31
KR930001735B1 (ko) 1993-03-12
EP0576045A3 (de) 1994-02-16
EP0576046B1 (de) 1996-03-27
KR910001750A (ko) 1991-01-31
US5040148A (en) 1991-08-13
EP0576045A2 (de) 1993-12-29

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee