DE69016153D1 - Nichtflüchtige Halbleiterspeicheranordnung. - Google Patents

Nichtflüchtige Halbleiterspeicheranordnung.

Info

Publication number
DE69016153D1
DE69016153D1 DE69016153T DE69016153T DE69016153D1 DE 69016153 D1 DE69016153 D1 DE 69016153D1 DE 69016153 T DE69016153 T DE 69016153T DE 69016153 T DE69016153 T DE 69016153T DE 69016153 D1 DE69016153 D1 DE 69016153D1
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
volatile semiconductor
volatile
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69016153T
Other languages
English (en)
Other versions
DE69016153T2 (de
Inventor
Masanobu Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP27396789A external-priority patent/JP2908483B2/ja
Priority claimed from JP27396889A external-priority patent/JP2859658B2/ja
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE69016153D1 publication Critical patent/DE69016153D1/de
Publication of DE69016153T2 publication Critical patent/DE69016153T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/26Sensing or reading circuits; Data output circuits
    • G11C16/28Sensing or reading circuits; Data output circuits using differential sensing or reference cells, e.g. dummy cells
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
DE69016153T 1989-10-20 1990-10-19 Nichtflüchtige Halbleiterspeicheranordnung. Expired - Fee Related DE69016153T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP27396789A JP2908483B2 (ja) 1989-10-20 1989-10-20 不揮発性半導体記憶装置
JP27396889A JP2859658B2 (ja) 1989-10-20 1989-10-20 不揮発性半導体記憶装置

Publications (2)

Publication Number Publication Date
DE69016153D1 true DE69016153D1 (de) 1995-03-02
DE69016153T2 DE69016153T2 (de) 1995-05-18

Family

ID=26550837

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69016153T Expired - Fee Related DE69016153T2 (de) 1989-10-20 1990-10-19 Nichtflüchtige Halbleiterspeicheranordnung.

Country Status (4)

Country Link
US (1) US5642308A (de)
EP (1) EP0424172B1 (de)
KR (1) KR910008733A (de)
DE (1) DE69016153T2 (de)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3114620B2 (ja) * 1996-05-30 2000-12-04 日本電気株式会社 半導体記憶装置
KR100486444B1 (ko) * 1996-08-30 2005-06-16 산요덴키가부시키가이샤 반도체기억장치
US5940334A (en) * 1996-09-30 1999-08-17 Advanced Micro Devices, Inc. Memory interface circuit including bypass data forwarding with essentially no delay
US5920517A (en) * 1996-09-30 1999-07-06 Advanced Micro Devices, Inc. Memory array test and characterization using isolated memory cell power supply
US5883826A (en) * 1996-09-30 1999-03-16 Wendell; Dennis Lee Memory block select using multiple word lines to address a single memory cell row
JP3532721B2 (ja) * 1996-12-19 2004-05-31 株式会社東芝 定電圧発生回路
US5920515A (en) * 1997-09-26 1999-07-06 Advanced Micro Devices, Inc. Register-based redundancy circuit and method for built-in self-repair in a semiconductor memory device
KR100548587B1 (ko) * 1998-09-10 2006-04-07 주식회사 하이닉스반도체 플래시 메모리의 기준셀 모니터링 회로
JP3805543B2 (ja) * 1998-11-19 2006-08-02 三菱電機株式会社 半導体集積回路
US6232801B1 (en) * 1999-08-04 2001-05-15 Vlsi Technology, Inc. Comparators and comparison methods
KR100604068B1 (ko) * 1999-09-14 2006-07-24 주식회사 엘지생활건강 자유라디칼 소거제 혹은 항산화제로서 폴리에톡실레이티드 비타민 씨 유도체를 함유하는 조성물
US6407946B2 (en) * 1999-12-08 2002-06-18 Matsushita Electric Industrial Co., Ltd. Nonvolatile semiconductor memory device
US6411549B1 (en) 2000-06-21 2002-06-25 Atmel Corporation Reference cell for high speed sensing in non-volatile memories
US6538922B1 (en) * 2000-09-27 2003-03-25 Sandisk Corporation Writable tracking cells
US6434049B1 (en) * 2000-12-29 2002-08-13 Intel Corporation Sample and hold voltage reference source
US6570789B2 (en) 2000-12-29 2003-05-27 Intel Corporation Load for non-volatile memory drain bias
US6744671B2 (en) * 2000-12-29 2004-06-01 Intel Corporation Kicker for non-volatile memory drain bias
US6535423B2 (en) 2000-12-29 2003-03-18 Intel Corporation Drain bias for non-volatile memory
US6456540B1 (en) 2001-01-30 2002-09-24 Intel Corporation Method and apparatus for gating a global column select line with address transition detection
US6950341B2 (en) * 2001-06-07 2005-09-27 Kabushiki Kaisha Toshiba Semiconductor memory device having plural sense amplifiers
US6940772B1 (en) 2002-03-18 2005-09-06 T-Ram, Inc Reference cells for TCCT based memory cells
US7064978B2 (en) * 2002-07-05 2006-06-20 Aplus Flash Technology, Inc. Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout
US6862223B1 (en) * 2002-07-05 2005-03-01 Aplus Flash Technology, Inc. Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout
US7237074B2 (en) * 2003-06-13 2007-06-26 Sandisk Corporation Tracking cells for a memory system
US7301807B2 (en) 2003-10-23 2007-11-27 Sandisk Corporation Writable tracking cells
KR100618840B1 (ko) * 2004-06-29 2006-09-01 삼성전자주식회사 저 전원전압 플래쉬 메모리장치의 감지회로
US8259505B2 (en) * 2010-05-28 2012-09-04 Nscore Inc. Nonvolatile memory device with reduced current consumption
JP6749021B2 (ja) * 2015-05-15 2020-09-02 国立大学法人東北大学 抵抗変化型素子を備えた記憶回路

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4301518A (en) * 1979-11-01 1981-11-17 Texas Instruments Incorporated Differential sensing of single ended memory array
JPS57180169A (en) * 1981-04-30 1982-11-06 Nec Corp Insulating gate type protective device
US4434479A (en) * 1981-11-02 1984-02-28 Mcdonnell Douglas Corporation Nonvolatile memory sensing system
JPS5999760A (ja) * 1982-11-29 1984-06-08 Mitsubishi Electric Corp 半導体記憶装置
JPS6177199A (ja) * 1984-09-21 1986-04-19 Toshiba Corp 半導体記憶装置
JPS6461063A (en) * 1987-09-01 1989-03-08 Fujitsu Ltd Semiconductor device and manufacture thereof
JP2507529B2 (ja) * 1988-03-31 1996-06-12 株式会社東芝 不揮発性半導体記憶装置

Also Published As

Publication number Publication date
EP0424172A3 (en) 1992-01-08
KR910008733A (ko) 1991-05-31
DE69016153T2 (de) 1995-05-18
US5642308A (en) 1997-06-24
EP0424172A2 (de) 1991-04-24
EP0424172B1 (de) 1995-01-18

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee