DE68923899D1 - Halbleiterspeicher. - Google Patents

Halbleiterspeicher.

Info

Publication number
DE68923899D1
DE68923899D1 DE68923899T DE68923899T DE68923899D1 DE 68923899 D1 DE68923899 D1 DE 68923899D1 DE 68923899 T DE68923899 T DE 68923899T DE 68923899 T DE68923899 T DE 68923899T DE 68923899 D1 DE68923899 D1 DE 68923899D1
Authority
DE
Germany
Prior art keywords
semiconductor memory
semiconductor
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68923899T
Other languages
English (en)
Other versions
DE68923899T2 (de
Inventor
Makiji Kobayashi
Mitsuo Isobe
Tatsuya Inatsuki
Hisashi Ueno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE68923899D1 publication Critical patent/DE68923899D1/de
Publication of DE68923899T2 publication Critical patent/DE68923899T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)
DE68923899T 1988-04-19 1989-04-19 Halbleiterspeicher. Expired - Fee Related DE68923899T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63096147A JPH01267896A (ja) 1988-04-19 1988-04-19 半導体メモリ

Publications (2)

Publication Number Publication Date
DE68923899D1 true DE68923899D1 (de) 1995-09-28
DE68923899T2 DE68923899T2 (de) 1996-03-14

Family

ID=14157269

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68923899T Expired - Fee Related DE68923899T2 (de) 1988-04-19 1989-04-19 Halbleiterspeicher.

Country Status (5)

Country Link
US (1) US5027327A (de)
EP (1) EP0338528B1 (de)
JP (1) JPH01267896A (de)
KR (1) KR890016677A (de)
DE (1) DE68923899T2 (de)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0778991B2 (ja) * 1988-07-26 1995-08-23 株式会社東芝 半導体メモリ
JP2898016B2 (ja) * 1989-06-23 1999-05-31 新日本製鐵株式会社 メモリ装置
US5193165A (en) * 1989-12-13 1993-03-09 International Business Machines Corporation Memory card refresh buffer
JPH04141886A (ja) * 1990-10-01 1992-05-15 Nec Corp マイクロコンピュータ
JP3225531B2 (ja) * 1990-05-15 2001-11-05 セイコーエプソン株式会社 メモリカード
DE69128559T2 (de) * 1990-05-15 1998-06-04 Seiko Epson Corp Speicherkarte
DE69228233T2 (de) * 1991-12-18 1999-09-16 Sun Microsystems, Inc. Wahlfreie Auffrischung
JP3426693B2 (ja) * 1994-03-07 2003-07-14 株式会社日立製作所 半導体記憶装置
KR0129197B1 (ko) * 1994-04-21 1998-10-01 문정환 메모리셀어레이의 리플레쉬 제어회로
JP3165585B2 (ja) * 1994-05-13 2001-05-14 シャープ株式会社 情報処理装置
US6025741A (en) * 1996-12-23 2000-02-15 International Business Machines Corporation Conditional restore for execution unit
US7930471B2 (en) * 2004-11-24 2011-04-19 Qualcomm Incorporated Method and system for minimizing impact of refresh operations on volatile memory performance
JP4664126B2 (ja) 2005-06-14 2011-04-06 富士通セミコンダクター株式会社 半導体メモリ
JP4934118B2 (ja) * 2008-09-05 2012-05-16 ルネサスエレクトロニクス株式会社 半導体記憶装置
JP2015032325A (ja) * 2013-07-31 2015-02-16 マイクロン テクノロジー， インク． 半導体装置
FR3094830A1 (fr) * 2019-04-08 2020-10-09 Proton World International N.V. Circuit d'alimentation d'une mémoire volatile

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4292676A (en) * 1978-11-15 1981-09-29 Lockheed Electronics Co., Inc. Refresh cycle minimizer in a dynamic semiconductor memory
JPS5888894A (ja) * 1981-11-19 1983-05-27 Hitachi Ltd リフレツシユ・アクセス競合製御回路
JPS58182193A (ja) * 1982-04-19 1983-10-25 Toshiba Corp リフレツシユ制御装置
EP0116774B1 (de) * 1982-12-27 1991-07-24 Kabushiki Kaisha Toshiba Halbleiterspeicheranordnung mit einem Auffrischungsmechanismus
US4672583A (en) * 1983-06-15 1987-06-09 Nec Corporation Dynamic random access memory device provided with test circuit for internal refresh circuit
US4625301A (en) * 1983-11-30 1986-11-25 Tandy Corporation Dynamic memory refresh circuit
EP0164735A3 (de) * 1984-06-11 1988-11-09 Nec Corporation Mikroprozessor mit Erfrischungsschaltung für dynamischen Speicher

Also Published As

Publication number Publication date
DE68923899T2 (de) 1996-03-14
JPH01267896A (ja) 1989-10-25
EP0338528A2 (de) 1989-10-25
EP0338528B1 (de) 1995-08-23
EP0338528A3 (de) 1991-11-13
KR890016677A (ko) 1989-11-29
US5027327A (en) 1991-06-25

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee