DE3688222D1 - Halbleitereinrichtung mit bipolarem transistor und isolierschicht-feldeffekttransistor. - Google Patents

Halbleitereinrichtung mit bipolarem transistor und isolierschicht-feldeffekttransistor.

Info

Publication number
DE3688222D1
DE3688222D1 DE8686109470T DE3688222T DE3688222D1 DE 3688222 D1 DE3688222 D1 DE 3688222D1 DE 8686109470 T DE8686109470 T DE 8686109470T DE 3688222 T DE3688222 T DE 3688222T DE 3688222 D1 DE3688222 D1 DE 3688222D1
Authority
DE
Germany
Prior art keywords
semiconductor device
insulation layer
field effect
layer field
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8686109470T
Other languages
English (en)
Other versions
DE3688222T2 (de
Inventor
Takao Watanabe
Goro Kitukawa
Ryoichi Hori
Kiyoo Itoh
Yoshiki Kawajiri
Takayuki Kawahara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP60161467A external-priority patent/JPH07111825B2/ja
Priority claimed from JP61017929A external-priority patent/JP2753218B2/ja
Priority claimed from JP61030846A external-priority patent/JPS62189816A/ja
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Application granted granted Critical
Publication of DE3688222D1 publication Critical patent/DE3688222D1/de
Publication of DE3688222T2 publication Critical patent/DE3688222T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/693—Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/017509—Interface arrangements
    • H03K19/017518—Interface arrangements using a combination of bipolar and field effect transistors [BIFET]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/09448—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET in combination with bipolar transistors [BIMOS]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01—Shaping pulses
    • H03K5/08—Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0036—Means reducing energy consumption

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Nonlinear Science (AREA)
  • Logic Circuits (AREA)
DE86109470T 1985-07-22 1986-07-10 Halbleitereinrichtung mit bipolarem transistor und isolierschicht-feldeffekttransistor. Expired - Fee Related DE3688222T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP60161467A JPH07111825B2 (ja) 1985-07-22 1985-07-22 半導体記憶装置
JP61017929A JP2753218B2 (ja) 1986-01-31 1986-01-31 半導体記憶装置
JP61030846A JPS62189816A (ja) 1986-02-17 1986-02-17 駆動回路

Publications (2)

Publication Number Publication Date
DE3688222D1 true DE3688222D1 (de) 1993-05-13
DE3688222T2 DE3688222T2 (de) 1993-11-04

Family

ID=27282010

Family Applications (1)

Application Number Title Priority Date Filing Date
DE86109470T Expired - Fee Related DE3688222T2 (de) 1985-07-22 1986-07-10 Halbleitereinrichtung mit bipolarem transistor und isolierschicht-feldeffekttransistor.

Country Status (3)

Country Link
US (2) US4730132A (de)
EP (2) EP0433271A3 (de)
DE (1) DE3688222T2 (de)

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US4926069A (en) * 1987-08-17 1990-05-15 Nec Corporation Bi-MOS circuit capable of high speed operation with low power consumption
JPS6471325A (en) * 1987-09-11 1989-03-16 Fujitsu Ltd Bipolar cmos inverter
JP2619415B2 (ja) * 1987-09-24 1997-06-11 株式会社日立製作所 半導体論理回路
JPH0197013A (ja) * 1987-10-09 1989-04-14 Hitachi Ltd 半導体回路装置
JP2593894B2 (ja) * 1987-11-16 1997-03-26 富士通株式会社 半導体記憶装置
US4866304A (en) * 1988-05-23 1989-09-12 Motorola, Inc. BICMOS NAND gate
US4975600A (en) * 1988-05-25 1990-12-04 Texas Instruments Incorporated Bicmos TTL output driver circuit
US5107507A (en) * 1988-05-26 1992-04-21 International Business Machines Bidirectional buffer with latch and parity capability
JPH0626308B2 (ja) * 1988-07-08 1994-04-06 株式会社東芝 出力回路
US4897564A (en) * 1988-12-27 1990-01-30 International Business Machines Corp. BICMOS driver circuit for high density CMOS logic circuits
US4933574A (en) * 1989-01-30 1990-06-12 Integrated Device Technology, Inc. BiCMOS output driver
US4952823A (en) * 1989-05-03 1990-08-28 Advanced Micro Devices, Inc. Bicmos decoder
CA2008749C (en) * 1989-06-30 1999-11-30 Frank Wanlass Noise rejecting ttl to cmos input buffer
JPH0683058B2 (ja) * 1989-10-06 1994-10-19 株式会社東芝 出力回路
JP2820980B2 (ja) * 1989-11-02 1998-11-05 富士通株式会社 論理回路
JPH03158018A (ja) * 1989-11-15 1991-07-08 Nec Corp 入力回路
US5155387A (en) * 1989-12-28 1992-10-13 North American Philips Corp. Circuit suitable for differential multiplexers and logic gates utilizing bipolar and field-effect transistors
DE69033654T2 (de) * 1989-12-28 2001-05-10 Koninklijke Philips Electronics N.V., Eindhoven BiCMOS-Pufferinverter und Gatter mit differentielem Eingang
GB9007791D0 (en) 1990-04-06 1990-06-06 Foss Richard C High voltage boosted wordline supply charge pump and regulator for dram
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US5751643A (en) * 1990-04-06 1998-05-12 Mosaid Technologies Incorporated Dynamic memory word line driver
US5055716A (en) * 1990-05-15 1991-10-08 Siarc Basic cell for bicmos gate array
US5103113A (en) * 1990-06-13 1992-04-07 Texas Instruments Incorporated Driving circuit for providing a voltage boasted over the power supply voltage source as a driving signal
US5111077A (en) * 1990-06-19 1992-05-05 Intel Corporation BiCMOS noninverting buffer and logic gates
US5113096A (en) * 1990-06-19 1992-05-12 Intel Corporation BiCMOS circuit
US5049765A (en) * 1990-06-19 1991-09-17 Intel Corporation BiCMOS noninverting buffer and logic gates
US5111076A (en) * 1990-09-05 1992-05-05 Min Ming Tarng Digital superbuffer
US5019728A (en) * 1990-09-10 1991-05-28 Ncr Corporation High speed CMOS backpanel transceiver
JP2570492B2 (ja) * 1990-11-28 1997-01-08 日本電気株式会社 半導体回路
JP3079515B2 (ja) * 1991-01-29 2000-08-21 株式会社東芝 ゲ−トアレイ装置及び入力回路及び出力回路及び降圧回路
JP2734254B2 (ja) * 1991-10-15 1998-03-30 日本電気株式会社 レベル変換回路
US5223751A (en) * 1991-10-29 1993-06-29 Vlsi Technology, Inc. Logic level shifter for 3 volt cmos to 5 volt cmos or ttl
JPH05167427A (ja) * 1991-12-13 1993-07-02 Toshiba Corp レベルシフト回路
US5668485A (en) * 1992-05-21 1997-09-16 Texas Instruments Incorporated Row decoder with level translator
US5300829A (en) * 1992-09-09 1994-04-05 Intel Corporation BiCMOS circuit with negative VBE protection
JP3194636B2 (ja) * 1993-01-12 2001-07-30 三菱電機株式会社 レベル変換回路、レベル変換回路を内蔵したエミュレータ用マイクロコンピュータ、レベル変換回路を内蔵したピギーバックマイクロコンピュータ、レベル変換回路を内蔵したエミュレートシステム及びレベル変換回路を内蔵したｌｓｉテストシステム
US5332933A (en) * 1993-01-21 1994-07-26 Hewlett-Packard Company Bipolar-MOS circuits with dimensions scaled to enhance performance
US5406140A (en) * 1993-06-07 1995-04-11 National Semiconductor Corporation Voltage translation and overvoltage protection
JP3193218B2 (ja) * 1993-12-21 2001-07-30 株式会社東芝 半導体論理回路
US5398000A (en) * 1994-03-30 1995-03-14 Intel Corporation Simple and high speed BICMOS tristate buffer circuit
JP3441152B2 (ja) * 1994-04-15 2003-08-25 株式会社東芝 ＢｉＣＭＯＳ回路
US5644265A (en) * 1995-05-01 1997-07-01 International Business Machines Corporation Off-chip driver for mixed voltage applications
US5576651A (en) * 1995-05-22 1996-11-19 International Business Machines Corporation Static/dynamic flip-flop
CN1124612C (zh) * 1995-07-21 2003-10-15 精工爱普生株式会社 半导体存储器装置及其字线升压方法
US5818259A (en) * 1995-11-30 1998-10-06 Philips Electronics North America Corporation Low voltage logic circuit
KR100233271B1 (ko) * 1996-12-30 1999-12-01 김영환 디코더 회로에서 전력 소비 감소 방법
EP0933784A1 (de) * 1997-12-31 1999-08-04 STMicroelectronics S.r.l. Hochspannungstreiberschaltung für die Dekodierungsphase in nichtflüchtigen mehrpegel Speicheranordnungen
JP3813538B2 (ja) * 2001-11-28 2006-08-23 富士通株式会社 レベルシフタ
TW589795B (en) * 2003-07-14 2004-06-01 Realtek Semiconductor Corp High-to-low level shift circuit
JP2005065029A (ja) * 2003-08-18 2005-03-10 Mitsubishi Electric Corp 半導体装置
US7847603B2 (en) * 2008-02-13 2010-12-07 Himax Technologies Limited Driving circuits in electronic device
US8310275B2 (en) * 2008-03-27 2012-11-13 Agere Systems Inc. High voltage tolerant input/output interface circuit
JP5253964B2 (ja) 2008-05-29 2013-07-31 ルネサスエレクトロニクス株式会社 固体撮像装置

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US3631528A (en) * 1970-08-14 1971-12-28 Robert S Green Low-power consumption complementary driver and complementary bipolar buffer circuits
JPS5490941A (en) * 1977-12-26 1979-07-19 Hitachi Ltd Driving circuit of tristate type
US4301383A (en) * 1979-10-05 1981-11-17 Harris Corporation Complementary IGFET buffer with improved bipolar output
EP0058958B1 (de) * 1981-02-25 1986-10-29 Kabushiki Kaisha Toshiba Komplementäre MOSFET-Logikschaltung
JPS5891680A (ja) * 1981-11-26 1983-05-31 Fujitsu Ltd 半導体装置
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US4469959A (en) * 1982-03-15 1984-09-04 Motorola, Inc. Input buffer
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US4453095A (en) * 1982-07-16 1984-06-05 Motorola Inc. ECL MOS Buffer circuits
US4472647A (en) * 1982-08-20 1984-09-18 Motorola, Inc. Circuit for interfacing with both TTL and CMOS voltage levels
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JPH0693626B2 (ja) * 1983-07-25 1994-11-16 株式会社日立製作所 半導体集積回路装置
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JPS60182488A (ja) * 1984-02-29 1985-09-18 日本電気株式会社 駆動用電子回路
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Also Published As

Publication number Publication date
EP0433271A2 (de) 1991-06-19
EP0209805B1 (de) 1993-04-07
US4837462A (en) 1989-06-06
DE3688222T2 (de) 1993-11-04
US4730132A (en) 1988-03-08
EP0433271A3 (en) 1991-11-06
EP0209805A3 (en) 1988-01-27
EP0209805A2 (de) 1987-01-28

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee