DE3584352D1 - Halbleiterspeicher mit schieberegistern fuer schnelles lesen und schreiben. - Google Patents

Halbleiterspeicher mit schieberegistern fuer schnelles lesen und schreiben.

Info

Publication number
DE3584352D1
DE3584352D1 DE8585402246T DE3584352T DE3584352D1 DE 3584352 D1 DE3584352 D1 DE 3584352D1 DE 8585402246 T DE8585402246 T DE 8585402246T DE 3584352 T DE3584352 T DE 3584352T DE 3584352 D1 DE3584352 D1 DE 3584352D1
Authority
DE
Germany
Prior art keywords
writing
semiconductor memory
fast reading
slide registers
registers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8585402246T
Other languages
English (en)
Inventor
Junji Ogawa
Yoshihiro Takemae
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP59245802A external-priority patent/JPS61123875A/ja
Priority claimed from JP59275553A external-priority patent/JPS61149989A/ja
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3584352D1 publication Critical patent/DE3584352D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1075—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for multiport memories each having random access ports and serial ports, e.g. video RAM

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
DE8585402246T 1984-11-20 1985-11-20 Halbleiterspeicher mit schieberegistern fuer schnelles lesen und schreiben. Expired - Fee Related DE3584352D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP59245802A JPS61123875A (ja) 1984-11-20 1984-11-20 半導体記憶装置
JP59275553A JPS61149989A (ja) 1984-12-25 1984-12-25 半導体記憶装置

Publications (1)

Publication Number Publication Date
DE3584352D1 true DE3584352D1 (de) 1991-11-14

Family

ID=26537411

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585402246T Expired - Fee Related DE3584352D1 (de) 1984-11-20 1985-11-20 Halbleiterspeicher mit schieberegistern fuer schnelles lesen und schreiben.

Country Status (4)

Country Link
US (1) US4745577A (de)
EP (1) EP0182719B1 (de)
KR (1) KR900000632B1 (de)
DE (1) DE3584352D1 (de)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6363196A (ja) * 1986-09-02 1988-03-19 Fujitsu Ltd 半導体記憶装置
JPS63161596A (ja) * 1986-12-25 1988-07-05 Nec Corp 半導体記憶装置
US4876663A (en) * 1987-04-23 1989-10-24 Mccord Donald G Display interface system using buffered VDRAMs and plural shift registers for data rate control between data source and display
JPH0760594B2 (ja) * 1987-06-25 1995-06-28 富士通株式会社 半導体記憶装置
DE3733012A1 (de) * 1987-09-30 1989-04-13 Thomson Brandt Gmbh Speicheranordnung
US5280448A (en) * 1987-11-18 1994-01-18 Sony Corporation Dynamic memory with group bit lines and associated bit line group selector
JP2501344B2 (ja) * 1987-12-26 1996-05-29 株式会社東芝 デ―タ転送回路
JP2591010B2 (ja) * 1988-01-29 1997-03-19 日本電気株式会社 シリアルアクセスメモリ装置
JPH0261893A (ja) * 1988-08-25 1990-03-01 Toshiba Corp ダイナミック型半導体メモリ
JPH0283899A (ja) * 1988-09-20 1990-03-23 Fujitsu Ltd 半導体記憶装置
DE3832328A1 (de) * 1988-09-23 1990-03-29 Broadcast Television Syst Speicheranordnung fuer digitale signale
JP2607689B2 (ja) * 1989-07-10 1997-05-07 株式会社日立製作所 ベクトル処理装置
US5426731A (en) * 1990-11-09 1995-06-20 Fuji Photo Film Co., Ltd. Apparatus for processing signals representative of a computer graphics image and a real image
US5799186A (en) * 1990-12-20 1998-08-25 Eastman Kodak Company Method and apparatus for programming a peripheral processor with a serial output memory device
US5579484A (en) * 1991-02-22 1996-11-26 Ncr Corporation System for performing fast data accessing in multiply/accumulate operations while using a VRAM
JP3732245B2 (ja) * 1993-11-11 2006-01-05 沖電気工業株式会社 シリアルアクセスメモリ
US5812148A (en) 1993-11-11 1998-09-22 Oki Electric Industry Co., Ltd. Serial access memory
US6897895B1 (en) * 1998-05-28 2005-05-24 Sanyo Electric Co., Ltd. Digital camera
JP3881477B2 (ja) 1999-09-06 2007-02-14 沖電気工業株式会社 シリアルアクセスメモリ
US6826663B2 (en) * 2003-01-13 2004-11-30 Rambus Inc. Coded write masking
WO2004063906A2 (en) * 2003-01-13 2004-07-29 Rambus Inc. Coded write masking
DE102004026526B4 (de) * 2003-06-03 2010-09-23 Samsung Electronics Co., Ltd., Suwon Integrierter Schaltungsbaustein und Betriebsverfahren
US7054202B2 (en) * 2003-06-03 2006-05-30 Samsung Electronics Co., Ltd. High burst rate write data paths for integrated circuit memory devices and methods of operating same
GB2433627B (en) * 2003-06-03 2007-11-07 Samsung Electronics Co Ltd High burst rate write data paths for integrated circuit memory devices and methods of operating same
JP5073935B2 (ja) * 2005-10-06 2012-11-14 オンセミコンダクター・トレーディング・リミテッド シリアルデータ入力システム
US9153305B2 (en) 2013-08-30 2015-10-06 Micron Technology, Inc. Independently addressable memory array address spaces

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58133698A (ja) * 1982-02-02 1983-08-09 Nec Corp 半導体メモリ装置
NL8202364A (nl) * 1982-06-11 1984-01-02 Philips Nv Serie-parallel-serie schuifregistergeheugen, waarbij het parallelopslagregister mede redundante enkelvoudige opslagregisters bevat, en afbeeldtoestel, voorzien van een zodanig georganiseerd beeldgeheugen.
JPS59180871A (ja) * 1983-03-31 1984-10-15 Fujitsu Ltd 半導体メモリ装置
NL8301603A (nl) * 1983-05-06 1984-12-03 Philips Nv Geintegreerde geheugenschakeling van een serie-parallel-serie type.

Also Published As

Publication number Publication date
KR900000632B1 (ko) 1990-02-01
EP0182719B1 (de) 1991-10-09
EP0182719A3 (en) 1988-08-03
KR860004466A (ko) 1986-06-23
US4745577A (en) 1988-05-17
EP0182719A2 (de) 1986-05-28

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee