GB2433627B - High burst rate write data paths for integrated circuit memory devices and methods of operating same - Google Patents

High burst rate write data paths for integrated circuit memory devices and methods of operating same

Info

Publication number
GB2433627B
GB2433627B GB0625944A GB0625944A GB2433627B GB 2433627 B GB2433627 B GB 2433627B GB 0625944 A GB0625944 A GB 0625944A GB 0625944 A GB0625944 A GB 0625944A GB 2433627 B GB2433627 B GB 2433627B
Authority
GB
United Kingdom
Prior art keywords
methods
integrated circuit
memory devices
write data
data paths
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0625944A
Other versions
GB2433627A (en
GB0625944D0 (en
Inventor
Yun-Sang Lee
Jung-Bae Lee
One-Gyun La
Sung-Ryul Kim
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR10-2003-0042840A external-priority patent/KR100532444B1/en
Priority claimed from US10/792,425 external-priority patent/US7054202B2/en
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Priority claimed from GB0412446A external-priority patent/GB2403575B/en
Publication of GB0625944D0 publication Critical patent/GB0625944D0/en
Publication of GB2433627A publication Critical patent/GB2433627A/en
Application granted granted Critical
Publication of GB2433627B publication Critical patent/GB2433627B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1018—Serial bit line access mode, e.g. using bit line address shift registers, bit line address counters, bit line burst counters
    • G11C7/1027—Static column decode serial bit line access mode, i.e. using an enabled row address stroke pulse with its associated word line address and a sequence of enabled bit line addresses
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076—Timing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4093—Input/output [I/O] data interface arrangements, e.g. data buffers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4094—Bit-line management or control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1018—Serial bit line access mode, e.g. using bit line address shift registers, bit line address counters, bit line burst counters
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1096—Write circuits, e.g. I/O line write drivers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M9/00—Parallel/series conversion or vice versa
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/10—Aspects relating to interfaces of memory device to external buses
    • G11C2207/107—Serial-parallel conversion of data or prefetch

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Databases & Information Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Dram (AREA)
GB0625944A 2003-06-03 2004-06-03 High burst rate write data paths for integrated circuit memory devices and methods of operating same Expired - Fee Related GB2433627B (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR20030035604 2003-06-03
KR10-2003-0042840A KR100532444B1 (en) 2003-06-03 2003-06-27 Memory device implementing 2N bit prefetch scheme using N bit prefetch structure and 2N bit prefetching method and auto-precharge method
US10/792,425 US7054202B2 (en) 2003-06-03 2004-03-03 High burst rate write data paths for integrated circuit memory devices and methods of operating same
GB0412446A GB2403575B (en) 2003-06-03 2004-06-03 High burst rate write data paths for integrated circuit memory devices and methods of operating same

Publications (3)

Publication Number Publication Date
GB0625944D0 GB0625944D0 (en) 2007-02-07
GB2433627A GB2433627A (en) 2007-06-27
GB2433627B true GB2433627B (en) 2007-11-07

Family

ID=38137368

Family Applications (2)

Application Number Title Priority Date Filing Date
GB0625943A Expired - Fee Related GB2433626B (en) 2003-06-03 2004-06-03 High burst rate write data paths for integrated circuit memory devices and methods of operating same
GB0625944A Expired - Fee Related GB2433627B (en) 2003-06-03 2004-06-03 High burst rate write data paths for integrated circuit memory devices and methods of operating same

Family Applications Before (1)

Application Number Title Priority Date Filing Date
GB0625943A Expired - Fee Related GB2433626B (en) 2003-06-03 2004-06-03 High burst rate write data paths for integrated circuit memory devices and methods of operating same

Country Status (1)

Country Link
GB (2) GB2433626B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11137914B2 (en) 2019-05-07 2021-10-05 Western Digital Technologies, Inc. Non-volatile storage system with hybrid command

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4644502A (en) * 1983-03-31 1987-02-17 Fujitsu Limited Semiconductor memory device typically used as a video ram
US4745577A (en) * 1984-11-20 1988-05-17 Fujitsu Limited Semiconductor memory device with shift registers for high speed reading and writing
US6144616A (en) * 1998-10-30 2000-11-07 Fujitsu Limited Semiconductor memory device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3627647B2 (en) * 2000-10-27 2005-03-09 セイコーエプソン株式会社 Activation of word lines in semiconductor memory devices

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4644502A (en) * 1983-03-31 1987-02-17 Fujitsu Limited Semiconductor memory device typically used as a video ram
US4745577A (en) * 1984-11-20 1988-05-17 Fujitsu Limited Semiconductor memory device with shift registers for high speed reading and writing
US6144616A (en) * 1998-10-30 2000-11-07 Fujitsu Limited Semiconductor memory device

Also Published As

Publication number Publication date
GB2433627A (en) 2007-06-27
GB2433626B (en) 2007-11-07
GB2433626A (en) 2007-06-27
GB0625943D0 (en) 2007-02-07
GB0625944D0 (en) 2007-02-07

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20150603