DE3132905C2 - - Google Patents

Info

Publication number
DE3132905C2
DE3132905C2 DE3132905A DE3132905A DE3132905C2 DE 3132905 C2 DE3132905 C2 DE 3132905C2 DE 3132905 A DE3132905 A DE 3132905A DE 3132905 A DE3132905 A DE 3132905A DE 3132905 C2 DE3132905 C2 DE 3132905C2
Authority
DE
Germany
Prior art keywords
layer
metal
polysilicon layer
dopant
heat treatment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE3132905A
Other languages
German (de)
English (en)
Other versions
DE3132905A1 (de
Inventor
Hermanus Josephus Henricus Eindhoven Nl Wilting
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of DE3132905A1 publication Critical patent/DE3132905A1/de
Application granted granted Critical
Publication of DE3132905C2 publication Critical patent/DE3132905C2/de
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/661—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
    • H10D64/662—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures
    • H10D64/663—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures the additional layers comprising a silicide layer contacting the layer of silicon, e.g. polycide gates
    • H10D64/0131—

Landscapes

  • Engineering & Computer Science (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
DE19813132905 1980-08-27 1981-08-20 "verfahren zur herstellung einer halbleiteranordnung" Granted DE3132905A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NLAANVRAGE8004835,A NL186352C (nl) 1980-08-27 1980-08-27 Werkwijze ter vervaardiging van een halfgeleiderinrichting.

Publications (2)

Publication Number Publication Date
DE3132905A1 DE3132905A1 (de) 1982-04-22
DE3132905C2 true DE3132905C2 (cg-RX-API-DMAC10.html) 1990-03-22

Family

ID=19835784

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19813132905 Granted DE3132905A1 (de) 1980-08-27 1981-08-20 "verfahren zur herstellung einer halbleiteranordnung"

Country Status (7)

Country Link
US (1) US4373251A (cg-RX-API-DMAC10.html)
JP (1) JPS5772383A (cg-RX-API-DMAC10.html)
CA (1) CA1176142A (cg-RX-API-DMAC10.html)
DE (1) DE3132905A1 (cg-RX-API-DMAC10.html)
FR (1) FR2489591A1 (cg-RX-API-DMAC10.html)
GB (1) GB2083284B (cg-RX-API-DMAC10.html)
NL (1) NL186352C (cg-RX-API-DMAC10.html)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5200349A (en) * 1980-12-30 1993-04-06 Fujitsu Limited Semiconductor device including schotky gate of silicide and method for the manufacture of the same
US5536967A (en) * 1980-12-30 1996-07-16 Fujitsu Limited Semiconductor device including Schottky gate of silicide and method for the manufacture of the same
US4399605A (en) * 1982-02-26 1983-08-23 International Business Machines Corporation Method of making dense complementary transistors
US4400867A (en) * 1982-04-26 1983-08-30 Bell Telephone Laboratories, Incorporated High conductivity metallization for semiconductor integrated circuits
DE3304642A1 (de) * 1983-02-10 1984-08-16 Siemens AG, 1000 Berlin und 8000 München Integrierte halbleiterschaltung mit bipolartransistor-strukturen und verfahren zu ihrer herstellung
US4450620A (en) * 1983-02-18 1984-05-29 Bell Telephone Laboratories, Incorporated Fabrication of MOS integrated circuit devices
GB2139418A (en) * 1983-05-05 1984-11-07 Standard Telephones Cables Ltd Semiconductor devices and conductors therefor
JPH0612819B2 (ja) * 1983-06-16 1994-02-16 松下電器産業株式会社 半導体装置の製造方法
JPH0638496B2 (ja) * 1983-06-27 1994-05-18 日本電気株式会社 半導体装置
JPS60134466A (ja) * 1983-12-23 1985-07-17 Hitachi Ltd 半導体装置およびその製造方法
GB2156579B (en) * 1984-03-15 1987-05-07 Standard Telephones Cables Ltd Field effect transistors
US4597163A (en) * 1984-12-21 1986-07-01 Zilog, Inc. Method of improving film adhesion between metallic silicide and polysilicon in thin film integrated circuit structures
US5280188A (en) * 1985-03-07 1994-01-18 Kabushiki Kaisha Toshiba Method of manufacturing a semiconductor integrated circuit device having at least one bipolar transistor and a plurality of MOS transistors
JPS61222174A (ja) * 1985-03-27 1986-10-02 Mitsubishi Electric Corp 半導体装置の製造方法
JPH061775B2 (ja) * 1985-07-17 1994-01-05 日本電気株式会社 半導体装置の製造方法
JPH0665213B2 (ja) * 1985-10-31 1994-08-22 日本テキサス・インスツルメンツ株式会社 半導体装置及びその製造方法
US4782033A (en) * 1985-11-27 1988-11-01 Siemens Aktiengesellschaft Process for producing CMOS having doped polysilicon gate by outdiffusion of boron from implanted silicide gate
US4877749A (en) * 1986-02-28 1989-10-31 Polyfet Re Devices, Inc. Method of forming a low loss FET
JPS6337635A (ja) * 1986-07-31 1988-02-18 Fujitsu Ltd 半導体装置の製造方法
US5017509A (en) * 1988-07-19 1991-05-21 Regents Of The University Of California Stand-off transmission lines and method for making same
US4992391A (en) * 1989-11-29 1991-02-12 Advanced Micro Devices, Inc. Process for fabricating a control gate for a floating gate FET
TW230266B (cg-RX-API-DMAC10.html) * 1993-01-26 1994-09-11 American Telephone & Telegraph
US6004869A (en) 1997-04-25 1999-12-21 Micron Technology, Inc. Method for making a low resistivity electrode having a near noble metal
JP4851875B2 (ja) * 2006-07-14 2012-01-11 川崎重工業株式会社 自動二輪車のリヤステップ取付構造及び該リヤステップ取付構造を備えた自動二輪車
JP6997692B2 (ja) 2018-09-28 2022-01-18 本田技研工業株式会社 鞍乗り型車両

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3617824A (en) * 1965-07-12 1971-11-02 Nippon Electric Co Mos device with a metal-silicide gate
US3590471A (en) * 1969-02-04 1971-07-06 Bell Telephone Labor Inc Fabrication of insulated gate field-effect transistors involving ion implantation
US3967981A (en) * 1971-01-14 1976-07-06 Shumpei Yamazaki Method for manufacturing a semiconductor field effort transistor
JPS4960875A (cg-RX-API-DMAC10.html) * 1972-10-17 1974-06-13
GB1399163A (en) * 1972-11-08 1975-06-25 Ferranti Ltd Methods of manufacturing semiconductor devices
NL7510903A (nl) * 1975-09-17 1977-03-21 Philips Nv Werkwijze voor het vervaardigen van een halfgelei- derinrichting, en inrichting vervaardigd volgens de werkwijze.
JPS52119186A (en) * 1976-03-31 1977-10-06 Nec Corp Manufacture of semiconductor
JPS6057227B2 (ja) * 1976-11-11 1985-12-13 日本電気株式会社 半導体装置の製造方法
JPS53114672A (en) * 1977-03-17 1978-10-06 Toshiba Corp Manufacture for semiconductor device
US4180596A (en) * 1977-06-30 1979-12-25 International Business Machines Corporation Method for providing a metal silicide layer on a substrate
JPS5488783A (en) * 1977-12-26 1979-07-14 Cho Lsi Gijutsu Kenkyu Kumiai Semiconductor
US4304042A (en) * 1978-11-13 1981-12-08 Xerox Corporation Self-aligned MESFETs having reduced series resistance
US4319395A (en) * 1979-06-28 1982-03-16 Motorola, Inc. Method of making self-aligned device
US4276688A (en) * 1980-01-21 1981-07-07 Rca Corporation Method for forming buried contact complementary MOS devices
US4285761A (en) * 1980-06-30 1981-08-25 International Business Machines Corporation Process for selectively forming refractory metal silicide layers on semiconductor devices

Also Published As

Publication number Publication date
GB2083284B (en) 1984-07-25
NL186352C (nl) 1990-11-01
FR2489591A1 (fr) 1982-03-05
NL8004835A (nl) 1982-04-01
DE3132905A1 (de) 1982-04-22
GB2083284A (en) 1982-03-17
FR2489591B1 (cg-RX-API-DMAC10.html) 1985-03-08
US4373251A (en) 1983-02-15
NL186352B (nl) 1990-06-01
CA1176142A (en) 1984-10-16
JPS5772383A (en) 1982-05-06

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Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee