CN1440073A - 半导体器件基底及其制造方法及半导体封装件 - Google Patents

半导体器件基底及其制造方法及半导体封装件 Download PDF

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CN1440073A
CN1440073A CN02147180A CN02147180A CN1440073A CN 1440073 A CN1440073 A CN 1440073A CN 02147180 A CN02147180 A CN 02147180A CN 02147180 A CN02147180 A CN 02147180A CN 1440073 A CN1440073 A CN 1440073A
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silicon base
installation end
semiconductor device
device substrate
deck
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CN1225783C (zh
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米田义之
南泽正荣
渡边英二
佐藤光孝
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Socionext Inc
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Fujitsu Ltd
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Abstract

一种半导体器件基底具有小间距的细小端点并且能够容易地以低廉费用生产而不需要使用特殊过程。一个安装端具有棱锥形状并且延伸于硅基底的前表面和背面之间。该安装端的一端自硅基底的背面伸出。一层布线层被形成于在硅基底的前表面上。该布线层包括一层电气上连至安装端的导电层。

Description

半导体器件基底及其制造方法及半导体封装件
技术领域
本发明一般涉及半导体器件基底，更具体地涉及一种半导体器件基底及其制造方法，其中使用一种具有形成于其上的细线的硅基底。
背景技术
随着半导体器件的高度集成化，半导体器件的安装端的间距愈来愈小。然而，由于在其上安装半导体器件的电路板的连接端片的间距大于半导体器件的安装端间距，因此难于照样安装半导体器件。
因此，半导体器件被安装于一个称为插入器的基底上，以便通过插入器将半导体器件安装于电路板上。也即，由插入器将半导体器件的电极重新安排以便形成具有较大间距的安装端，从而与电路板的连接端片的间距相匹配。
一般而言，以上所述半导体器件基底(插入器)具有多层结构，其中导电部件自在其上安装半导体器件的表面延伸至在其上形成安装端的背面。一般而言，一个有机薄基底用作插入器。为获得更细布线图形，在许多情况下使用硅基底。在一个硅基底上将绝缘层和导电层叠加而形成一个多层结构。能够穿过一个通孔例如一个现成基底的镀敷通孔而容易地形成穿过绝缘层的导电部件。一个硅基底具有相对大的厚度，以便具有插入器所需强度。因此，需要一个特殊制造过程以便在厚度方向内形成一个具有小间距而延伸的导电部件。
下面解释用于形成延伸穿过硅基底的导电部件的一个方法。
首先，准备一个厚硅基底，并且按照安装端的安排在硅基底中形成各具有细圆柱形状的小孔。每个具有细圆柱形状的孔称为堵塞通孔，它们只延伸至硅基底的中间。在每个通孔的内表面上形成一层绝缘薄膜之后，通过电镀或充填金属膏在每个通孔内充填金属。所充填的金属最后成为穿过硅基底的导电部件，并且其末端用作连至电路板的安装端。
在将金属充填至通孔中之后，在硅基底的上表面上形成一层布线层。硅基底通孔中的导电部件和布线层上表面上形成的电极片通过通孔或类似部件彼此连接。半导体器件的电极将连至电极片。
在硅基底的上表面上形成布线层之后，通过将硅基底的背面磨削(背磨削)或蚀刻而将硅基底的通孔中的导电部件末端暴露出来。可以将硅基底的背面磨削直至硅基底的通孔中的导电部件末端被磨削，然后选择性地只蚀刻硅基底从而使导电部件末端伸出。如此形成的伸出末端用作安装端，因此安装于半导体器件基底(插入器)上的半导体器件能够倒装地安装于电路板上。
使用以上所述插入器的制造方法，需要在一个硅基底中形成多个深圆柱通孔，它们被安排成为隔开细小间距平行地排列。为在硅基底中形成这类深通孔，需要使用一种特殊乾蚀刻方法例如活性离子蚀刻(ICP-RIE)。活性离子蚀刻并不应用于通常半导体器件生产过程(一种用于制造一个安装基底例如插入器的过程)中，它需要特殊的和昂贵的设备和过程。因此，半导体器件基底(插入器)的制造费用将会增加。
此外，以上所述方法需要一个在硅基底的深通孔中充填金属的过程。然而，在一个深通孔中充填金属而不产生气隙或空隙是困难的，并且需要一段长处理时间通过电镀来充填金属。
发明内容
本发明的一个一般目的是提供一种改进的和有用的半导体器件基底，其中能够消除以上所述的问题。
本发明的一个更具体的目的是提供一种半导体器件基底，它具有小间距的细小端点并且能够容易地以低廉费用生产而不需要使用特殊处理。
为达到以上所述目的，根据本发明的一个方面提供的一种半导体器件基底包括：一个具有一个第一表面和在位于第一表面背面的第二表面的硅基底；至少一个具有棱锥形状并且延伸于第一和第二表面之间的安装端，该安装端的一端自第一和第二表面中的一个之中伸出；以及一层在硅基底的第一表面上形成的布线层，该布线层包括一层电气上连至安装端的导电层。
根据以上所述的发明，具有棱锥形状的安装端能够使用硅基底中的凹下部分容易地形成，因为能够容易地通过蚀刻处理在硅基底中形成具有棱锥形状的凹下部分而不需特殊处理设备。此外，由于安装端具有一个棱锥形状顶点，该安装端的顶端能够刺入安装端所连接的部件，从而得到良好电气接触。
在根据本发明的半导体器件基底中，可以在安装端与硅基底之间插入一层由氧化硅薄膜形成的绝缘膜。此外，硅基底的第一表面能够被一层由有机绝缘膜形成的绝缘层所覆盖。还有，硅基底的第二表面可以被一层由有机绝缘膜形成的绝缘层所覆盖。该布线层能够具有多层结构，其中绝缘层和导电层被交替地叠加。
在根据本发明的半导体器件基底中，安装端的棱锥形状能够由硅基底的晶体平面所形成。硅基底的第一和第二表面可以与硅晶体的(001)面基本上平行。安装端可以具有一个空棱锥形状。安装端的顶端可以自硅基底的第二表面伸出。
另外，提供了根据本发明另一方面的用于制造半导体器件基底的方法，它包括以下步骤：在硅基底的第一表面上形成一个棱锥形状的凹下部分；在硅基底的第一表面上和凹下部分的内表面上形成一层绝缘膜；在凹下部分中形成一层导电层，该导电层被定形和安排成为一个安装端；在硅基底的第一表面上形成一层布线层，该布线层包括电气上连至凹下部分中导电层的一层导电层；以及自位于硅基底第一表面背面的第二表面中去除硅基底以便具有在凹下部分内以伸出状态暴露的导电层。
根据以上所述方法，能够使用硅基底中的凹下部分容易地形成具有棱锥形状的安装端，因为能够容易地通过蚀刻在硅基底中形成具有棱锥形状的凹下部分而不需特殊处理设备。此外，由于安装端具有一个棱锥形状顶点，该安装端的顶端能够刺入安装端所连接的部件，从而得到良好电气接触。
在根据本发明的方法中，形成凹下部分的步骤可以包括一个通过蚀刻处理去除硅基底的预定部分而形成棱锥形状的步骤。根据本发明的方法还包括以下步骤：在去除硅基底的步骤之后，在位于硅基底的第一表面背面的第二表面上形成一层绝缘膜的步骤。
在第二表面上形成一层绝缘膜的步骤可以包括一个在第二表面上形成一层氧化硅薄膜的步骤。选代地，在第二表面上形成一层绝缘层的步骤可以包括一个在第二表面上形成一层有机绝缘层的步骤。去除的步骤可以包括：将硅基底的第二表面磨削的第一步骤；及在第一步骤之后通过蚀刻去除硅基底以使安装端的一端从被蚀刻的表面伸出的第二步骤。
此外，提供了根据本发明的另一方面的半导体封装件，它包括：一个半导体器件基底；及一个具有至少一个形成于其电极片上的金属连接台的半导体元件，其中该半导体器件基底包括：一个具有第一表面和位于第一表面背面的第二表面的硅基底；至少一个具有棱锥形状并且延伸于第一和第二表面之间的安装端，该安装端的一端自第一和第二表面中的一个之中伸出；以及一层在硅基底的第一表面上形成的布线层，该布线层包括一层电气上连至安装端的导电层，以及其中半导体器件基底的安装端的一端如此连至金属连接台以使安装端的该端伸出伸入金属连接台内。因此，在半导体元件和半导体器件基底之间能够得到良好电气连接。
此外，提供了根据本发明的另一方面的半导体封装件，它包括：一个半导体器件基底；及一个具有至少一个形成于其电极片上的金属连接台的半导体元件，其中该半导体器件基底包括：一个具有第一表面和位于第一表面背面的第二表面的硅基底；至少一个具有棱锥形状并且延伸于第一和第二表面之间的安装端，该安装端的一端自第一和第二表面中的一个之中伸出；以及一层在硅基底的第一表面上形成的布线层，该布线层包括一层电气上连至安装端的导电层，以及其中半导体元件被安装于半导体器件基底的布线层上，及一个棱锥形状的安装端用作一个外部连接端点。因此，半导体封装件的外部连接端点成为棱锥形状，它在半导体封装件连至一个电路板时提供良好电气连接。
此外，提供了根据本发明的另一方面的半导体封装件，它包括：一个半导体元件；一个具有一个第一表面和在位于第一表面背面的第二表面的硅基底，该半导体元件被安装于第一表面上；以及一个面向半导体器件基底的第二表面并且通过半导体器件基底在电气上连至该半导体元件的组件基底，其中该半导体器件基底包括：一个具有第一表面和位于第一表面背面的第二表面的硅基底；至少一个具有棱锥形状并且延伸于第一和第二表面之间的安装端，该安装端的一端自第一和第二表面中的一个中伸出；以及一层在硅基底的第一表面上形成的布线层，该布线层包括一层电气上连至安装端的导电层。因为半导体器件基底能够形成为细微结构，该具有细微结构的半导体元件能够被安装于组件基底上而不需形成具有细微结构的组件基底。
当参照附图阅读以下详细说明时，将能更好地理解本发明的其他目的、特征和优点。
附图说明
图1是根据本发明第一实施例的插入器的放大剖面图；
图2是从顶端一侧观看的安装端的平面图；
图3A是基底中形成的凹下部分的平面图；图3B是其中形成凹下部分的基底部分的剖面图；
图4是用于解释插入器制造过程的解释图；
图5A至5I是图4所示各步骤中插入器的剖面图；
图6A是在背面上没有绝缘膜的插入器的剖面图；图6B是在背面上具有有机绝缘膜的插入器的剖面图；
图7是半导体封装件的剖面图，它是通过将半导体器件安装于图1中所示插入器的安装端上而形成的；
图8是半导体封装件的剖面图，其中半导体封装件连至图1中所示插入器的安装端上；
图9是半导体封装件的剖面图，它是通过将图7的半导体封装件安装于组件基底上而形成的；
图10是半导体封装件的剖面图，它是通过将半导体器件倒装于图1中所示插入器的连接片14的一侧而形成的；
图11是半导体封装件的剖面图，它是通过将半导体器件引线连接于图1中所示插入器而形成的；
图12是半导体封装件的剖面图，它是通过再将图10中所示半导体封装件安装于组件基底上而形成的；
图13是图12中所示半导体封装件的剖面图，其中安装端直接连至组件基底的连接片而不使用焊接连接台；
图14是根据本发明第二实施例的插入器的放大剖面图；
图15A至15H是制造过程中图14中所示插入器的剖面图；
图16是插入器的剖面图，它是图14中所示插入器的变动方案；及
图17是包括图14中所示插入器的半导体封装件的剖面图。
具体实施方式
现在参照图1描述一个插入器，它是根据本发明第一实施例的半导体器件基底。图1是根据本发明第一实施例的插入器1的放大剖面图。
图1中所示插入器1包括一个硅基底2，一个形成于硅基底2的顶表面上的多层布线层4以及多个自硅基底2的下表面伸出的安装端6。一个半导体元件被安装于插入器1的布线层4的上半侧，从而形成一个半导体封装件。半导体封装件通过自硅基底2下表面伸出的安装端6被倒装地安装于一个电路板上。
安装端6由一层导电层形成，及其外形是如图2中所示的棱锥形状。棱锥形状的顶端部分自硅基底2的下表面中伸出。每个安装端6具有一个对应于凹下部分外形的外形(逆棱锥形状)，它是通过从平面(100)侧蚀刻硅基底2及在平面(111)与其他平面之间使用不同蚀刻率(如图3A和3B中所示)而获得的。下面将详细地解释安装端6的形成方法。
在硅基底2顶表面侧形成的多层布线层4具有一个多层结构，它包含被形成为布线图形的导电层8-1、8-2和8-3及在各导电层之间起着绝缘作用的绝缘层10-1、10-2、10-3和10-4。导电层8-1、8-2和8-3及自安装端6的根部伸出的导电层6-1通过通孔12连接。如此一来，在最上层的导电层8-3中形成的连接片14在电气上连至相应的安装端6。
应该注意到，以上所述多层布线层4的多层布线结构与现有有机细微基底的多层布线结构相同，因此将省略其详细描述。此外，在硅基底的顶表面和每个其中形成安装端的凹下部分的内表面上形成一层氧化硅薄膜16，用作绝缘层。氧化硅薄膜18也形成于硅基底2的下表面上，用作一层绝缘层。应该注意到，可以形成一层有机绝缘薄膜以替代氧化硅薄膜。
应该注意到，在本实施例中，硅基底2的厚度大约为30μm，及构成安装端6的导电层的厚度等于或大于5μm。安装端6的间距大约为200μm(150μm)，及每个安装端6的末端从硅基底2背面伸出的长度大约为40μm。
现在参照图4和图5A至5I描述根据本发明的插入器1的一种制造方法。图4是用于解释插入器1的制造过程的解释图。图5A至5I是图4中所示各步骤中插入器1的剖面图。
首先，准备一个在其上具有氧化硅薄膜的厚度为650mc的硅基底，并且在步骤1中在硅基底的顶表面上形成一层抗蚀层。然后通过形成抗蚀层的图形而形成对应于其中形成安装端6的每个凹下部分2a的图形的开口。其次，在步骤2中，使用腐蚀剂例如40％KOH溶液将硅基底2蚀刻以便形成凹下部分2a(参照图5A)。在本实施例中，使用具有平行于晶体平面(001)的平面的硅基底2。因此，当硅基底2被从前表面侧蚀刻时，在硅基底的晶体平面(111)与其他平面之间使用不同蚀刻率(例如，(110)∶(111)＝180∶1)而形成具有逆棱锥形状的凹下部分2a。
其次，在步骤3中将抗蚀剂去除，而在步骤4中形成氧化硅薄膜(SiO2)，用作硅基底2前表面上的绝缘层。由于氧化硅薄膜是由热处理形成的，在硅基底2的整个表面上形成氧化硅薄膜，包括前表面、凹下部分2a的内表面和硅基底2的背面。可以通过化学蒸汽淀积(CVD)方法形成氧化硅薄膜。然后在步骤5中，使用溅射或无电极电镀在硅基底2的前表面上和凹下部分2a的内表面上形成的氧化硅薄膜上形成厚度为1μm或更薄的种子金属层(参照图5B)。该种子金属层最好使用铬(Cr)或钛(Ti)的溅射而形成。
其次，在步骤6中，在种子金属层上形成一层抗蚀层，该抗蚀层如此定形以便形成安装端6和导电层6-1。然后在步骤7中，在种子金属层上形成一层由金属制成的导电层。在本实施例中，使用Cu电解电镀形成铜的导电层(参照图5C)。该导电层对应于安装端6和导电层6-1，及该导电层的厚度大约为5μm。由于该导电层沿着每个凹下部分2a的内表面形成，安装端6的外形成为棱锥形状。
其次，在步骤8中去除抗蚀剂，及在步骤9中通过蚀刻将存在于所去除的抗蚀剂之下的种子金属层去除。由于种子金属层具有小的厚度，轻度蚀刻已经足够。然后在步骤10中，在硅基底2的前表面侧上形成一层绝缘层10-1，及在形成通孔12的位置处形成通孔(参照图5E)。使用聚酰亚胺或苯环丁烯(BCD)的旋涂来形成绝缘层10-1。
其次，在步骤11中，通过在绝缘层10-1上溅射而形成一层种子金属层，并且在步骤12中在种子金属层上形成和定形一层抗蚀层。然后在步骤13中，使用金属镀敷(铜电解电镀)形成一层对应于电路图形的导电层8-1。与此同时也形成用于在电气上连接导电层8-1与导电层6-1的通孔12。然后在步骤14中去除抗蚀剂及在步骤15中将种子金属蚀刻(参照图5F)。
通过重复以上所述步骤10至15而形成多层布线层4(参照图5G)。在形成必要的多层结构之后，在步骤17中将镍电镀和金电镀用于在顶层(本实施例中的导电层8-3)中形成的连接片14上。
其次，在步骤17中使用磨蚀剂或磨石(背磨削)将硅基底的背面磨削。与此同时，对在硅基底2中形成的安装端6的顶端稍微进行磨削。然后在步骤18中，使用等离子体气体进行乾蚀刻以便只选择性地去除硅基底2和氧化硅薄膜，从而暴露安装端6的顶端(参照图5H)。在此过程中，同时也去除依附于安装端6顶端的(在步骤4中形成的)氧化硅薄膜。附加地，最后将硅基底2的厚度设置为大约30μm。然后在步骤19中，使用CVD在硅基底2的背面上形成一层用作绝缘膜的氧化硅薄膜18。
在以上所述过程中，在晶片状硅基底2上集合地形成多个插入器1，通过将硅基底2切割成个别插入器1而完成图1中所示插入器1。
此处，如图6A中所示，可以将硅基底2的背面暴露而不在步骤19中形成氧化硅薄膜18。步骤19中形成绝缘膜的理由是为了避免安装端6的暴露的顶端和硅基底2背面之间的短路。然而，由于氧化硅薄膜16用作绝缘层被插入于安装端6和硅基底2之间，即使硅基底2的背面未被绝缘层覆盖，该薄膜16也能维持一定水平的绝缘。此外，如图6B中所示，可以通过旋涂方法或类似方法形成一层有机绝缘薄膜18A以替代氧化硅薄膜18。
现在描述使用以上所述插入器1形成一个半导体封装件的例子。
图7是一个半导体封装件的剖面图，它是通过将一个半导体器件安装于插入器1的安装端6上而形成的。焊接连接台22被形成于半导体器件20的电极端点20a上，这些焊接连接台22被连至插入器1的安装端6。由于每个安装端是棱锥的顶端并且被制成为尖锐的，只需将焊接连接台推压即可使安装端6伸入焊接连接台22内，从而得到一个良好电气接触。应该注意到，可以使用金连接台以替代焊接连接台。在此状态下，一种充填材料24被填入插入器1和半导体器件20之间以便将插入器1固定于半导体器件20上。
此外，如图8中所示，安装端6可以直接连至半导体器件20的电极片20a。在此情况下，一种软金属膜用作电极表面上的金属(安装端6)，而在软金属膜与电极片20接触之后，使用充填材料固定插入器1。即使在此情况下，由于具有尖锐顶端的安装端6的动作，也能得到安装端6与电极片20之间的良好电气接触。
此外，图7和8中所示半导体封装件能够进一步被安装于一个组件基底30上以便形成一个半导体封装件。图9是半导体封装件的剖面图，它是通过将图7的半导体封装件安装于一个组件基底30上而形成的。对于组件基底30而言，能够使用不同基底，例如玻璃磁基底、铝基底、装配成的基底、FR-4基底和有机基底例如BT基底。此外，在插入器1作为缓冲基底被安装于组件基底30上之后，通过在插入器1和组件基底30之间充填一种充填材料28而将包含插入器1的半导体封装件固定于组件基底30上。如图9中所示，即使半导体元件的电极片的数量很大及电极片具有细微结构，也能够将插入器1用作一个缓冲基底来形成半导体封装件而不需在组件基底上提供细微布线。
图10是半导体封装件的剖面图，它是通过将半导体器件20倒装于图1中所示插入器1的连接片14的一侧而形成的。半导体器件20的电极片20a和插入器1的连接片14由焊接球26彼此连接在一起。焊接球26可以预先提供于半导体器件20的电极片20a上，或者提供于插入器1的连接片14上。在图10中所示半导体封装件的情况下，使用安装端6将半导体封装件安装于电路板例如一个母板上。
图11是半导体封装件的剖面图，它是通过将半导体器件20引线连接于插入器1的连接片14上而形成的。半导体器件20以面向上的状态被安装于插入器1的多层布线层4上并且由银膏32或类似材料固定住。然后使用引线34例如金线将半导体器件20的电极片20a和插入器1的连接片14在电气上连接在一起。虽然由一个引线密封树脂36将半导体器件20和金线34包装在一起，但它也可由传递模塑法加以包装。应该注意到，虽然图10和11显示的例子只安装单个半导体元件，但也可以安装多个半导体元件。
图12是半导体封装件的剖面图，它是通过再将图10中所示半导体封装件安装于组件基底30而形成的。在图12中所示例子中，插入器1的安装端6和组件基底30的连接片30a通过焊接连接台38连接在一起。焊接连接台38可以预先提供给安装端6，或者提供给组件基底30的连接片30a。此外，金(Au)连接台可用于替代焊接连接台。通过事先在连接片30a上形成焊接连接台38，能够只将安装端6压向焊接连接台以使安装端6的末端伸入焊接连接台即可获得良好电气连接。
图13是图12中所示半导体封装件的剖面图，其中安装端6直接连至组件基底30的连接片30a而不使用焊接连接台。在此情况下，能够使安装端6的顶端伸入组件基底30的连接片而获得足够的电气连接。
现在参照图14和15A至15H描述根据本发明第二实施例的半导体器件基底。图14是根据本发明第二实施例的插入器的放大剖面图。图15A至15H是制造过程中图14中所示插入器40的剖面图。在图14和15A至15H中，与图1中所示相同部件被赋予相同参考数字，同时省略对其的描述。
根据本发明第二实施例的插入器40所具有的结构中多层布线层4A被形成于图1中所示插入器1中硅基底2的背面侧上。因此安装端6的顶端伸入多层布线层4A，以及沿着硅基底凹下部分2a的内表面形成的部分用作外部连接端点。
在图15A至15H中所示制造过程中，图15A至15D中所示过程对应于图5A至5D中所示过程。然而，在图15C中导电层只形成于用作安装端6的部分中，而不形成导电层6-1。
在本实施例中，在硅基底2上形成安装端6之后紧接着立即完成背磨削和化学蚀刻，如图15E中所示。此过程能够以与图5H相同的方式完成。如此一来，安装端的顶端自硅基底2的背面伸出。其次，如图15F中所示，氧化硅薄膜18被形成于硅基底2的背面，用作一层绝缘膜。一层有机绝缘膜能够被形成以替代氧化硅薄膜。
然后，如图15G中所示，使用一个由硅基底2背面上定形的抗蚀层所形成的掩模在硅基底2的背面上形成一层导电层42。导电层42被形成为连至安装端6的顶端的图形布线。然后，如图15H中所示，多层布线层4A被形成于导电层42上以便在最上部分中形成连接片14，从而完成图14中所示插入器40。应该注意到，虽然图14中所示多层布线层4A具有三层结构，但该层4A能够具有四层结构，如同图1中所示多层布线层4，或者可以是一个层次结构，具有任意数量的层次。
图16是插入器40A的剖面图，它是图14中所示插入器的变动方案。在插入器40A中，多层布线层4A-1的导电层8-1和安装端6通过通孔12相连而不需提供导电层42。
图17是包括图14中所示插入器的半导体封装件的剖面图。半导体器件20通过插入器40被安装于组件基底30上。也即，半导体器件20的电极片20a由焊接连接台22连至插入器40的连接片14，及半导体器件20和插入器40由被充填于其中的充填材料24彼此固定住。此外，插入器40的安装端6和组件基底30的连接片30a通过焊接连接台26被连接，及插入器40和组件基底30由被充填于其中的充填材料彼此固定住。由于焊接球被容纳于棱锥形状安装端6之内，其接触面积是大的，从而提供一个肯定的接触。
在以上所述实施例中，硅基底用作插入器的基底，及使用蚀刻方法形成棱锥形状凹下部分，从而形成具有对应的棱锥形状的安装端。本发明不限于硅基底，而能够使用任何基底，只要它易于形成具有棱锥形状的凹下部分即可，这些包括三角状棱锥、五角状棱锥或其他多角形棱锥。然而，凹下部分的图形不限于棱锥形状，而可以使用一个具有相对地较大的顶角角度的圆锥形图形。
本发明不限于这些具体地公开的实施例，而可以在不背离本发明的范围的情况下作出变动和修改。

Claims (18)

1.一种半导体器件基底，包括：
一个具有一个第一表面和在位于第一表面背面的一个第二表面的硅基底；
至少一个具有棱锥形状并且延伸于所述第一和第二表面之间的安装端，所述安装端的一端自所述第一和第二表面中的一个伸出；及
一层在所述硅基底的所述第一表面上形成的布线层，所述布线层包括电连接至所述安装端的一个导电层。
2.如权利要求1中所要求的半导体器件基底，其中一层由氧化硅薄膜形成的绝缘膜被插入于所述安装端与所述硅基底之间。
3.如权利要求1中所要求的半导体器件基底，其中所述硅基底的所述第一表面被一层由有机绝缘膜所形成的绝缘层所覆盖。
4.如权利要求1中所要求的半导体器件基底，其中所述硅基底的所述第二表面被一层由有机绝缘膜所形成的绝缘层所覆盖。
5.如权利要求1中所要求的半导体器件基底，其中所述布线层具有一个多层结构，其中绝缘层和导电层被交替地叠加。
6.如权利要求1中所要求的半导体器件基底，其中所述安装端的棱锥形状由所述硅基底的晶体平面所形成。
7.如权利要求6中所要求的半导体器件基底，其中所述硅基底的所述第一和第二平面基本上平行于硅晶体的(001)平面。
8.如权利要求7中所要求的半导体器件基底，其中所述安装端具有一个空棱锥形状。
9.如权利要求1中所要求的半导体器件基底，其中所述安装端的一个顶端自所述硅基底的所述第二表面中伸出。
10.一种半导体器件基底的制造方法，包括以下步骤：
在一个硅基底的一个第一表面上形成一个棱锥形状的凹下部分；
在硅基底的该第一表面和该凹下部分的一个内表面上形成一绝缘膜；
在所述凹下部分中形成一导电层，该导电层被配置和设置成为一个安装端；
在所述硅基底的所述第一表面上形成一布线层，所述布线层包括电连接至所述凹下部分中的所述导电层的一导电层；及
从位于所述硅基底的所述第一表面背面的一个第二表面中去除所述硅基底以便使在所述凹下部分内的导电层以一种伸出的状态得到暴露。
11.如权利要求10中所要求的方法，其中形成凹下部分的步骤包括一个通过蚀刻处理去除所述硅基底的预定部分而形成棱锥形状的步骤。
12.如权利要求10中所要求的方法，还包括以下步骤：在去除硅基底的步骤之后，在位于所述硅基底的所述第一表面背面的第二表面上形成一层绝缘膜。
13.如权利要求12中所要求的方法，其中在第二表面上形成一层绝缘膜的步骤包括一个在第二表面上形成一层氧化硅薄膜的步骤。
14.如权利要求12中所要求的方法，其中在第二表面上形成一层绝缘膜的步骤包括一个在第二表面上形成一层有机绝缘膜的步骤。
15.如权利要求10中所要求的方法，其中去除的步骤包括：
将所述硅基底的第二表面磨削的第一步骤；及
在第一步骤之后通过蚀刻去除所述硅基底以使所述安装端的一端从被蚀刻的表面伸出的第二步骤。
16.一种半导体封装件，包括：
一个半导体器件基底；及
一个半导体元件，它具有至少一个形成于其一个电极连接台上的金属凸起部，
其中所述半导体器件基底包括：
一个具有第一表面和位于第一表面背面的第二表面的硅基底；
至少一个具有棱锥形状并且延伸于所述第一和第二表面之间的安装端，所述安装端的一端自所述第一和第二表面中的一个伸出；及
在所述硅基底的所述第一表面上形成的一布线层，该布线层包括一层电连接至该安装端的一导电层，
其中所述半导体器件基底的所述安装端的一端在所述安装端的该端突出至金属凸起部内的状态下被连至所述金属凸起部。
17.一种半导体封装件包括：
一个半导体器件基底；及
一个半导体元件，它具有至少一个形成于其一个电极连接台上的金属凸起部，
其中所述半导体器件基底包括：
一个具有第一表面和位于第一表面背面的第二表面的硅基底；
至少一个具有棱锥形状并且延伸于所述第一和第二表面之间的安装端，所述安装端的一端自所述第一和第二表面中的一个伸出；及
在所述硅基底的所述第一表面上形成的一布线层，该布线层包括一层电连接至该安装端的一导电层，
其中所述半导体元件被安装于所述半导体器件基底的该布线层上，且具有一种棱锥形状的所述安装端用作一个外部连接端。
18.一种半导体封装件，包括：
一个半导体元件；
一个具有一个第一表面和在位于所述第一表面背面的一个第二表面的硅基底，该半导体元件被安装于第一表面上；及
一个面向所述半导体器件基底的第二表面并且通过所述半导体器件基底而电连接至所述半导体元件的封装件基底，
其中所述半导体器件基底包括：
一个具有第一表面和位于第一表面背面的第二表面的硅基底；
至少一个具有棱锥形状并且延伸于所述第一和第二表面之间的安装端，所述安装端的一端自所述第一和第二表面中的一个伸出；及
在所述硅基底的所述第一表面上形成的一布线层，该布线层包括一电连接至该安装端的一导电层。
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