KR100824635B1 - 시스템 인 패키지를 이용한 인덕터 제조 방법 - Google Patents
시스템 인 패키지를 이용한 인덕터 제조 방법 Download PDFInfo
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- KR100824635B1 KR100824635B1 KR1020060088426A KR20060088426A KR100824635B1 KR 100824635 B1 KR100824635 B1 KR 100824635B1 KR 1020060088426 A KR1020060088426 A KR 1020060088426A KR 20060088426 A KR20060088426 A KR 20060088426A KR 100824635 B1 KR100824635 B1 KR 100824635B1
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- inductor
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- 238000000034 method Methods 0.000 title claims abstract description 21
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 19
- 239000002184 metal Substances 0.000 claims abstract description 27
- 229910052751 metal Inorganic materials 0.000 claims abstract description 27
- 239000000758 substrate Substances 0.000 claims abstract description 16
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 14
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 14
- 239000010703 silicon Substances 0.000 claims abstract description 14
- 238000000151 deposition Methods 0.000 claims abstract description 13
- 230000004888 barrier function Effects 0.000 claims abstract description 10
- 239000007769 metal material Substances 0.000 claims abstract description 8
- 238000000059 patterning Methods 0.000 claims abstract description 6
- 230000001681 protective effect Effects 0.000 claims abstract description 4
- 238000000227 grinding Methods 0.000 claims abstract description 3
- 150000001875 compounds Chemical class 0.000 claims description 21
- 238000005229 chemical vapour deposition Methods 0.000 claims description 14
- 239000010408 film Substances 0.000 claims description 14
- 229910052721 tungsten Inorganic materials 0.000 claims description 14
- 238000005240 physical vapour deposition Methods 0.000 claims description 13
- 238000000231 atomic layer deposition Methods 0.000 claims description 11
- 229910052802 copper Inorganic materials 0.000 claims description 9
- 238000007736 thin film deposition technique Methods 0.000 claims description 9
- 238000001704 evaporation Methods 0.000 claims description 7
- 230000008020 evaporation Effects 0.000 claims description 7
- 238000004544 sputter deposition Methods 0.000 claims description 7
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 6
- 229910052759 nickel Inorganic materials 0.000 claims description 6
- 238000000608 laser ablation Methods 0.000 claims description 4
- 238000005498 polishing Methods 0.000 claims description 4
- 239000000126 substance Substances 0.000 claims description 4
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 3
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 claims description 3
- 239000005380 borophosphosilicate glass Substances 0.000 claims description 3
- 150000004767 nitrides Chemical class 0.000 claims description 3
- 229910052715 tantalum Inorganic materials 0.000 claims description 3
- 230000008021 deposition Effects 0.000 claims 1
- 239000012808 vapor phase Substances 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 abstract description 5
- 230000003071 parasitic effect Effects 0.000 description 6
- 239000010949 copper Substances 0.000 description 5
- 239000000463 material Substances 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F41/00—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
- H01F41/02—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets
- H01F41/04—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets for manufacturing coils
- H01F41/041—Printed circuit coils
- H01F41/042—Printed circuit coils by thin film techniques
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/4902—Electromagnet, transformer or inductor
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/4902—Electromagnet, transformer or inductor
- Y10T29/49069—Data storage inductor or core
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49156—Manufacturing circuit on or in base with selective destruction of conductive paths
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Coils Or Transformers For Communication (AREA)
Abstract
Description
Claims (6)
- 인덕터의 제조 방법에 있어서,(a) 실리콘 기판을 패터닝하여 제1 관통홀을 형성하고, 상기 제1 관통홀 내벽에 배리어 메탈을 증착한 후, 금속물질을 매립하고 평탄화하여 제1 관통전극을 형성하는 단계;(b) 상기 제1 관통전극이 형성된 실리콘 기판 상에 절연막을 증착하고, 상기 절연막을 패터닝하여 상기 제1 관통홀과 어라인되는 제2 관통홀 및 인덕터홀을 형성하는 단계;(c) 상기 제2 관통홀 및 상기 인덕터홀의 내벽에 배리어 메탈을 증착한 후, 금속물질을 매립하고 평탄화하여 제2 관통전극 및 인덕터를 형성하는 단계; 및(d) 상기 절연막 상에 보호막을 증착하고, 백 그라인드(Back Grind) 공정을 통하여 상기 실리콘 기판의 하부에 상기 제1 관통전극이 드러나도록 하는 단계를 포함하는 것을 특징으로 하는 시스템 인 패키지를 이용한 인덕터의 제조 방법.
- 제1항에서,상기 제1 관통홀의 깊이는 50~500 ㎛이고, 상기 제1 관통홀의 CD는 1~10 ㎛인 것을 특징으로 하는 시스템 인 패키지를 이용한 인덕터의 제조 방법.
- 제1항에서,상기 배리어 메탈은 Ti, TiN, Ti/TiN, Ta, TaN, Ta/TaN, TaN/Ta, Co, Co 화합물, Ni, Ni 화합물, W, W 화합물, 질화물 중 적어도 하나 이상을 포함하며, 물리 기상 증착(PVD: Physical Vapor Deposition), 스퍼터링(Sputtering), 증발(Evaporation), 레이저 박리(Laser Ablation), 원자층 증착(ALD: Atomic Layer Deposition) 및 화학 기상 증착(CVD: Chemical Vapor Deposition) 중 하나의 금속 박막 증착 방법을 이용하여 20~1000 Å 두께로 증착하는 것을 특징으로 하는 시스템 인 패키지를 이용한 인덕터의 제조 방법.
- 제1항에서, 상기 단계 (a)는,상기 제1 관통홀에 PVD, 스퍼터링, 증발, 레이저 박리, ECP, ALD 및 CVD 중 하나의 금속 박막 증착 방법을 이용하여 Al, Al 화합물, Cu, Cu 화합물, W, W 화합물 중 하나 이상을 포함하는 금속물질을 평판 기준으로 50~900 ㎛ 두께로 매립하고, CMP(Chemical Mechanical Polishing), 에치백(Etch Back) 중 하나의 공정을 이용하여 평탄화함으로써, 상기 제1 관통전극을 형성하는 것을 특징으로 하는 시스템 인 패키지를 이용한 인덕터의 제조 방법.
- 제1항에서,상기 절연막은 SiO2, BPSG, TEOS, SiN 및 Low-k 중 하나 이상을 포함하며, 전기로, CVD 및 PVD 중 하나의 금속 박막 증착 방법을 이용하여 1~10 ㎛ 두께로 증착하는 것을 특징으로 하는 시스템 인 패키지를 이용한 인덕터의 제조 방법.
- 제1항에서, 상기 단계 (c)는,상기 제2 관통홀 및 상기 인덕터홀에 PVD, 스퍼터링, 증발, 레이저 박리, ECP, ALD 및 CVD 중 하나의 금속 박막 증착 방법을 이용하여 Al, Al 화합물, Cu, Cu 화합물, W, W 화합물 중 하나 이상을 포함하는 금속물질을 평판 기준으로 2~20 ㎛ 두께로 매립하고, CMP(Chemical Mechanical Polishing), 에치백(Etch Back) 중 하나의 금속 박막 증착 방법을 이용하여 평탄화함으로써, 상기 제2 관통전극 및 상기 인덕터를 형성하는 것을 특징으로 하는 시스템 인 패키지를 이용한 인덕터의 제조 방법.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020060088426A KR100824635B1 (ko) | 2006-09-13 | 2006-09-13 | 시스템 인 패키지를 이용한 인덕터 제조 방법 |
TW096133051A TW200814103A (en) | 2006-09-13 | 2007-09-05 | Method of manufacturing inductor |
US11/896,663 US7568278B2 (en) | 2006-09-13 | 2007-09-05 | Method of manufacturing inductor |
CNA2007101456810A CN101145511A (zh) | 2006-09-13 | 2007-09-13 | 制造感应器的方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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KR1020060088426A KR100824635B1 (ko) | 2006-09-13 | 2006-09-13 | 시스템 인 패키지를 이용한 인덕터 제조 방법 |
Publications (2)
Publication Number | Publication Date |
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KR20080024277A KR20080024277A (ko) | 2008-03-18 |
KR100824635B1 true KR100824635B1 (ko) | 2008-04-24 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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KR1020060088426A KR100824635B1 (ko) | 2006-09-13 | 2006-09-13 | 시스템 인 패키지를 이용한 인덕터 제조 방법 |
Country Status (4)
Country | Link |
---|---|
US (1) | US7568278B2 (ko) |
KR (1) | KR100824635B1 (ko) |
CN (1) | CN101145511A (ko) |
TW (1) | TW200814103A (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103919766A (zh) * | 2014-05-04 | 2014-07-16 | 杨献华 | 一种降低尿蛋白的药物组合物及其应用 |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100889553B1 (ko) * | 2007-07-23 | 2009-03-23 | 주식회사 동부하이텍 | 시스템 인 패키지 및 그 제조 방법 |
KR100982037B1 (ko) | 2009-12-14 | 2010-09-13 | 주식회사 아나패스 | 신호 생성 장치 |
KR101128892B1 (ko) * | 2010-05-14 | 2012-03-27 | 주식회사 하이닉스반도체 | 반도체 장치 및 그 제조 방법 |
US20120319293A1 (en) * | 2011-06-17 | 2012-12-20 | Bok Eng Cheah | Microelectronic device, stacked die package and computing system containing same, method of manufacturing a multi-channel communication pathway in same, and method of enabling electrical communication between components of a stacked-die package |
CN103390543B (zh) * | 2013-07-26 | 2017-11-24 | 上海华虹宏力半导体制造有限公司 | 一种增加电感的表面面积的方法 |
KR102163056B1 (ko) * | 2015-12-30 | 2020-10-08 | 삼성전기주식회사 | 코일 전자 부품 및 그 제조방법 |
CN110349835B (zh) * | 2018-04-04 | 2022-04-19 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件的制造方法和半导体器件 |
Citations (4)
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JPH09307059A (ja) * | 1996-05-16 | 1997-11-28 | Toshiba Corp | モノリシック集積回路 |
JP2002110908A (ja) | 2000-09-28 | 2002-04-12 | Toshiba Corp | スパイラルインダクタおよびこれを備える半導体集積回路装置の製造方法 |
US6737727B2 (en) | 2001-01-12 | 2004-05-18 | International Business Machines Corporation | Electronic structures with reduced capacitance |
KR20050067820A (ko) * | 2003-12-29 | 2005-07-05 | 매그나칩 반도체 유한회사 | 고주파 소자 및 그 제조 방법 |
Family Cites Families (5)
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US5756395A (en) * | 1995-08-18 | 1998-05-26 | Lsi Logic Corporation | Process for forming metal interconnect structures for use with integrated circuit devices to form integrated circuit structures |
JP4044769B2 (ja) * | 2002-02-22 | 2008-02-06 | 富士通株式会社 | 半導体装置用基板及びその製造方法及び半導体パッケージ |
JP4439976B2 (ja) * | 2004-03-31 | 2010-03-24 | Necエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
KR100650907B1 (ko) * | 2005-12-29 | 2006-11-28 | 동부일렉트로닉스 주식회사 | 구리 금속으로 된 집적회로 인덕터 및 그 제조 방법 |
JP2007294652A (ja) * | 2006-04-25 | 2007-11-08 | Matsushita Electric Ind Co Ltd | 半導体集積回路装置及びその製造方法 |
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2006
- 2006-09-13 KR KR1020060088426A patent/KR100824635B1/ko active IP Right Grant
-
2007
- 2007-09-05 US US11/896,663 patent/US7568278B2/en active Active
- 2007-09-05 TW TW096133051A patent/TW200814103A/zh unknown
- 2007-09-13 CN CNA2007101456810A patent/CN101145511A/zh active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH09307059A (ja) * | 1996-05-16 | 1997-11-28 | Toshiba Corp | モノリシック集積回路 |
JP2002110908A (ja) | 2000-09-28 | 2002-04-12 | Toshiba Corp | スパイラルインダクタおよびこれを備える半導体集積回路装置の製造方法 |
US6737727B2 (en) | 2001-01-12 | 2004-05-18 | International Business Machines Corporation | Electronic structures with reduced capacitance |
KR20050067820A (ko) * | 2003-12-29 | 2005-07-05 | 매그나칩 반도체 유한회사 | 고주파 소자 및 그 제조 방법 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103919766A (zh) * | 2014-05-04 | 2014-07-16 | 杨献华 | 一种降低尿蛋白的药物组合物及其应用 |
Also Published As
Publication number | Publication date |
---|---|
CN101145511A (zh) | 2008-03-19 |
KR20080024277A (ko) | 2008-03-18 |
US20080060185A1 (en) | 2008-03-13 |
US7568278B2 (en) | 2009-08-04 |
TW200814103A (en) | 2008-03-16 |
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