CN1215742C - 印刷电路板的焊盘及其形成方法 - Google Patents
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Abstract
一种形成在具有电路图形的印刷电路板上的焊盘,包括:形成在印刷电路板上且电连接到电路图形的多个铜图形;填充在铜图形之间的空间并使得暴露出铜图形上表面能暴露出的填充物;以及施加在铜图形的上表面的镀层。通过防止镍镀层和金镀层在它们形成于铜图形上时从铜图形下部凸出,来减小金属丝焊盘之间的间隔。
Description
技术领域
本发明涉及印刷电路板(PCB),更具体地,涉及适用于高密度排列的精细电路图形的半导体封装的印刷电路板焊盘,以及它的制作方法。
背景技术
通常,由于电子设备具有较高的容量并且是多功能的,以及在大小尺寸上变得更紧凑,因此安装在电子设备中的半导体封装也就变小了。因此,已经开发了球栅阵列(BGA)形式的半导体封装,它通过把焊球固定在半导体封装的印刷电路板的上表面来使用的,取代了朝半导体封装外延伸出的外部引线。下面将参考图1对之进行介绍。
图1是显示根据常规技术用于制作BGA形式的封装的印刷电路板组件的平面图。
如图1所示,印刷电路板(PCB)组件1包括制成在PCB1中央的插座2,以把半导体芯片(未示出)安放其上;制成在空穴2外侧的焊盘3,它通过金丝(未示出)连接到半导体芯片;以及形成在焊盘3外部的多个外部终端焊盘(亦即,这里是球形凸起焊盘)4,它连接到形成在PCB1中的电路图形(未示出)。
亦即,在集成半导体封装时,半导体芯片被固定到形成在PCB1中央的插座2中,固定好的半导体芯片和焊盘3通过金丝(未示出)连接,这样半导体芯片和PCB1就被电连接在一起。
之后,为了保护半导体芯片,要用环氧化合物来固化半导体芯片和金丝。
现在将参考图2描述焊盘3。
图2是显示了根据常规技术的一种焊盘的放大视图。
如图所示,焊盘3暴露在外,在连接到焊盘3的电路图形5上施加光阻焊剂(photo solder resist)。PSR 6的施加用于保护电路图形5。
现在将参考图3详细描述焊盘3。
图3显示了沿着图2的焊盘的直线A-A’所作的截面图。
如图3所示,焊盘3包括在PCB1上表面施加绝缘层7,形成在绝缘层7的上表面的铜图形8,依次形成在铜图形8上表面的镍镀层9以及金镀层10。
铜图形8是通过使用通常的蚀刻工艺在铜箔层压片(CCL)上除去不需要的部分而形成的,CCL是通过把铜金属箔广泛地粘附在其中形成有绝缘层7的PCB1的一面或两面而制成的,现在将详细描述。
首先,通过使用粘合剂12铜金属箔被粘附在绝缘层7的上表面。此时,为了提高粘合剂的粘着强度,绝缘层7的表面被制作成粗糙的。凹凸部11形成在铜金属箔的下表面。并且,为了提高粘附的强度,在凹凸部11的表面上形成了铬(Cr)薄膜13。然后,通过使用粘合剂12,将铜金属箔粘附在绝缘层7的下表面。
之后,镍镀层9和金镀层10依次被形成在铜图形8的上表面上,因此就完成了焊盘3。
但是,在根据常规技术通过蚀刻工艺除去铜金属箔以形成焊盘3时,铬成分将仍然留在铜图形8左边和右边较低的部分中。亦即,残留的铬成分将从铜图形8左边和右边较低的部分中凸出。此时,当镍镀层9和金镀层10依次形成在铜图形8的上时,所形成的镍镀层9和金镀层10覆盖铜图形8上表面及铜图形8两侧面的外侧。
此时,镍镀层9和金镀层10也形成在如图2的‘L’所示的凸起铬表面上。
因此,由于镍镀层9和金镀层10凸起地形成在铜图形8左边和右边较低的部分,所以相邻的焊盘8之间的空间就变得狭窄,这样就限制了形成焊盘3较细的间距。
例如,由于镀层(L)不是凸起地形成在铜图形8上面的左边和右边的部分,因此可以减小相邻的金属丝焊盘之间的间隔。但是在它移到铜图形8的下部时,由于相邻铜图形下面的左边和右边之间的距离要小于相邻铜图形上面的左边和右边之间的距离,因此就不可能减小相邻焊盘之间的距离。
如上所述,根据常规技术的用于半导体封装的PCB焊盘具有如下的问题:由于镍镀层9和金镀层10形成在残留铬表面上,残留铬凸出地从形成在焊盘内的铜图形8的左下和右下两侧形成,所以就不可能减小焊盘之间的间隔。
发明内容
因此,本发明的一个目的是提供一种印刷电路板(PCB)的焊盘,它能够通过防止镍镀层和金镀层在它们形成在铜图形上时从铜图形下部凸出来减小金属丝焊盘之间的间隔,以及它的形成方法。
为了实现这些以及其他优点,并符合本发明的目的,按照这里所具体化的以及广泛描述的,提供了一种形成在包括具有电路图形的树脂衬底的印刷电路板上的焊盘,所述焊盘包括:形成在树脂衬底上且电连接到电路图形的多个铜图形;填充在铜图形之间的空间并使得暴露出铜图形的上表面的填充物;以及施加在铜图形的上表面的镀层,其中,所述镀层是镍镀层和金镀层,它们依次地形成在铜图形的上表面,所述金镀层形成在镍镀层的两个侧面和上表面。
为了实现上面的目的,还提供了印刷电路板(PCB)焊盘的形成方法,以在具有多个电路图形的印刷电路板上形成焊盘,其特征在于,所述焊盘形成方法包括以下步骤:在所述树脂衬底上形成多个铜图形,铜图形和印刷电路板上的电路图形电连接;将填充物填充入铜图形之间的空间,并使得铜图形的上表面能暴露出;以及在铜图形的上表面上施加镀层,其中,在施加镀层的步骤中,镍镀层和金镀层依次地形成在铜图形的上表面,金镀层形成在已形成于铜图形上的镍镀层的两个侧面和上表面。
通过下面结合附图将进行的对本发明的详细描述,将更清楚本发明前面的以及其他的目的、特征、方面和优点。
附图说明
所引入的附图片提供了对本发明的进一步理解,这些附图构成了本说明书的一部分,展示了本发明的实施例,并和描述一起为解释本发明的原理服务。
附图中:
图1显示了根据常规技术的用于制作球栅阵列(BGA)封装的印刷电路板组件结构的平面图;
图2显示了根据常规技术的一种焊盘的放大视图;
图3显示了沿着图2的焊盘的直线A-A’所作的剖面图;
图4A至4E显示了根据本发明的用于制作半导体封装的印刷电路板组件焊盘形成方法的过程步骤;
图5显示了根据本发明填充物被填充在印刷电路板的电路图形之间的状态的剖面图。
具体实施方式
现在将详细地参见本发明的较佳实施例,附图展示了较佳实施例的例子。
根据本发明的较佳实施例的印刷电路板(PCB)焊盘特点是:在PCB的绝缘层上表面形成了多个铜图形,在铜图形之间填充了填充物并使得铜图形的上表面能暴露出来,在铜图形的表面上形成镍镀层,然后在镍镀层涂上金镀层,这样形成在铜的上表面上的镍镀层和金镀层不会从铜图形的下部凸出,因此减小了焊盘之间的间隔。
现在将参见图4A至4E描述根据本发明较佳实施例的PCB焊盘及其形成方法。
如图4A所示,在绝缘层22上形成了铜金属箔21。就铜金属箔而言,最好使用包铜箔层压片(CCL)。
接下来,如图4B所示,形成在绝缘层22上的铜金属箔通过蚀刻工艺被蚀刻,以形成铜图形(或者铜焊盘)23以及电路图形(未示出)。铜图形可以常规技术相同的方法来制成,铜图形23被形成为梯形状。亦即,当为了除去铜金属箔21的不需要的部分而把蚀刻溶液渗透入铜金属箔21时,铜金属箔21的上部和铜金属箔21的下部相比,要和蚀刻溶液接触更长的时间。这样,铜图形23的上部形成的宽度小于下部的宽度,因此它的形状大致是梯形的。形成梯形的现象通常被称为蚀刻因子,它指的是铜图形23的上部和下部之间的蚀刻比。
之后,如图4C,填充物24在铜图形23的侧部23b之间被填充到和铜图形23一样高。对于填充物24而言,最好使用红外固化的油墨或者阻焊剂,尤其是光阻焊剂(PSR)。在红外固化的油墨被固化之后,它具有比PSR更高的强度。这样,对于高级产品而言最好使用红外固化的油墨。
在由本发明的相同申请人提交的韩国专利申请号No.2001-31752和韩国专利申请号No.2001-51853(相应的美国专利申请号No.10/043146)中揭示了用于在铜图形23侧面之间填充填充物24的方法。
亦即,填充物24是通过直接用涂刷器和铜图形23接触来填充的。
使用该方法防止了在铜图形23之间填充的填充物24内生成气泡,并使得有可能在铜图形23的侧部23b之间的空间把填充物填充到和铜图形23一样高。
之后,铜图形23的上表面23a和填充物24的表面被净化,然后,可以按照需要在上面进行平滑表面或者给予合适的光照的过程。亦即,用填充物24填充铜图形23的侧面23b之间的空间,并密封该空间,以使得只暴露铜图形23的上表面23a。
之后,将在铜图形23上进行镍金的电镀。在进行镍金的电镀时,将在铜图形23暴露的上表面23a上形成镍镀层或者金镀层。现在将参考图4D和4E对此进行描述。
如图4D所示,在进行镍电镀或金电镀时,电溶液的镍分子首先被镀在铜图形23上,使得在铜图形23暴露的上表面23a上形成镍镀层25。此时,由于填充物24是绝缘材料,在填充物24的表面上将不会形成镍镀层25和金镀层26。
如图4E所示,在镍镀层25被镀在铜图形23暴露的上表面23a之后,将在镍镀层25的表面镀上金镀层26,因此完成焊盘30。亦即,由于填充物24覆盖了铜图形的侧面23b,并且只暴露了铜图形23的上表面23a,镍镀层25将只在铜图形23的上表面23a形成,而金镀层26将形成在镍镀层25整个的暴露表面上。在这点上,金镀层26将被形成地足够厚,以使得在安放了半导体芯片之后可以和连接到半导体芯片的金丝连接。这样,在镍镀层25侧面形成的金镀层26应该被形成得尽可能薄。镍镀层25形成的厚度约为3-7μm,而金镀层26形成的厚度约为0.5μm。
因此,所形成的金镀层26要大于铜图形23的上端部分或者镍镀层25的宽度。但是,由于形成在镍镀层25侧面的金镀层26的宽度小于或等于铜图形23的下端部分的宽度,因此可减小相邻焊盘3之间的间隔。
图5显示了根据本发明填充物被填充在印刷电路板的电路图形之间的状态的剖面图。
如图5所示,当填充物24被填充到铜图形23之间时,如果填充物24的填充高度与在形成在绝缘层22的上表面并连接到铜图形23的电路图形41和之后另外涂覆到电路图形41的上表面的PSR 43之间的电路图形41的高度一样高,那么PSR43可以被平滑地、具有统一高度地涂覆。
描述了这么多,本发明的印刷电路板的焊盘及其形成方法具有下列的优点。
亦即,半导体芯片被安装在印刷电路板上,用环氧造型化合物封装并固化,使得填充物以一种在铜图形的左侧和右侧以及电路图形中被完全填充的状态固化,从而可以稳固地支持铜图形和电路图形。因此,即使在重复高温和低温的热循环中有所改变,也可以防止可能由环氧造型化合物和印刷电路板绝缘层的热膨胀系数(CTE)差异造成的破裂。
由于在不离开本发明的要旨或必要特征的情况下,本发明可以多种形式实现,所以应该理解上述的实施例并不受前面的描述的任何限制,除非明确指出,否则可以在按照所附的权利要求中所定义的,要旨和范围内作出最宽泛的构建,因此所有改变和修改都落在权利要求的边界和界限内,或者这种边界和界限的等效内容都将被所附的权利要求所包括。
Claims (11)
1.一种形成在包括具有电路图形的树脂衬底的印刷电路板上的焊盘,其特征在于,所述焊盘包括:
形成在树脂衬底上且电连接到电路图形的多个铜图形;
填充在铜图形之间的空间并使得暴露出铜图形的上表面的填充物;以及施加在铜图形的上表面的镀层,
其中,所述镀层是镍镀层和金镀层,它们依次地形成在铜图形的上表面,所述金镀层形成在镍镀层的两个侧面和上表面。
2.如权利要求1所述的焊盘,其特征在于,镀层的宽度小于铜图形的宽度。
3.如权利要求1所述的焊盘,其特征在于,填充物只在铜图形的两侧面之间的空间填充,并使得铜图形的上表面能暴露出。
4.如权利要求1所述的焊盘,其特征在于,填充物填充的高度和铜图形的高度一样高。
5.如权利要求1所述的焊盘,其特征在于,填充物是红外固化的油墨或阻焊剂。
6.一种印刷电路板的焊盘形成方法,以在具有多个电路图形的印刷电路板上形成焊盘,其特征在于,所述焊盘形成方法包括以下步骤:
在所述树脂衬底上形成多个铜图形,铜图形和印刷电路板上的电路图形电连接;
将填充物填充入铜图形之间的空间,并使得铜图形的上表面能暴露出;以及在铜图形的上表面上施加镀层,
其中,在施加镀层的步骤中,镍镀层和金镀层依次地形成在铜图形的上表面,
金镀层形成在已形成于铜图形上的镍镀层的两个侧面和上表面。
7.如权利要求6所述的方法,其特征在于,镀层的宽度小于铜图形的宽度。
8.如权利要求6所述的方法,其特征在于,金镀层所形成的厚度薄于镍镀层。
9.如权利要求6所述的方法,其特征在于,填充物只在铜图形的两侧面之间的空间填充,并使得铜图形的上表面能暴露出。
10.如权利要求6所述的方法,其特征在于,填充物填充的高度和铜图形的高度一样高。
11.如权利要求6所述的方法,其特征在于,填充物是红外固化的油墨或阻焊剂。
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CN101399185B (zh) * | 2007-09-30 | 2011-07-06 | 中芯国际集成电路制造(上海)有限公司 | 保护金属层、形成焊盘、金属布线层及微反射镜面的方法 |
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CN1571626A (zh) | 2005-01-26 |
US6740352B2 (en) | 2004-05-25 |
CN1419401A (zh) | 2003-05-21 |
KR100396787B1 (ko) | 2003-09-02 |
US20040200638A1 (en) | 2004-10-14 |
KR20030039553A (ko) | 2003-05-22 |
US20030089521A1 (en) | 2003-05-15 |
US7257891B2 (en) | 2007-08-21 |
US7304249B2 (en) | 2007-12-04 |
TW561596B (en) | 2003-11-11 |
JP3776867B2 (ja) | 2006-05-17 |
US20040200726A1 (en) | 2004-10-14 |
CN100396167C (zh) | 2008-06-18 |
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