CN1197247C - 同步锁相环的方法、锁相环及具有锁相环的半导体器件 - Google Patents
同步锁相环的方法、锁相环及具有锁相环的半导体器件 Download PDFInfo
- Publication number
- CN1197247C CN1197247C CNB001336509A CN00133650A CN1197247C CN 1197247 C CN1197247 C CN 1197247C CN B001336509 A CNB001336509 A CN B001336509A CN 00133650 A CN00133650 A CN 00133650A CN 1197247 C CN1197247 C CN 1197247C
- Authority
- CN
- China
- Prior art keywords
- frequency
- phase
- control current
- locked loop
- current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 title claims abstract description 30
- 230000001360 synchronised effect Effects 0.000 title claims description 23
- 239000004065 semiconductor Substances 0.000 title abstract description 32
- 230000010355 oscillation Effects 0.000 claims abstract description 42
- 230000035945 sensitivity Effects 0.000 claims description 26
- 230000008859 change Effects 0.000 claims description 19
- 239000003607 modifier Substances 0.000 claims description 12
- JEIPFZHSYJVQDO-UHFFFAOYSA-N ferric oxide Chemical compound O=[Fe]O[Fe]=O JEIPFZHSYJVQDO-UHFFFAOYSA-N 0.000 claims description 9
- 238000007599 discharging Methods 0.000 claims description 3
- 238000009499 grossing Methods 0.000 abstract 1
- 238000004904 shortening Methods 0.000 abstract 1
- 239000003990 capacitor Substances 0.000 description 44
- 238000010586 diagram Methods 0.000 description 29
- 230000005540 biological transmission Effects 0.000 description 24
- 238000013461 design Methods 0.000 description 16
- 230000000694 effects Effects 0.000 description 15
- 230000006870 function Effects 0.000 description 15
- 230000015572 biosynthetic process Effects 0.000 description 8
- 230000008569 process Effects 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000013016 damping Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000010587 phase diagram Methods 0.000 description 3
- 238000004891 communication Methods 0.000 description 2
- 230000000630 rising effect Effects 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 230000003472 neutralizing effect Effects 0.000 description 1
- 230000001151 other effect Effects 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/0805—Details of the phase-locked loop the loop being adapted to provide an additional control signal for use outside the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
- H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
- H03L7/0895—Details of the current generators
- H03L7/0896—Details of the current generators the current generators being controlled by differential up-down pulses
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
- H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
- H03L7/0895—Details of the current generators
- H03L7/0898—Details of the current generators the source or sink current values being variable
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
Description
Claims (14)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP342525/1999 | 1999-12-01 | ||
JP34252599A JP3360667B2 (ja) | 1999-12-01 | 1999-12-01 | 位相同期ループの同期方法、位相同期ループ及び該位相同期ループを備えた半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1305266A CN1305266A (zh) | 2001-07-25 |
CN1197247C true CN1197247C (zh) | 2005-04-13 |
Family
ID=18354433
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB001336509A Expired - Fee Related CN1197247C (zh) | 1999-12-01 | 2000-11-30 | 同步锁相环的方法、锁相环及具有锁相环的半导体器件 |
Country Status (5)
Country | Link |
---|---|
US (1) | US6711229B1 (zh) |
EP (1) | EP1107457A3 (zh) |
JP (1) | JP3360667B2 (zh) |
KR (1) | KR100396095B1 (zh) |
CN (1) | CN1197247C (zh) |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3415570B2 (ja) | 2000-07-13 | 2003-06-09 | エヌイーシーマイクロシステム株式会社 | Crtモニタ用pllシステム |
JP2003110484A (ja) * | 2001-09-27 | 2003-04-11 | Sony Corp | 携帯通信端末、該携帯通信端末における通信方法、プログラムおよび該プログラムを記録した記録媒体 |
FI20030232A0 (fi) * | 2003-02-14 | 2003-02-14 | Nokia Corp | Radiolaite ja menetelmä häiriöiden vähentämiseksi radiolaitteessa |
KR100546344B1 (ko) | 2003-07-18 | 2006-01-26 | 학교법인고려중앙학원 | 다중 레벨 전압 전류 변환부를 갖는 위상 고정루프(Phase-Lock-Loop) 및 이를 이용한 클럭위상 동기 방법 |
US7184510B2 (en) * | 2003-09-26 | 2007-02-27 | Quicklogic Corporation | Differential charge pump |
US7352249B2 (en) * | 2003-10-03 | 2008-04-01 | Analog Devices, Inc. | Phase-locked loop bandwidth calibration circuit and method thereof |
US7038552B2 (en) * | 2003-10-07 | 2006-05-02 | Analog Devices, Inc. | Voltage controlled oscillator having improved phase noise |
US7167059B2 (en) * | 2004-04-08 | 2007-01-23 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Circuit for generating spread spectrum clock |
KR100642441B1 (ko) * | 2004-04-19 | 2006-11-06 | 주식회사 하이닉스반도체 | 반도체 메모리 소자의 제어 회로 |
US7053683B2 (en) * | 2004-05-27 | 2006-05-30 | Agere Systems Inc. | Voltage controlled oscillator with automatic band selector |
US7042260B2 (en) * | 2004-06-14 | 2006-05-09 | Micron Technology, Inc. | Low power and low timing jitter phase-lock loop and method |
WO2006087507A1 (en) * | 2004-09-20 | 2006-08-24 | Frontier Silicon Limited | Digital audio broadcast receiver |
US7427900B2 (en) * | 2004-12-30 | 2008-09-23 | Silicon Laboratories Inc. | Integrated PLL loop filter and charge pump |
US7970092B2 (en) * | 2005-11-22 | 2011-06-28 | Panasonic Corporation | Phase comparator and regulation circuit |
KR100833591B1 (ko) | 2006-12-27 | 2008-05-30 | 주식회사 하이닉스반도체 | 위상 동기 장치 및 위상 동기 신호 생성 방법 |
EP2119012B1 (en) * | 2007-01-30 | 2015-07-08 | Conversant Intellectual Property Management Inc. | Phase shifting in dll/pll |
JP4768645B2 (ja) * | 2007-02-16 | 2011-09-07 | パナソニック株式会社 | Pll回路、およびそれを備えた無線装置 |
CN101303823B (zh) * | 2007-05-09 | 2011-04-20 | 晨星半导体股份有限公司 | 电压提供电路以及其相关方法 |
KR100913400B1 (ko) * | 2007-07-24 | 2009-08-21 | 고려대학교 산학협력단 | 직렬 송수신 장치 및 그 통신 방법 |
US8044723B2 (en) * | 2007-09-14 | 2011-10-25 | Qualcomm Incorporated | Oscillator signal generation with spur mitigation in a wireless communication device |
JP4636107B2 (ja) | 2008-03-31 | 2011-02-23 | ソニー株式会社 | Pll回路 |
WO2012001846A1 (ja) * | 2010-06-28 | 2012-01-05 | パナソニック株式会社 | 基準周波数生成回路、半導体集積回路、電子機器 |
CN102103163B (zh) * | 2010-12-16 | 2012-11-14 | 泰豪科技股份有限公司 | 基于同步锁相和半波预估的任意波形测量方法 |
US8368437B2 (en) * | 2011-03-02 | 2013-02-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Phase locked loop with charge pump |
US10020931B2 (en) * | 2013-03-07 | 2018-07-10 | Intel Corporation | Apparatus for dynamically adapting a clock generator with respect to changes in power supply |
JP2015179998A (ja) * | 2014-03-19 | 2015-10-08 | 富士通株式会社 | ディジタルフィルタ,タイミング信号生成回路および半導体集積回路 |
US9490696B2 (en) * | 2015-02-09 | 2016-11-08 | Qualcomm Incorporated | Charge pump with switching gate bias |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4745372A (en) * | 1985-10-17 | 1988-05-17 | Matsushita Electric Industrial Co., Ltd. | Phase-locked-loop circuit having a charge pump |
JPH03205920A (ja) | 1989-10-30 | 1991-09-09 | Hitachi Ltd | 位相同期回路、記憶装置および磁気ディスク記憶装置 |
JPH04207322A (ja) | 1990-11-30 | 1992-07-29 | Hitachi Ltd | 周波数シンセサイザ |
DE69220468T2 (de) | 1991-07-23 | 1997-10-16 | Fujitsu Ltd | Gerät zur feineinstellung eines kopfes |
US5369376A (en) * | 1991-11-29 | 1994-11-29 | Standard Microsystems, Inc. | Programmable phase locked loop circuit and method of programming same |
JPH07240041A (ja) | 1994-02-28 | 1995-09-12 | Sony Corp | 摺動型磁気ヘッド装置 |
US5631587A (en) * | 1994-05-03 | 1997-05-20 | Pericom Semiconductor Corporation | Frequency synthesizer with adaptive loop bandwidth |
JP2842847B2 (ja) | 1995-07-18 | 1999-01-06 | 山形日本電気株式会社 | Pllシンセサイザ回路 |
JP2845185B2 (ja) * | 1995-11-29 | 1999-01-13 | 日本電気株式会社 | Pll回路 |
JP2933134B2 (ja) | 1997-02-20 | 1999-08-09 | 日本電気株式会社 | 制御電圧生成回路、それを備えたpll回路およびそれを備えたcd−romドライブ |
JPH10269503A (ja) | 1997-03-20 | 1998-10-09 | Tdk Corp | 光磁気記録用磁気ヘッドの支持装置 |
US5898544A (en) | 1997-06-13 | 1999-04-27 | Hutchinson Technology Incorporated | Base plate-mounted microactuator for a suspension |
US5983077A (en) * | 1997-07-31 | 1999-11-09 | Ericsson Inc. | Systems and methods for automatic deviation setting and control in radio transmitters |
JP3119253B2 (ja) | 1998-11-26 | 2000-12-18 | 日本電気株式会社 | 圧電素子駆動型微小変位磁気ヘッドアクチュエータ |
JP3771076B2 (ja) | 1999-03-09 | 2006-04-26 | Tdk株式会社 | 磁気ヘッド位置決め機構及びその駆動方式 |
JP2001016103A (ja) | 1999-06-30 | 2001-01-19 | Toshiba Corp | Pllシンセサイザ |
-
1999
- 1999-12-01 JP JP34252599A patent/JP3360667B2/ja not_active Expired - Fee Related
-
2000
- 2000-11-27 US US09/722,014 patent/US6711229B1/en not_active Expired - Lifetime
- 2000-11-29 EP EP00125326A patent/EP1107457A3/en not_active Withdrawn
- 2000-11-30 KR KR10-2000-0071928A patent/KR100396095B1/ko not_active IP Right Cessation
- 2000-11-30 CN CNB001336509A patent/CN1197247C/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
KR20010062016A (ko) | 2001-07-07 |
EP1107457A2 (en) | 2001-06-13 |
CN1305266A (zh) | 2001-07-25 |
KR100396095B1 (ko) | 2003-08-27 |
JP3360667B2 (ja) | 2002-12-24 |
JP2001160752A (ja) | 2001-06-12 |
US6711229B1 (en) | 2004-03-23 |
EP1107457A3 (en) | 2004-07-07 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN1197247C (zh) | 同步锁相环的方法、锁相环及具有锁相环的半导体器件 | |
CN1175571C (zh) | 延迟电路、时钟生成电路及相位同步电路 | |
CN1259776C (zh) | 带有跟踪模数转换器的模拟延迟锁定环 | |
CN1101955C (zh) | 时钟产生电路,锁相环电路,半导体装置以及设计方法 | |
CN1691512A (zh) | 具有自适应环路带宽的锁相环 | |
CN1251411C (zh) | 锁相环电路、时钟生成电路和时钟生成方法 | |
CN1574641A (zh) | 使用可进行高精度频率调制的谱扩散方式的时钟发生电路 | |
CN1622466A (zh) | 具有锁相检测功能的锁相环电路及其检测锁相的方法 | |
CN1480814A (zh) | 多相时钟发生电路 | |
CN1664956A (zh) | 半导体存储装置中的延迟锁定回路及其时钟锁定方法 | |
CN1405650A (zh) | 插补电路和dll电路及半导体集成电路 | |
CN102832930A (zh) | 数字锁相回路系统及方法 | |
CN1369138A (zh) | 时钟同步装置 | |
CN105577142A (zh) | 时钟占空比调整装置及方法 | |
CN1091977C (zh) | 用于非整数倍频系统的时钟同步方法电路 | |
JP4557230B2 (ja) | チップ、マイクロプロセッサーチップ、システム | |
CN1574642A (zh) | 频谱扩展时钟发生装置 | |
US6801062B2 (en) | Output circuit | |
CN1656685A (zh) | 锁相环 | |
US7233210B2 (en) | Spread spectrum clock generator | |
US7372338B2 (en) | Self-adjusting clock generator with stable frequency output | |
CN1144116C (zh) | 时钟发生器 | |
EP1469605A1 (en) | Apparatus and method for decreasing the lock time of a lock loop circuit | |
CN1960185A (zh) | Pll过渡响应控制系统和通信系统 | |
CN100345381C (zh) | 可变分频方法和可变分频器 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C06 | Publication | ||
PB01 | Publication | ||
ASS | Succession or assignment of patent right |
Owner name: NEC ELECTRONICS TAIWAN LTD. Free format text: FORMER OWNER: NIPPON ELECTRIC CO., LTD. Effective date: 20030724 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20030724 Address after: Kanagawa, Japan Applicant after: NEC Corp. Address before: Tokyo, Japan Applicant before: NEC Corp. |
|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20050413 Termination date: 20091230 |