CN114270482B - 半导体装置 - Google Patents

半导体装置 Download PDF

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Publication number
CN114270482B
CN114270482B CN201980099596.6A CN201980099596A CN114270482B CN 114270482 B CN114270482 B CN 114270482B CN 201980099596 A CN201980099596 A CN 201980099596A CN 114270482 B CN114270482 B CN 114270482B
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CN
China
Prior art keywords
semiconductor chip
bonding material
semiconductor
die bonding
back surface
Prior art date
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Active
Application number
CN201980099596.6A
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English (en)
Chinese (zh)
Other versions
CN114270482A (zh
Inventor
浅田智之
福田绘理
津波大介
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
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Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
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Publication of CN114270482A publication Critical patent/CN114270482A/zh
Application granted granted Critical
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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/20—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by the properties tested or measured, e.g. structural or electrical properties
    • H10P74/203—Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07351—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting
    • H10W72/07353—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting changes in shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/331—Shapes of die-attach connectors
    • H10W72/332—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/59—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/922—Bond pads being integral with underlying chip-level interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/934—Cross-sectional shape, i.e. in side view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Die Bonding (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
CN201980099596.6A 2019-08-27 2019-08-27 半导体装置 Active CN114270482B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2019/033462 WO2021038712A1 (ja) 2019-08-27 2019-08-27 半導体装置および半導体チップ

Publications (2)

Publication Number Publication Date
CN114270482A CN114270482A (zh) 2022-04-01
CN114270482B true CN114270482B (zh) 2024-11-29

Family

ID=74683908

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201980099596.6A Active CN114270482B (zh) 2019-08-27 2019-08-27 半导体装置

Country Status (7)

Country Link
US (1) US12113040B2 (https=)
JP (1) JP7173361B2 (https=)
KR (1) KR102556121B1 (https=)
CN (1) CN114270482B (https=)
DE (1) DE112019007675T5 (https=)
TW (1) TWI760771B (https=)
WO (1) WO2021038712A1 (https=)

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FR2587081B1 (fr) * 1985-09-11 1988-04-15 Bp Chimie Sa Dispositif doseur de type rotatif permettant de delivrer des substances granulaires
US4956694A (en) * 1988-11-04 1990-09-11 Dense-Pac Microsystems, Inc. Integrated circuit chip stacking
JPH0550731U (ja) * 1991-12-05 1993-07-02 オリジン電気株式会社 絶縁基板，それを用いた半導体装置および回路装置
JPH06260723A (ja) * 1993-03-03 1994-09-16 Mitsubishi Electric Corp 半導体レーザ装置
US5891761A (en) * 1994-06-23 1999-04-06 Cubic Memory, Inc. Method for forming vertical interconnect process for silicon segments with thermally conductive epoxy preform
JP2853700B2 (ja) * 1997-03-12 1999-02-03 日本電気株式会社 半導体装置
JP2001345542A (ja) 2000-05-31 2001-12-14 Kyocera Corp 電子部品の実装構造
JP3890909B2 (ja) 2001-03-19 2007-03-07 カシオ計算機株式会社 電子部品およびその接合方法
SG111069A1 (en) * 2002-06-18 2005-05-30 Micron Technology Inc Semiconductor devices including peripherally located bond pads, assemblies, packages, and methods
SG107595A1 (en) * 2002-06-18 2004-12-29 Micron Technology Inc Semiconductor devices and semiconductor device components with peripherally located, castellated contacts, assembles and packages including such semiconductor devices or packages and associated methods
US6855572B2 (en) * 2002-08-28 2005-02-15 Micron Technology, Inc. Castellation wafer level packaging of integrated circuit chips
JP2005353740A (ja) * 2004-06-09 2005-12-22 Toshiba Corp 半導体素子及び半導体装置
TWI442535B (zh) * 2008-05-23 2014-06-21 精材科技股份有限公司 電子元件封裝體及其製作方法
JP2010021251A (ja) 2008-07-09 2010-01-28 Panasonic Corp 半導体装置及びその製造方法
JP4724222B2 (ja) * 2008-12-12 2011-07-13 株式会社東芝 発光装置の製造方法
US8053898B2 (en) * 2009-10-05 2011-11-08 Samsung Electronics Co., Ltd. Connection for off-chip electrostatic discharge protection
KR101697573B1 (ko) * 2010-11-29 2017-01-19 삼성전자 주식회사 반도체 장치, 그 제조 방법, 및 상기 반도체 장치를 포함하는 반도체 패키지
US9768223B2 (en) * 2011-12-21 2017-09-19 Xintec Inc. Electronics device package and fabrication method thereof
US20140048824A1 (en) * 2012-08-15 2014-02-20 Epistar Corporation Light-emitting device
JP2014160736A (ja) * 2013-02-19 2014-09-04 Toshiba Corp 半導体発光装置及び発光装置
US9117804B2 (en) * 2013-09-13 2015-08-25 United Microelectronics Corporation Interposer structure and manufacturing method thereof
CN105934491B (zh) * 2014-01-29 2018-04-24 日立化成株式会社 粘接剂组合物、使用了粘接剂组合物的半导体装置的制造方法、以及固体摄像元件
JP6801648B2 (ja) * 2015-05-25 2020-12-16 コニカミノルタ株式会社 ポリイミドフィルム、ポリイミドフィルムの製造方法、フレキシブルプリント基板、フレキシブルディスプレイ用基板、フレキシブルディスプレイ用前面板、ｌｅｄ照明装置及び有機エレクトロルミネッセンス表示装置
JP2017050489A (ja) * 2015-09-04 2017-03-09 株式会社東芝 半導体パッケージおよび半導体パッケージの製造方法
TWI696300B (zh) * 2016-03-15 2020-06-11 晶元光電股份有限公司 半導體裝置及其製造方法
WO2018117111A1 (ja) * 2016-12-21 2018-06-28 大日本印刷株式会社 貫通電極基板、半導体装置及び貫通電極基板の製造方法
TWI610413B (zh) * 2017-03-15 2018-01-01 南茂科技股份有限公司 半導體封裝結構、半導體晶圓及半導體晶片
JP2018046289A (ja) 2017-11-21 2018-03-22 エイブリック株式会社 半導体装置およびその製造方法

Also Published As

Publication number Publication date
US12113040B2 (en) 2024-10-08
US20220223558A1 (en) 2022-07-14
JP7173361B2 (ja) 2022-11-16
WO2021038712A1 (ja) 2021-03-04
KR20220006598A (ko) 2022-01-17
DE112019007675T5 (de) 2022-06-15
JPWO2021038712A1 (https=) 2021-03-04
CN114270482A (zh) 2022-04-01
KR102556121B1 (ko) 2023-07-14
TWI760771B (zh) 2022-04-11
TW202123389A (zh) 2021-06-16

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