CN1083621C - 固定值存储器单元装置及其制造方法 - Google Patents

固定值存储器单元装置及其制造方法 Download PDF

Info

Publication number
CN1083621C
CN1083621C CN96193413A CN96193413A CN1083621C CN 1083621 C CN1083621 C CN 1083621C CN 96193413 A CN96193413 A CN 96193413A CN 96193413 A CN96193413 A CN 96193413A CN 1083621 C CN1083621 C CN 1083621C
Authority
CN
China
Prior art keywords
trench
insulating
trenches
mask
strip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN96193413A
Other languages
English (en)
Chinese (zh)
Other versions
CN1182500A (zh
Inventor
F·霍夫曼
L·列斯彻
W·克劳兹彻奈德
W·罗斯纳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Corp filed Critical Siemens Corp
Publication of CN1182500A publication Critical patent/CN1182500A/zh
Application granted granted Critical
Publication of CN1083621C publication Critical patent/CN1083621C/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H10B20/27—ROM only
    • H10B20/40—ROM only having the source region and drain region on different levels, e.g. vertical channel
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices

Landscapes

  • Semiconductor Memories (AREA)
  • Element Separation (AREA)
  • Semiconductor Integrated Circuits (AREA)
CN96193413A 1995-04-21 1996-04-09 固定值存储器单元装置及其制造方法 Expired - Fee Related CN1083621C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19514834.7 1995-04-21
DE19514834A DE19514834C1 (de) 1995-04-21 1995-04-21 Festwertspeicherzellenanordnung und Verfahren zu deren Herstellung

Publications (2)

Publication Number Publication Date
CN1182500A CN1182500A (zh) 1998-05-20
CN1083621C true CN1083621C (zh) 2002-04-24

Family

ID=7760112

Family Applications (1)

Application Number Title Priority Date Filing Date
CN96193413A Expired - Fee Related CN1083621C (zh) 1995-04-21 1996-04-09 固定值存储器单元装置及其制造方法

Country Status (9)

Country Link
US (1) US5920778A (enExample)
EP (1) EP0823131B1 (enExample)
JP (1) JPH11503876A (enExample)
KR (1) KR100374074B1 (enExample)
CN (1) CN1083621C (enExample)
AR (1) AR001660A1 (enExample)
DE (2) DE19514834C1 (enExample)
IN (1) IN187267B (enExample)
WO (1) WO1996033513A1 (enExample)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19604260C2 (de) * 1996-02-06 1998-04-30 Siemens Ag Festwert-Speicherzellenvorrichtung und ein Verfahren zu deren Herstellung
DE19617646C2 (de) * 1996-05-02 1998-07-09 Siemens Ag Speicherzellenanordnung und ein Verfahren zu deren Herstellung
DE19630050B4 (de) * 1996-07-25 2005-03-10 Infineon Technologies Ag Herstellverfahren für eine Lackmaske auf einem Substrat mit einem Graben
DE19640235C2 (de) 1996-09-30 2001-10-25 Infineon Technologies Ag Halbleiter-Festwertspeicher mit in Grabenseitenwänden vertikal verlaufenden Transistoren und Verfahren zu seiner Herstellung
DE19653107C2 (de) * 1996-12-19 1998-10-08 Siemens Ag Verfahren zur Herstellung einer Speicherzellenanordnung
DE19732871C2 (de) * 1997-07-30 1999-05-27 Siemens Ag Festwert-Speicherzellenanordnung, Ätzmaske für deren Programmierung und Verfahren zu deren Herstellung
DE19742403A1 (de) * 1997-09-25 1999-04-08 Siemens Ag Verfahren zur Herstellung einer Halbleiterstruktur
DE19742397C2 (de) * 1997-09-25 2000-07-06 Siemens Ag Verfahren zur Herstellung einer Halbleiterstruktur mit einer Mehrzahl von Gräben
DE19805712A1 (de) * 1998-02-12 1999-08-26 Siemens Ag Speicherzellenanordnung und entsprechendes Herstellungsverfahren
DE19807776A1 (de) * 1998-02-24 1999-09-02 Siemens Ag Halbleitervorrichtung und entsprechendes Herstellungsverfahren
DE19807920A1 (de) * 1998-02-25 1999-09-02 Siemens Ag Speicherzellenanordnung und entsprechendes Herstellungsverfahren
JP2002508594A (ja) * 1998-03-24 2002-03-19 インフィニオン テクノロジーズ アクチエンゲゼルシャフト メモリセル装置及びその製造方法
DE19843979C1 (de) * 1998-09-24 2000-03-02 Siemens Ag Speicherzellenanordnung mit ferroelektrischem oder dynamischen Speicherzellen und entsprechendes Herstellungsverfahren
TW456002B (en) * 1999-04-03 2001-09-21 Taiwan Semiconductor Mfg Manufacturing method of mask ROM
US6774439B2 (en) * 2000-02-17 2004-08-10 Kabushiki Kaisha Toshiba Semiconductor device using fuse/anti-fuse system
DE10009346B4 (de) 2000-02-28 2011-06-16 Qimonda Ag Integrierte Schreib-/Leseschaltung zur Auswertung von zumindest einer Bitline in einem DRAM Speicher
JP4236848B2 (ja) * 2001-03-28 2009-03-11 セイコーインスツル株式会社 半導体集積回路装置の製造方法
DE10240916A1 (de) * 2002-09-04 2004-03-25 Infineon Technologies Ag Verfahren zur Herstellung eines Speicherzellenfeldes mit in Gräben angeordneten Speichertransistoren
FR2880191B1 (fr) * 2004-12-23 2007-03-16 St Microelectronics Sa Realisation de tranchees ou puits ayant des destinations differentes dans un substrat semiconducteur
KR100657823B1 (ko) * 2004-12-28 2006-12-14 주식회사 하이닉스반도체 리세스드 게이트를 구비한 반도체 소자 및 그의 제조 방법
KR101095772B1 (ko) * 2007-10-17 2011-12-21 주식회사 하이닉스반도체 반도체 소자의 제조방법
KR101669244B1 (ko) 2010-06-08 2016-10-25 삼성전자주식회사 에스램 소자 및 그 제조방법
CN102683290A (zh) * 2011-03-08 2012-09-19 无锡华润上华半导体有限公司 Rom器件及其制造方法
KR101205118B1 (ko) 2011-03-11 2012-11-26 에스케이하이닉스 주식회사 반도체 소자 및 그 제조 방법
US8669611B2 (en) 2012-07-11 2014-03-11 Taiwan Semiconductor Manufacturing Company, Ltd. Apparatus and method for power MOS transistor
US9130060B2 (en) 2012-07-11 2015-09-08 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit having a vertical power MOS transistor

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2909197A1 (de) * 1978-03-20 1979-10-04 Texas Instruments Inc Verfahren zur herstellung eines festspeichers und festspeichermatrix
JPS5911671A (ja) * 1982-07-12 1984-01-21 Toshiba Corp 半導体記憶装置とその製造方法
JPS60136378A (ja) * 1983-12-26 1985-07-19 Hitachi Ltd 半導体装置およびその製造方法
JPS6135554A (ja) * 1984-07-28 1986-02-20 Nippon Telegr & Teleph Corp <Ntt> 読出し専用メモリ−およびその製造方法
US4954854A (en) * 1989-05-22 1990-09-04 International Business Machines Corporation Cross-point lightly-doped drain-source trench transistor and fabrication process therefor
JPH04354159A (ja) * 1991-05-31 1992-12-08 Mitsubishi Electric Corp 半導体装置およびその製造方法
DE4300806C1 (de) * 1993-01-14 1993-12-23 Siemens Ag Verfahren zur Herstellung von vertikalen MOS-Transistoren
DE4437581C2 (de) * 1994-10-20 1996-08-08 Siemens Ag Verfahren zur Herstellung einer Festwertspeicherzellenanordnung mit vertikalen MOS-Transistoren

Also Published As

Publication number Publication date
EP0823131A1 (de) 1998-02-11
KR100374074B1 (ko) 2003-07-16
DE59602880D1 (de) 1999-09-30
AR001660A1 (es) 1997-11-26
JPH11503876A (ja) 1999-03-30
US5920778A (en) 1999-07-06
KR19980703258A (ko) 1998-10-15
IN187267B (enExample) 2002-03-16
CN1182500A (zh) 1998-05-20
DE19514834C1 (de) 1997-01-09
EP0823131B1 (de) 1999-08-25
WO1996033513A1 (de) 1996-10-24

Similar Documents

Publication Publication Date Title
CN1083621C (zh) 固定值存储器单元装置及其制造方法
US5973373A (en) Read-only-memory cell arrangement using vertical MOS transistors and gate dielectrics of different thicknesses and method for its production
US6191459B1 (en) Electrically programmable memory cell array, using charge carrier traps and insulation trenches
US5744393A (en) Method for production of a read-only-memory cell arrangement having vertical MOS transistors
US7416941B2 (en) Four-bit finfet NVRAM memory device
CN1034840C (zh) 半导体器件及其制造方法
CN1633714A (zh) 2f2存储器件的系统和方法
US20160322478A1 (en) Methods Of Forming Transistor Gates
CN1950940A (zh) 电荷收集存储器单元阵列及其制造方法
CN1653615A (zh) 非易失半导体闪存及制造方法
US9871055B1 (en) Vertical-type memory device
JP2001506410A (ja) メモリセル装置およびその製造方法
US5920099A (en) Read-only memory cell array and process for manufacturing it
US6265748B1 (en) Storage cell arrangement in which vertical MOS transistors have at least three different threshold voltages depending on stored data, and method of producing said arrangement
US7320934B2 (en) Method of forming a contact in a flash memory device
KR100365567B1 (ko) 판독전용메모리셀어레이및그의제조방법
CN1267986C (zh) 平面单元存储元件的硅化物膜制造方法
JP2000501886A (ja) 固定値メモリセル装置及びその製造方法
KR20000057653A (ko) 메모리 셀 장치의 제조 방법
KR100396387B1 (ko) 저장 셀 장치 및 그 제조 방법
KR100466349B1 (ko) Rom셀디바이스및그생산방법
US20030011018A1 (en) Flash floating gate using epitaxial overgrowth
US11751393B2 (en) Memory arrays and methods used in forming a memory array comprising strings of memory cells
CN1691336A (zh) 埋置位线非易失浮动栅存储单元、其阵列及其制造方法
TW202335258A (zh) 半導體記憶裝置及其製造方法

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
ASS Succession or assignment of patent right

Owner name: INFINEON TECHNOLOGIES AG

Free format text: FORMER OWNER: SIEMENS AG

Effective date: 20120220

C41 Transfer of patent application or patent right or utility model
TR01 Transfer of patent right

Effective date of registration: 20120220

Address after: Federal Republic of Germany City, Laura Ibiza Berger

Patentee after: Infineon Technologies AG

Address before: Munich, Germany

Patentee before: Siemens AG

C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20020424

Termination date: 20140409