CN104362101B - 制造半导体器件的方法 - Google Patents

制造半导体器件的方法 Download PDF

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Publication number
CN104362101B
CN104362101B CN201410547244.1A CN201410547244A CN104362101B CN 104362101 B CN104362101 B CN 104362101B CN 201410547244 A CN201410547244 A CN 201410547244A CN 104362101 B CN104362101 B CN 104362101B
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semiconductor chip
semiconductor
front surface
bonding
main side
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CN104362101A (zh
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武藤修康
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Renesas Electronics Corp
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Renesas Electronics Corp
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    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
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    • H10P72/7412—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support the auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
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    • H10W72/07531—Techniques
    • H10W72/07532—Compression bonding, e.g. thermocompression bonding
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  • Wire Bonding (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Dicing (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
CN201410547244.1A 2010-01-08 2011-01-07 制造半导体器件的方法 Active CN104362101B (zh)

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Application Number Priority Date Filing Date Title
JP2010002957A JP5512292B2 (ja) 2010-01-08 2010-01-08 半導体装置の製造方法
JP2010-002957 2010-01-08
CN201110002450.0A CN102142398B (zh) 2010-01-08 2011-01-07 制造半导体器件的方法

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CN104362101B true CN104362101B (zh) 2017-04-12

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JP (1) JP5512292B2 (https=)
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TW (1) TWI493610B (https=)

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WO2012057823A2 (en) * 2010-10-27 2012-05-03 The Regents Of The University Of California, Santa Cruz Methods for scribing of semiconductor devices with improved sidewall passivation
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