CN100461414C - 半导体器件及其制造方法 - Google Patents
半导体器件及其制造方法 Download PDFInfo
- Publication number
- CN100461414C CN100461414C CNB2005100738401A CN200510073840A CN100461414C CN 100461414 C CN100461414 C CN 100461414C CN B2005100738401 A CNB2005100738401 A CN B2005100738401A CN 200510073840 A CN200510073840 A CN 200510073840A CN 100461414 C CN100461414 C CN 100461414C
- Authority
- CN
- China
- Prior art keywords
- insulating film
- element isolation
- film
- isolation insulating
- mentioned
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0151—Manufacturing their isolation regions
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/01—Manufacture or treatment
- H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
- H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
- H10P14/665—Porous materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/69—Inorganic materials
- H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
- H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
- H10P14/6922—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H10P14/6925—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material comprising hydrogen silsesquioxane, e.g. HSQ
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/69—Inorganic materials
- H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
- H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
- H10P14/6922—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H10P14/6926—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material comprising alkyl silsesquioxane, e.g. MSQ
Landscapes
- Element Separation (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004154226A JP2005340327A (ja) | 2004-05-25 | 2004-05-25 | 半導体装置及びその製造方法 |
| JP2004154226 | 2004-05-25 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1716607A CN1716607A (zh) | 2006-01-04 |
| CN100461414C true CN100461414C (zh) | 2009-02-11 |
Family
ID=35446761
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2005100738401A Expired - Fee Related CN100461414C (zh) | 2004-05-25 | 2005-05-24 | 半导体器件及其制造方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US7279769B2 (https=) |
| JP (1) | JP2005340327A (https=) |
| KR (1) | KR100732647B1 (https=) |
| CN (1) | CN100461414C (https=) |
| TW (1) | TWI282141B (https=) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5195747B2 (ja) * | 2007-03-27 | 2013-05-15 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
| JP5525695B2 (ja) * | 2007-06-20 | 2014-06-18 | 株式会社東芝 | 半導体装置およびその製造方法 |
| US20110316117A1 (en) * | 2007-08-14 | 2011-12-29 | Agency For Science, Technology And Research | Die package and a method for manufacturing the die package |
| US7871895B2 (en) * | 2008-02-19 | 2011-01-18 | International Business Machines Corporation | Method and structure for relieving transistor performance degradation due to shallow trench isolation induced stress |
| JPWO2010073947A1 (ja) * | 2008-12-25 | 2012-06-14 | 国立大学法人東北大学 | 半導体装置及びその製造方法 |
| JPWO2011138906A1 (ja) * | 2010-05-07 | 2013-07-22 | 国立大学法人東北大学 | 半導体装置の製造方法 |
| JP2012009791A (ja) * | 2010-06-28 | 2012-01-12 | Panasonic Corp | 固体撮像装置及びその製造方法 |
| JP5405437B2 (ja) | 2010-11-05 | 2014-02-05 | AzエレクトロニックマテリアルズIp株式会社 | アイソレーション構造の形成方法 |
| JP2012134302A (ja) * | 2010-12-21 | 2012-07-12 | Jsr Corp | トレンチ埋め込み方法、及びトレンチ埋め込み用組成物 |
| JP2013074169A (ja) * | 2011-09-28 | 2013-04-22 | Kyocera Corp | 薄膜配線基板 |
| CN105493254B (zh) | 2013-09-26 | 2020-12-29 | 英特尔公司 | Nmos结构中形成位错增强的应变的方法 |
| US10204982B2 (en) * | 2013-10-08 | 2019-02-12 | Stmicroelectronics, Inc. | Semiconductor device with relaxation reduction liner and associated methods |
| FR3024587B1 (fr) * | 2014-08-01 | 2018-01-26 | Soitec | Procede de fabrication d'une structure hautement resistive |
| US10822692B2 (en) * | 2016-08-12 | 2020-11-03 | University Of North Texas | Binary Ag—Cu amorphous thin-films for electronic applications |
| KR102549340B1 (ko) * | 2016-09-27 | 2023-06-28 | 삼성전자주식회사 | 반도체 장치 및 이의 제조 방법 |
| CN110880473B (zh) * | 2018-09-06 | 2025-02-25 | 长鑫存储技术有限公司 | 半导体器件、半导体器件制造方法 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1139294A (zh) * | 1995-03-08 | 1997-01-01 | 株式会社日立制作所 | 半导体器件及其制造 |
| US20040058499A1 (en) * | 2002-06-24 | 2004-03-25 | Norio Ishitsuka | Semiconductor device and manufacturing method of the same |
Family Cites Families (24)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2932552B2 (ja) * | 1989-12-29 | 1999-08-09 | 日本電気株式会社 | 半導体装置及びその製造方法 |
| JPH0547918A (ja) | 1991-08-13 | 1993-02-26 | Hitachi Ltd | 半導体装置の製造方法 |
| JPH05114646A (ja) | 1991-10-24 | 1993-05-07 | Fujitsu Ltd | 半導体装置の製造方法 |
| JPH0697274A (ja) | 1992-09-14 | 1994-04-08 | Hitachi Ltd | 素子分離方法 |
| JPH0897210A (ja) | 1994-09-28 | 1996-04-12 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
| US5707888A (en) * | 1995-05-04 | 1998-01-13 | Lsi Logic Corporation | Oxide formed in semiconductor substrate by implantation of substrate with a noble gas prior to oxidation |
| JP4420986B2 (ja) * | 1995-11-21 | 2010-02-24 | 株式会社東芝 | シャロウ・トレンチ分離半導体基板及びその製造方法 |
| JP4195734B2 (ja) | 1996-06-10 | 2008-12-10 | テキサス インスツルメンツ インコーポレイテツド | 集積回路のトレンチ分離製作方法 |
| JP3058112B2 (ja) * | 1997-02-27 | 2000-07-04 | 日本電気株式会社 | 半導体装置およびその製造方法 |
| JPH1187489A (ja) | 1997-09-10 | 1999-03-30 | Asahi Chem Ind Co Ltd | ポーラスシリコンを用いた素子分離膜形成方法 |
| JP3519589B2 (ja) | 1997-12-24 | 2004-04-19 | 株式会社ルネサステクノロジ | 半導体集積回路の製造方法 |
| JP3178412B2 (ja) | 1998-04-27 | 2001-06-18 | 日本電気株式会社 | トレンチ・アイソレーション構造の形成方法 |
| JP2000114362A (ja) * | 1998-10-02 | 2000-04-21 | Nec Corp | 半導体装置の製造方法 |
| KR100287182B1 (ko) * | 1998-10-20 | 2001-04-16 | 윤종용 | 반도체장치의소자분리막형성방법 |
| US6469390B2 (en) | 1999-01-26 | 2002-10-22 | Agere Systems Guardian Corp. | Device comprising thermally stable, low dielectric constant material |
| JP2000286254A (ja) * | 1999-03-31 | 2000-10-13 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
| JP2001144170A (ja) | 1999-11-11 | 2001-05-25 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
| JP2002009245A (ja) | 2000-06-21 | 2002-01-11 | Nec Corp | 誘電体分離型半導体装置 |
| JP3346762B2 (ja) | 2000-11-10 | 2002-11-18 | 京セラ株式会社 | 磁気ヘッド組立用治具 |
| JP2002289681A (ja) * | 2001-03-26 | 2002-10-04 | Mitsui Chemicals Inc | 半導体装置 |
| JP2003031568A (ja) | 2001-07-12 | 2003-01-31 | Toshiba Corp | 半導体装置の製造方法及び半導体装置 |
| JP2003031650A (ja) | 2001-07-13 | 2003-01-31 | Toshiba Corp | 半導体装置の製造方法 |
| JP2004039902A (ja) * | 2002-07-04 | 2004-02-05 | Renesas Technology Corp | 半導体装置およびその製造方法 |
| CN100370587C (zh) * | 2002-09-06 | 2008-02-20 | 旭硝子株式会社 | 绝缘膜研磨剂组合物及半导体集成电路的制造方法 |
-
2004
- 2004-05-25 JP JP2004154226A patent/JP2005340327A/ja active Pending
-
2005
- 2005-04-22 TW TW094112882A patent/TWI282141B/zh not_active IP Right Cessation
- 2005-05-24 CN CNB2005100738401A patent/CN100461414C/zh not_active Expired - Fee Related
- 2005-05-24 KR KR1020050043401A patent/KR100732647B1/ko not_active Expired - Fee Related
- 2005-05-25 US US11/139,002 patent/US7279769B2/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1139294A (zh) * | 1995-03-08 | 1997-01-01 | 株式会社日立制作所 | 半导体器件及其制造 |
| US20040058499A1 (en) * | 2002-06-24 | 2004-03-25 | Norio Ishitsuka | Semiconductor device and manufacturing method of the same |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1716607A (zh) | 2006-01-04 |
| US20050269662A1 (en) | 2005-12-08 |
| TWI282141B (en) | 2007-06-01 |
| KR20060048071A (ko) | 2006-05-18 |
| KR100732647B1 (ko) | 2007-06-27 |
| JP2005340327A (ja) | 2005-12-08 |
| US7279769B2 (en) | 2007-10-09 |
| TW200605264A (en) | 2006-02-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7598151B2 (en) | Semiconductor device fabrication method | |
| CN100461414C (zh) | 半导体器件及其制造方法 | |
| JP5173582B2 (ja) | 半導体装置 | |
| US9209243B2 (en) | Method of forming a shallow trench isolation structure | |
| JP6027531B2 (ja) | その側壁での窒素濃度が高められたSiONゲート誘電体を含むMOSトランジスタ | |
| CN112531030A (zh) | 半导体装置 | |
| JP5122059B2 (ja) | 金属ゲートパターンを有する半導体素子の製造方法 | |
| CN114883325A (zh) | 集成电路器件及其制造方法 | |
| JP2007221058A (ja) | 半導体装置の製造方法 | |
| TWI784579B (zh) | 半導體製造方法 | |
| KR102805196B1 (ko) | 반도체 디바이스 및 제조 방법 | |
| TW200406024A (en) | Manufacture method of semiconductor device with gate insulating films of different thickness | |
| CN106340456B (zh) | 半导体装置及其制造方法 | |
| JP4184686B2 (ja) | 半導体装置の製造方法 | |
| US8232166B2 (en) | Method for fabricating semiconductor device with recess gate | |
| US9991363B1 (en) | Contact etch stop layer with sacrificial polysilicon layer | |
| US10872762B2 (en) | Methods of forming silicon oxide layer and semiconductor structure | |
| US20060134846A1 (en) | Method of fabricating a semiconductor structure | |
| JP2001127288A (ja) | ゲート構造の製造方法 | |
| JP4983025B2 (ja) | 半導体装置の製造方法 | |
| KR100670925B1 (ko) | 반도체 장치 및 이의 제조 방법 | |
| JP2004172178A (ja) | 半導体装置及び半導体装置の製造方法 | |
| TWI243414B (en) | Method of forming gate electrode in flash memory device | |
| CN109786254B (zh) | 后栅极工艺中的选择性高k形成 | |
| JP2005277285A (ja) | 半導体装置の製造方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: RENESAS ELECTRONICS CO., LTD. Free format text: FORMER OWNER: NEC CORP. Effective date: 20100715 Owner name: NEC CORP. Free format text: FORMER OWNER: RENESAS TECHNOLOGY CORP. Effective date: 20100715 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: TOKYO, JAPAN TO: KANAGAWA, JAPAN COUNTY |
|
| TR01 | Transfer of patent right |
Effective date of registration: 20100715 Address after: Kanagawa, Japan Patentee after: Renesas Electronics Corp. Address before: Kanagawa, Japan Patentee before: NEC ELECTRONICS Corp. Effective date of registration: 20100715 Address after: Kanagawa, Japan Patentee after: NEC ELECTRONICS Corp. Address before: Tokyo, Japan Patentee before: Renesas Technology Corp. |
|
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090211 Termination date: 20110524 |