BRPI0408964A - método para fabricar um módulo eletrÈnico e módulo eletrÈnico - Google Patents
método para fabricar um módulo eletrÈnico e módulo eletrÈnicoInfo
- Publication number
- BRPI0408964A BRPI0408964A BRPI0408964-2A BRPI0408964A BRPI0408964A BR PI0408964 A BRPI0408964 A BR PI0408964A BR PI0408964 A BRPI0408964 A BR PI0408964A BR PI0408964 A BRPI0408964 A BR PI0408964A
- Authority
- BR
- Brazil
- Prior art keywords
- electronic module
- component
- conductive layer
- manufacturing
- conductive
- Prior art date
Links
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/19—Manufacturing methods of high density interconnect preforms
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0652—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
- H05K1/188—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or attaching to a structure having a conductive layer, e.g. a metal foil, such that the terminals of the component are connected to or adjacent to the conductive layer before embedding, and by using the conductive layer, which is patterned after embedding, at least partially for connecting the component
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- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
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- H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
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- H01L2223/54473—Marks applied to semiconductor devices or parts for use after dicing
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
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- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/20—Structure, shape, material or disposition of high density interconnect preforms
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- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus
- H01L2224/83005—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus being a temporary or sacrificial substrate
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8312—Aligning
- H01L2224/83121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
- H01L2224/83132—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors using marks formed outside the semiconductor or solid-state body, i.e. "off-chip"
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- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
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- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
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- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
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- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9212—Sequential connecting processes
- H01L2224/92142—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92144—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
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- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
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- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
Abstract
"MéTODO PARA FABRICAR UM MóDULO ELETRÈNICO E MóDULO ELETRÈNICO". A invenção refere-se a um módulo eletrónico e a um método para fabricar um módulo eletrónico, no qual um componente (6) é colado (5) na superfície de uma camada condutora, de cuja camada condutora os padrões condutores (14) são posteriormente formados. Após colar o componente (6), uma camada de material isolante (1), a qual circunda o componente (6) preso na camada condutora, é formada sobre, ou presa na superfície da camada condutora. Após a colagem do componente (6), orifícios de alimentação são também feitos, através dos quais os contatos elétricos podem ser feitos entre a camada condutora e as zonas de contato (7) do componente. Após isto, os padrões condutores (14) são feitos da camada condutora, na superfície da qual o componente (6) está colado.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FI20030493A FI115601B (fi) | 2003-04-01 | 2003-04-01 | Menetelmä elektroniikkamoduulin valmistamiseksi ja elektroniikkamoduuli |
PCT/FI2004/000195 WO2004089048A1 (en) | 2003-04-01 | 2004-03-31 | Method for manufacturing an electronic module and an electronic module |
Publications (2)
Publication Number | Publication Date |
---|---|
BRPI0408964A true BRPI0408964A (pt) | 2006-04-04 |
BRPI0408964B1 BRPI0408964B1 (pt) | 2017-05-09 |
Family
ID=8565909
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
BRPI0408964A BRPI0408964B1 (pt) | 2003-04-01 | 2004-03-31 | método para fabricar um módulo eletrônico e módulo eletrônico |
Country Status (12)
Country | Link |
---|---|
US (2) | US7663215B2 (pt) |
EP (1) | EP1609339B1 (pt) |
JP (1) | JP4205749B2 (pt) |
KR (1) | KR100687976B1 (pt) |
CN (2) | CN100556233C (pt) |
AT (1) | ATE531242T1 (pt) |
BR (1) | BRPI0408964B1 (pt) |
CA (1) | CA2520992C (pt) |
FI (1) | FI115601B (pt) |
HK (1) | HK1089328A1 (pt) |
MX (1) | MXPA05010527A (pt) |
WO (1) | WO2004089048A1 (pt) |
Families Citing this family (73)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8704359B2 (en) | 2003-04-01 | 2014-04-22 | Ge Embedded Electronics Oy | Method for manufacturing an electronic module and an electronic module |
FI20031341A (fi) | 2003-09-18 | 2005-03-19 | Imbera Electronics Oy | Menetelmä elektroniikkamoduulin valmistamiseksi |
FI20040592A (fi) | 2004-04-27 | 2005-10-28 | Imbera Electronics Oy | Lämmön johtaminen upotetusta komponentista |
FI20041680A (fi) | 2004-04-27 | 2005-10-28 | Imbera Electronics Oy | Elektroniikkamoduuli ja menetelmä sen valmistamiseksi |
US7441329B2 (en) * | 2004-06-07 | 2008-10-28 | Subtron Technology Co. Ltd. | Fabrication process circuit board with embedded passive component |
FI117814B (fi) | 2004-06-15 | 2007-02-28 | Imbera Electronics Oy | Menetelmä elektroniikkamoduulin valmistamiseksi |
US8487194B2 (en) * | 2004-08-05 | 2013-07-16 | Imbera Electronics Oy | Circuit board including an embedded component |
FI117812B (fi) * | 2004-08-05 | 2007-02-28 | Imbera Electronics Oy | Komponentin sisältävän kerroksen valmistaminen |
FI20041525A (fi) * | 2004-11-26 | 2006-03-17 | Imbera Electronics Oy | Elektroniikkamoduuli ja menetelmä sen valmistamiseksi |
FI117369B (fi) | 2004-11-26 | 2006-09-15 | Imbera Electronics Oy | Menetelmä elektroniikkamoduulin valmistamiseksi |
GB2441265B (en) | 2005-06-16 | 2012-01-11 | Imbera Electronics Oy | Method for manufacturing a circuit board structure, and a circuit board structure |
FI122128B (fi) | 2005-06-16 | 2011-08-31 | Imbera Electronics Oy | Menetelmä piirilevyrakenteen valmistamiseksi |
FI119714B (fi) | 2005-06-16 | 2009-02-13 | Imbera Electronics Oy | Piirilevyrakenne ja menetelmä piirilevyrakenteen valmistamiseksi |
FI20060256L (fi) | 2006-03-17 | 2006-03-20 | Imbera Electronics Oy | Piirilevyn valmistaminen ja komponentin sisältävä piirilevy |
US8841759B2 (en) * | 2006-12-23 | 2014-09-23 | Lg Innotek Co., Ltd. | Semiconductor package and manufacturing method thereof |
KR20080058987A (ko) * | 2006-12-23 | 2008-06-26 | 엘지이노텍 주식회사 | 반도체 패키지 및 그 제조방법 |
US20080192446A1 (en) | 2007-02-09 | 2008-08-14 | Johannes Hankofer | Protection For Circuit Boards |
US8522051B2 (en) * | 2007-05-07 | 2013-08-27 | Infineon Technologies Ag | Protection for circuit boards |
US7926173B2 (en) | 2007-07-05 | 2011-04-19 | Occam Portfolio Llc | Method of making a circuit assembly |
JP2011501870A (ja) * | 2007-05-08 | 2011-01-13 | オッカム ポートフォリオ リミテッド ライアビリティ カンパニー | はんだの無い電子組立体及びそれらの製造方法 |
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- 2004-03-31 CN CNB2004800093496A patent/CN100556233C/zh not_active Expired - Lifetime
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US20060278967A1 (en) | 2006-12-14 |
CA2520992C (en) | 2013-01-22 |
US8034658B2 (en) | 2011-10-11 |
KR20060005348A (ko) | 2006-01-17 |
US20100062568A1 (en) | 2010-03-11 |
KR100687976B1 (ko) | 2007-02-27 |
JP4205749B2 (ja) | 2009-01-07 |
FI115601B (fi) | 2005-05-31 |
BRPI0408964B1 (pt) | 2017-05-09 |
FI20030493A0 (fi) | 2003-04-01 |
CA2520992A1 (en) | 2004-10-14 |
ATE531242T1 (de) | 2011-11-15 |
EP1609339A1 (en) | 2005-12-28 |
US7663215B2 (en) | 2010-02-16 |
CN101546759B (zh) | 2011-07-06 |
EP1609339B1 (en) | 2011-10-26 |
CN100556233C (zh) | 2009-10-28 |
WO2004089048A1 (en) | 2004-10-14 |
MXPA05010527A (es) | 2006-03-10 |
CN101546759A (zh) | 2009-09-30 |
CN1771767A (zh) | 2006-05-10 |
HK1089328A1 (en) | 2006-11-24 |
JP2006523375A (ja) | 2006-10-12 |
FI20030493A (fi) | 2004-10-02 |
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