ATE531242T1 - Verfahren zur herstellung eines elektronsichen moduls und elektronisches modul - Google Patents

Verfahren zur herstellung eines elektronsichen moduls und elektronisches modul

Info

Publication number
ATE531242T1
ATE531242T1 AT04724626T AT04724626T ATE531242T1 AT E531242 T1 ATE531242 T1 AT E531242T1 AT 04724626 T AT04724626 T AT 04724626T AT 04724626 T AT04724626 T AT 04724626T AT E531242 T1 ATE531242 T1 AT E531242T1
Authority
AT
Austria
Prior art keywords
electronic module
component
conductive layer
producing
conductive
Prior art date
Application number
AT04724626T
Other languages
English (en)
Inventor
Risto Tuominen
Petteri Palm
Original Assignee
Imbera Electronics Oy
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=8565909&utm_source=google_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=ATE531242(T1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Imbera Electronics Oy filed Critical Imbera Electronics Oy
Application granted granted Critical
Publication of ATE531242T1 publication Critical patent/ATE531242T1/de

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00Marks applied to devices, e.g. for alignment or identification
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC]
    • H05K1/185Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC] associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards
    • H05K1/188Printed circuits structurally associated with non-printed electric components associated with components mounted in printed circuit boards [PCB], e.g. insert-mounted components [IMC] associated with components encapsulated in the insulating substrate of the PCBs; associated with components incorporated in internal layers of multilayer circuit boards manufactured by mounting on or attaching to a structure having a conductive layer, e.g. a metal foil, such that the terminals of the component are connected to or adjacent to the conductive layer before embedding, and by using the conductive layer, which is patterned after embedding, at least partially for connecting the component
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00Arrangements for protection of devices
    • H10W42/20Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
    • H10W42/261Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons characterised by their shapes or dispositions
    • H10W42/276Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons characterised by their shapes or dispositions the arrangements being on an external surface of the package, e.g. on the outer surface of an encapsulation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/05Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/08Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs
    • H10W70/09Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H10W70/614Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together the multiple chips being integrally enclosed
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00Marks applied to devices, e.g. for alignment or identification
    • H10W46/301Marks applied to devices, e.g. for alignment or identification for alignment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00Marks applied to devices, e.g. for alignment or identification
    • H10W46/601Marks applied to devices, e.g. for alignment or identification for use after dicing
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/05Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/093Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • H10W72/07302Connecting or disconnecting of die-attach connectors using an auxiliary member
    • H10W72/07304Connecting or disconnecting of die-attach connectors using an auxiliary member the auxiliary member being temporary, e.g. a sacrificial coating
    • H10W72/07307Connecting or disconnecting of die-attach connectors using an auxiliary member the auxiliary member being temporary, e.g. a sacrificial coating the auxiliary member being a temporary substrate, e.g. a removable substrate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • H10W72/07321Aligning
    • H10W72/07323Active alignment, e.g. using optical alignment using marks or sensors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • H10W72/07331Connecting techniques
    • H10W72/07337Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy
    • H10W72/07338Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy hardening the adhesive by curing, e.g. thermosetting
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/941Dispositions of bond pads
    • H10W72/9413Dispositions of bond pads on encapsulations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Wire Bonding (AREA)
  • Multi-Conductor Connections (AREA)
  • Apparatuses And Processes For Manufacturing Resistors (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Credit Cards Or The Like (AREA)
AT04724626T 2003-04-01 2004-03-31 Verfahren zur herstellung eines elektronsichen moduls und elektronisches modul ATE531242T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FI20030493A FI115601B (fi) 2003-04-01 2003-04-01 Menetelmä elektroniikkamoduulin valmistamiseksi ja elektroniikkamoduuli
PCT/FI2004/000195 WO2004089048A1 (en) 2003-04-01 2004-03-31 Method for manufacturing an electronic module and an electronic module

Publications (1)

Publication Number Publication Date
ATE531242T1 true ATE531242T1 (de) 2011-11-15

Family

ID=8565909

Family Applications (1)

Application Number Title Priority Date Filing Date
AT04724626T ATE531242T1 (de) 2003-04-01 2004-03-31 Verfahren zur herstellung eines elektronsichen moduls und elektronisches modul

Country Status (11)

Country Link
US (2) US7663215B2 (de)
EP (1) EP1609339B1 (de)
JP (1) JP4205749B2 (de)
KR (1) KR100687976B1 (de)
CN (2) CN101546759B (de)
AT (1) ATE531242T1 (de)
BR (1) BRPI0408964B1 (de)
CA (1) CA2520992C (de)
FI (1) FI115601B (de)
MX (1) MXPA05010527A (de)
WO (1) WO2004089048A1 (de)

Families Citing this family (75)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8704359B2 (en) * 2003-04-01 2014-04-22 Ge Embedded Electronics Oy Method for manufacturing an electronic module and an electronic module
FI20031341L (fi) 2003-09-18 2005-03-19 Imbera Electronics Oy Menetelmä elektroniikkamoduulin valmistamiseksi
FI20040592L (fi) 2004-04-27 2005-10-28 Imbera Electronics Oy Lämmön johtaminen upotetusta komponentista
FI20041680A7 (fi) 2004-04-27 2005-10-28 Imbera Electronics Oy Elektroniikkamoduuli ja menetelmä sen valmistamiseksi
US7441329B2 (en) * 2004-06-07 2008-10-28 Subtron Technology Co. Ltd. Fabrication process circuit board with embedded passive component
FI117814B (fi) * 2004-06-15 2007-02-28 Imbera Electronics Oy Menetelmä elektroniikkamoduulin valmistamiseksi
US8487194B2 (en) * 2004-08-05 2013-07-16 Imbera Electronics Oy Circuit board including an embedded component
FI117812B (fi) * 2004-08-05 2007-02-28 Imbera Electronics Oy Komponentin sisältävän kerroksen valmistaminen
FI117369B (fi) * 2004-11-26 2006-09-15 Imbera Electronics Oy Menetelmä elektroniikkamoduulin valmistamiseksi
FI20041525A7 (fi) * 2004-11-26 2006-03-17 Imbera Electronics Oy Elektroniikkamoduuli ja menetelmä sen valmistamiseksi
FI119714B (fi) * 2005-06-16 2009-02-13 Imbera Electronics Oy Piirilevyrakenne ja menetelmä piirilevyrakenteen valmistamiseksi
WO2006134220A1 (en) 2005-06-16 2006-12-21 Imbera Electronics Oy Method for manufacturing a circuit board structure, and a circuit board structure
FI122128B (fi) * 2005-06-16 2011-08-31 Imbera Electronics Oy Menetelmä piirilevyrakenteen valmistamiseksi
FI20060256A7 (fi) 2006-03-17 2006-03-20 Imbera Electronics Oy Piirilevyn valmistaminen ja komponentin sisältävä piirilevy
US8841759B2 (en) * 2006-12-23 2014-09-23 Lg Innotek Co., Ltd. Semiconductor package and manufacturing method thereof
KR20080058987A (ko) * 2006-12-23 2008-06-26 엘지이노텍 주식회사 반도체 패키지 및 그 제조방법
US20080192446A1 (en) * 2007-02-09 2008-08-14 Johannes Hankofer Protection For Circuit Boards
US8522051B2 (en) * 2007-05-07 2013-08-27 Infineon Technologies Ag Protection for circuit boards
JP2011501870A (ja) * 2007-05-08 2011-01-13 オッカム ポートフォリオ リミテッド ライアビリティ カンパニー はんだの無い電子組立体及びそれらの製造方法
US7926173B2 (en) 2007-07-05 2011-04-19 Occam Portfolio Llc Method of making a circuit assembly
WO2009001621A1 (ja) * 2007-06-26 2008-12-31 Murata Manufacturing Co., Ltd. 部品内蔵基板の製造方法
US20090035454A1 (en) * 2007-07-31 2009-02-05 Occam Portfolio Llc Assembly of Encapsulated Electronic Components to a Printed Circuit Board
US8300425B2 (en) * 2007-07-31 2012-10-30 Occam Portfolio Llc Electronic assemblies without solder having overlapping components
US7935893B2 (en) 2008-02-14 2011-05-03 Ibiden Co., Ltd. Method of manufacturing printed wiring board with built-in electronic component
US8024858B2 (en) 2008-02-14 2011-09-27 Ibiden Co., Ltd. Method of manufacturing printed wiring board with built-in electronic component
JP2009218545A (ja) 2008-03-12 2009-09-24 Ibiden Co Ltd 多層プリント配線板及びその製造方法
JP2009231818A (ja) 2008-03-21 2009-10-08 Ibiden Co Ltd 多層プリント配線板及びその製造方法
US8264085B2 (en) 2008-05-05 2012-09-11 Infineon Technologies Ag Semiconductor device package interconnections
WO2009147936A1 (ja) 2008-06-02 2009-12-10 イビデン株式会社 多層プリント配線板の製造方法
KR100997793B1 (ko) * 2008-09-01 2010-12-02 주식회사 하이닉스반도체 반도체 패키지 및 이의 제조 방법
KR101013994B1 (ko) 2008-10-15 2011-02-14 삼성전기주식회사 전자 소자 내장 인쇄회로기판 및 그 제조 방법
KR101048515B1 (ko) * 2008-10-15 2011-07-12 삼성전기주식회사 전자 소자 내장 인쇄회로기판 및 그 제조 방법
DE102008043122A1 (de) * 2008-10-23 2010-04-29 Robert Bosch Gmbh Elektrische Schaltungsanordnung sowie Verfahren zum Herstellen einer elektrischen Schaltungsanordnung
JP5833926B2 (ja) * 2008-10-30 2015-12-16 アーテー・ウント・エス・オーストリア・テヒノロギー・ウント・ジュステームテッヒニク・アクチェンゲゼルシャフトAt & S Austria Technologie & Systemtechnik Aktiengesellschaft 電子構成部品をプリント回路基板に組み込むための方法
KR20100048610A (ko) * 2008-10-31 2010-05-11 삼성전자주식회사 반도체 패키지 및 그 형성 방법
KR100999539B1 (ko) 2008-11-04 2010-12-08 삼성전기주식회사 전자소자 내장형 인쇄회로기판 및 그 제조방법
KR100972051B1 (ko) 2008-11-07 2010-07-23 삼성전기주식회사 전자 소자 내장 인쇄회로기판 및 그 제조 방법
KR100972050B1 (ko) 2008-11-07 2010-07-23 삼성전기주식회사 전자 소자 내장 인쇄회로기판 및 그 제조 방법
KR101047484B1 (ko) * 2008-11-07 2011-07-08 삼성전기주식회사 전자 소자 내장 인쇄회로기판 및 그 제조 방법
KR100986831B1 (ko) 2008-11-07 2010-10-12 삼성전기주식회사 전자 소자 내장 인쇄회로기판 및 그 제조 방법
JP5161732B2 (ja) * 2008-11-11 2013-03-13 新光電気工業株式会社 半導体装置の製造方法
US8124449B2 (en) 2008-12-02 2012-02-28 Infineon Technologies Ag Device including a semiconductor chip and metal foils
FI122216B (fi) 2009-01-05 2011-10-14 Imbera Electronics Oy Rigid-flex moduuli
FI20095110A0 (fi) * 2009-02-06 2009-02-06 Imbera Electronics Oy Elektroniikkamoduuli, jossa on EMI-suoja
FI20095557A0 (fi) 2009-05-19 2009-05-19 Imbera Electronics Oy Valmistusmenetelmä ja elektroniikkamoduuli, joka tarjoaa uusia mahdollisuuksia johdevedoille
KR101084910B1 (ko) * 2009-10-12 2011-11-17 삼성전기주식회사 전자부품 내장형 인쇄회로기판 및 그 제조방법
KR101104210B1 (ko) * 2010-03-05 2012-01-10 삼성전기주식회사 전자소자 내장형 인쇄회로기판 및 그 제조방법
US8735735B2 (en) 2010-07-23 2014-05-27 Ge Embedded Electronics Oy Electronic module with embedded jumper conductor
KR101075645B1 (ko) * 2010-08-18 2011-10-21 삼성전기주식회사 임베디드 회로기판의 제조 방법
AT13055U1 (de) * 2011-01-26 2013-05-15 Austria Tech & System Tech Verfahren zur integration eines elektronischen bauteils in eine leiterplatte oder ein leiterplatten-zwischenprodukt sowie leiterplatte oder leiterplatten-zwischenprodukt
US8923008B2 (en) 2011-03-08 2014-12-30 Ibiden Co., Ltd. Circuit board and method for manufacturing circuit board
WO2012164719A1 (ja) * 2011-06-02 2012-12-06 株式会社メイコー 部品内蔵基板及びその製造方法
WO2012164720A1 (ja) * 2011-06-02 2012-12-06 株式会社メイコー 部品内蔵基板及びその製造方法
KR101216414B1 (ko) 2011-06-30 2012-12-28 아페리오(주) 인쇄회로기판의 제조방법
JP2013211519A (ja) * 2012-02-29 2013-10-10 Ngk Spark Plug Co Ltd 多層配線基板の製造方法
US8860202B2 (en) * 2012-08-29 2014-10-14 Macronix International Co., Ltd. Chip stack structure and manufacturing method thereof
WO2014041628A1 (ja) * 2012-09-12 2014-03-20 株式会社メイコー 部品内蔵基板及びその製造方法
US20150041993A1 (en) * 2013-08-06 2015-02-12 Infineon Technologies Ag Method for manufacturing a chip arrangement, and a chip arrangement
US9941229B2 (en) 2013-10-31 2018-04-10 Infineon Technologies Ag Device including semiconductor chips and method for producing such device
US10219384B2 (en) 2013-11-27 2019-02-26 At&S Austria Technologie & Systemtechnik Aktiengesellschaft Circuit board structure
AT515101B1 (de) 2013-12-12 2015-06-15 Austria Tech & System Tech Verfahren zum Einbetten einer Komponente in eine Leiterplatte
US11523520B2 (en) * 2014-02-27 2022-12-06 At&S Austria Technologie & Systemtechnik Aktiengesellschaft Method for making contact with a component embedded in a printed circuit board
GB2524791B (en) * 2014-04-02 2018-10-03 At & S Austria Tech & Systemtechnik Ag Placement of component in circuit board intermediate product by flowable adhesive layer on carrier substrate
KR101630435B1 (ko) * 2014-04-21 2016-06-15 주식회사 심텍 임베디드 인쇄회로기판 및 그 제조 방법
KR101640751B1 (ko) 2014-09-05 2016-07-20 대덕전자 주식회사 인쇄회로기판 및 제조방법
US10079156B2 (en) 2014-11-07 2018-09-18 Advanced Semiconductor Engineering, Inc. Semiconductor package including dielectric layers defining via holes extending to component pads
US9721799B2 (en) 2014-11-07 2017-08-01 Advanced Semiconductor Engineering, Inc. Semiconductor package with reduced via hole width and reduced pad patch and manufacturing method thereof
US9420695B2 (en) 2014-11-19 2016-08-16 Advanced Semiconductor Engineering, Inc. Semiconductor package structure and semiconductor process
US9426891B2 (en) 2014-11-21 2016-08-23 Advanced Semiconductor Engineering, Inc. Circuit board with embedded passive component and manufacturing method thereof
DE102015214219A1 (de) 2015-07-28 2017-02-02 Osram Opto Semiconductors Gmbh Verfahren zur Herstellung eines Bauelements und ein Bauelement
DE102016219116A1 (de) * 2016-09-30 2018-04-05 Robert Bosch Gmbh Verfahren zum Herstellen einer elektronischen Baugruppe und elektronische Baugruppe, insbesondere für ein Getriebesteuermodul
JP6708264B2 (ja) * 2016-12-21 2020-06-10 株式会社村田製作所 電子部品内蔵基板の製造方法、電子部品内蔵基板、電子部品装置及び通信モジュール
US10057989B1 (en) * 2017-04-10 2018-08-21 Tactotek Oy Multilayer structure and related method of manufacture for electronics
TWI771610B (zh) * 2019-09-02 2022-07-21 矽品精密工業股份有限公司 電子封裝件及其承載結構與製法
DE102020200974A1 (de) * 2020-01-28 2021-07-29 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Antennenmodul

Family Cites Families (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4246595A (en) * 1977-03-08 1981-01-20 Matsushita Electric Industrial Co., Ltd. Electronics circuit device and method of making the same
DE3248385A1 (de) * 1982-12-28 1984-06-28 GAO Gesellschaft für Automation und Organisation mbH, 8000 München Ausweiskarte mit integriertem schaltkreis
JPS6079770U (ja) 1983-11-07 1985-06-03 関西日本電気株式会社 積層型ハイブリツドic
FR2599893B1 (fr) 1986-05-23 1996-08-02 Ricoh Kk Procede de montage d'un module electronique sur un substrat et carte a circuit integre
JPH0744320B2 (ja) * 1989-10-20 1995-05-15 松下電器産業株式会社 樹脂回路基板及びその製造方法
US5355102A (en) * 1990-04-05 1994-10-11 General Electric Company HDI impedance matched microwave circuit assembly
JP3094481B2 (ja) 1991-03-13 2000-10-03 松下電器産業株式会社 電子回路装置とその製造方法
US5353498A (en) * 1993-02-08 1994-10-11 General Electric Company Method for fabricating an integrated circuit module
US5306670A (en) * 1993-02-09 1994-04-26 Texas Instruments Incorporated Multi-chip integrated circuit module and method for fabrication thereof
US5353195A (en) * 1993-07-09 1994-10-04 General Electric Company Integral power and ground structure for multi-chip modules
US5552633A (en) * 1995-06-06 1996-09-03 Martin Marietta Corporation Three-dimensional multimodule HDI arrays with heat spreading
JP2830812B2 (ja) * 1995-12-27 1998-12-02 日本電気株式会社 多層プリント配線板の製造方法
JP3928753B2 (ja) * 1996-08-06 2007-06-13 日立化成工業株式会社 マルチチップ実装法、および接着剤付チップの製造方法
EP0952762B1 (de) * 1996-12-19 2011-10-12 Ibiden Co, Ltd. Leiterplatte und verfahren zur herstellung dieser
JPH10223800A (ja) * 1997-02-12 1998-08-21 Shinko Electric Ind Co Ltd 半導体パッケージの製造方法
US6038133A (en) * 1997-11-25 2000-03-14 Matsushita Electric Industrial Co., Ltd. Circuit component built-in module and method for producing the same
JP2000311229A (ja) 1999-04-27 2000-11-07 Hitachi Ltd Icカード及びその製造方法
JP2001053447A (ja) 1999-08-05 2001-02-23 Iwaki Denshi Kk 部品内蔵型多層配線基板およびその製造方法
DE19940480C2 (de) * 1999-08-26 2001-06-13 Orga Kartensysteme Gmbh Leiterbahnträgerschicht zur Einlaminierung in eine Chipkarte, Chipkarte mit einer Leiterbahnträgerschicht und Verfahren zur Herstellung einer Chipkarte
US6284564B1 (en) * 1999-09-20 2001-09-04 Lockheed Martin Corp. HDI chip attachment method for reduced processing
US6271469B1 (en) * 1999-11-12 2001-08-07 Intel Corporation Direct build-up layer on an encapsulated die package
US6154366A (en) * 1999-11-23 2000-11-28 Intel Corporation Structures and processes for fabricating moisture resistant chip-on-flex packages
JP3451373B2 (ja) 1999-11-24 2003-09-29 オムロン株式会社 電磁波読み取り可能なデータキャリアの製造方法
US6475877B1 (en) * 1999-12-22 2002-11-05 General Electric Company Method for aligning die to interconnect metal on flex substrate
US6396148B1 (en) * 2000-02-10 2002-05-28 Epic Technologies, Inc. Electroless metal connection structures and methods
US6489185B1 (en) * 2000-09-13 2002-12-03 Intel Corporation Protective film for the fabrication of direct build-up layers on an encapsulated die package
US6713859B1 (en) * 2000-09-13 2004-03-30 Intel Corporation Direct build-up layer on an encapsulated die package having a moisture barrier structure
US6876072B1 (en) 2000-10-13 2005-04-05 Bridge Semiconductor Corporation Semiconductor chip assembly with chip in substrate cavity
TW511405B (en) * 2000-12-27 2002-11-21 Matsushita Electric Industrial Co Ltd Device built-in module and manufacturing method thereof
JP2003037205A (ja) 2001-07-23 2003-02-07 Sony Corp Icチップ内蔵多層基板及びその製造方法
FI115285B (fi) * 2002-01-31 2005-03-31 Imbera Electronics Oy Menetelmä komponentin upottamiseksi alustaan ja kontaktin muodostamiseksi
US6701614B2 (en) * 2002-02-15 2004-03-09 Advanced Semiconductor Engineering Inc. Method for making a build-up package of a semiconductor
JP2003249763A (ja) * 2002-02-25 2003-09-05 Fujitsu Ltd 多層配線基板及びその製造方法
WO2003083543A1 (en) * 2002-04-01 2003-10-09 Ibiden Co., Ltd. Ic chip mounting substrate, ic chip mounting substrate manufacturing method, optical communication device, and optical communication device manufacturing method
US6876082B2 (en) * 2002-08-08 2005-04-05 Taiwan Semiconductor Manufacturing Co., Ltd. Refractory metal nitride barrier layer with gradient nitrogen concentration
FI20031341L (fi) * 2003-09-18 2005-03-19 Imbera Electronics Oy Menetelmä elektroniikkamoduulin valmistamiseksi
JP2006216711A (ja) * 2005-02-02 2006-08-17 Ibiden Co Ltd 多層プリント配線板

Also Published As

Publication number Publication date
JP4205749B2 (ja) 2009-01-07
CN101546759A (zh) 2009-09-30
US7663215B2 (en) 2010-02-16
WO2004089048A1 (en) 2004-10-14
CA2520992C (en) 2013-01-22
CN1771767A (zh) 2006-05-10
FI115601B (fi) 2005-05-31
CN100556233C (zh) 2009-10-28
US8034658B2 (en) 2011-10-11
FI20030493L (fi) 2004-10-02
US20060278967A1 (en) 2006-12-14
BRPI0408964B1 (pt) 2017-05-09
FI20030493A0 (fi) 2003-04-01
BRPI0408964A (pt) 2006-04-04
KR100687976B1 (ko) 2007-02-27
MXPA05010527A (es) 2006-03-10
HK1089328A1 (zh) 2006-11-24
CN101546759B (zh) 2011-07-06
JP2006523375A (ja) 2006-10-12
EP1609339B1 (de) 2011-10-26
CA2520992A1 (en) 2004-10-14
KR20060005348A (ko) 2006-01-17
US20100062568A1 (en) 2010-03-11
EP1609339A1 (de) 2005-12-28

Similar Documents

Publication Publication Date Title
ATE531242T1 (de) Verfahren zur herstellung eines elektronsichen moduls und elektronisches modul
FI20031201L (fi) Menetelmä elektroniikkamoduulin valmistamiseksi ja elektroniikkamoduuli
ATE557419T1 (de) Verfahren zur herstellung eines halbleiterbauelements
FI20031341A7 (fi) Menetelmä elektroniikkamoduulin valmistamiseksi
FI20030293A7 (fi) Menetelmä elektroniikkamoduulin valmistamiseksi ja elektroniikkamoduuli
TW200519989A (en) Film capacitor, built-in high-density assembled substrate thereof, and method for making said film capacitor
ATE250806T1 (de) Verfahren zur vertikalen integration von elektrischen bauelementen mittels rückseitenkontaktierung
DE60300619D1 (de) Verfahren zum einbetten einer komponente in eine basis und zur bildung eines kontakts
ATE524955T1 (de) Verfahren zur herstellung eines elektronischen moduls
SE0801620L (sv) Metoder för tillverkning av en startsubstratskiva för halvledartillverkning, med skivgenomgående anslutningar
MXPA06000842A (es) Tarjeta de circuito impreso con componentes empotrados y metodo de fabricacion.
TW200605266A (en) Manufacturing method of semiconductor device having groove wiring or connecting hole
FI20041680A7 (fi) Elektroniikkamoduuli ja menetelmä sen valmistamiseksi
DE502005007956D1 (de) Smartcard-Körper, Smartcard und Herstellungsverfahren
TW200644297A (en) Semiconductor apparatus and manufacturing method thereof
FI20075593A7 (fi) Menetelmä valmistaa komponenttiin upotettu piirilevy
MY137304A (en) Jig for holding and conveyance, and holding and conveyance method
WO2007025521A3 (de) Verfahren zur herstellung eines halbleiterbauelements mit einer planaren kontaktierung und halbleiterbauelement
ATE408898T1 (de) Leistungshalbleitermodul mit isolationszwischenlage und verfahren zu seiner herstellung
ATE341799T1 (de) Datenträger mit transponderspule
MY141591A (en) Metal pattern formation
WO2006034696A3 (de) Schicht zwischen grenzflächen unterschiedlicher komponenten in halbleiterbauteilen, sowie verfahren zu deren herstellung
TWI267173B (en) Circuit device and method for manufacturing thereof
MX2007003615A (es) Circuito integrado y metodo de fabricacion.
TW200625476A (en) Semiconductor device and manufacturing method thereof

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties