ATE557419T1 - Verfahren zur herstellung eines halbleiterbauelements - Google Patents

Verfahren zur herstellung eines halbleiterbauelements

Info

Publication number
ATE557419T1
ATE557419T1 AT03710424T AT03710424T ATE557419T1 AT E557419 T1 ATE557419 T1 AT E557419T1 AT 03710424 T AT03710424 T AT 03710424T AT 03710424 T AT03710424 T AT 03710424T AT E557419 T1 ATE557419 T1 AT E557419T1
Authority
AT
Austria
Prior art keywords
conductive portion
producing
semiconductor component
insulating layer
depression
Prior art date
Application number
AT03710424T
Other languages
English (en)
Inventor
Ikuya Miyazawa
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Application granted granted Critical
Publication of ATE557419T1 publication Critical patent/ATE557419T1/de

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • HELECTRICITY
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
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    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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    • H01L23/481Internal lead connections, e.g. via connections, feedthrough structures
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AT03710424T 2002-03-19 2003-03-19 Verfahren zur herstellung eines halbleiterbauelements ATE557419T1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2002076307 2002-03-19
JP2003007276 2003-01-15
PCT/JP2003/003301 WO2003079430A1 (en) 2002-03-19 2003-03-19 Semiconductor device and its manufacturing method, circuit board and electronic apparatus

Publications (1)

Publication Number Publication Date
ATE557419T1 true ATE557419T1 (de) 2012-05-15

Family

ID=28043774

Family Applications (1)

Application Number Title Priority Date Filing Date
AT03710424T ATE557419T1 (de) 2002-03-19 2003-03-19 Verfahren zur herstellung eines halbleiterbauelements

Country Status (8)

Country Link
US (1) US6841849B2 (de)
EP (1) EP1391923B1 (de)
JP (1) JP4129643B2 (de)
KR (1) KR100512817B1 (de)
CN (1) CN1279605C (de)
AT (1) ATE557419T1 (de)
TW (1) TW594972B (de)
WO (1) WO2003079430A1 (de)

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JP2004297019A (ja) * 2003-03-28 2004-10-21 Seiko Epson Corp 半導体装置、回路基板及び電子機器
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JP3646719B2 (ja) * 2003-06-19 2005-05-11 セイコーエプソン株式会社 半導体装置及びその製造方法、回路基板並びに電子機器
DE10342559B3 (de) * 2003-09-15 2005-04-14 Infineon Technologies Ag Randstruktur eines Leistungshalbleiterbauelementes und ihr Herstellungsverfahren
US8084866B2 (en) 2003-12-10 2011-12-27 Micron Technology, Inc. Microelectronic devices and methods for filling vias in microelectronic devices
JP4706180B2 (ja) * 2003-12-22 2011-06-22 セイコーエプソン株式会社 半導体装置の製造方法
JP3698160B2 (ja) * 2004-01-09 2005-09-21 セイコーエプソン株式会社 半導体装置の製造方法
US20050247894A1 (en) 2004-05-05 2005-11-10 Watkins Charles M Systems and methods for forming apertures in microfeature workpieces
JP2005353682A (ja) * 2004-06-08 2005-12-22 Seiko Epson Corp 回路素子の製造方法、電子素子の製造方法、回路基板、電子機器、および電気光学装置
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TWI250834B (en) * 2004-11-03 2006-03-01 Phoenix Prec Technology Corp Method for fabricating electrical connections of circuit board
JP4170313B2 (ja) * 2005-05-24 2008-10-22 シャープ株式会社 半導体装置の製造方法
US7795134B2 (en) * 2005-06-28 2010-09-14 Micron Technology, Inc. Conductive interconnect structures and formation methods using supercritical fluids
US7863187B2 (en) * 2005-09-01 2011-01-04 Micron Technology, Inc. Microfeature workpieces and methods for forming interconnects in microfeature workpieces
US7622377B2 (en) * 2005-09-01 2009-11-24 Micron Technology, Inc. Microfeature workpiece substrates having through-substrate vias, and associated methods of formation
US7262134B2 (en) 2005-09-01 2007-08-28 Micron Technology, Inc. Microfeature workpieces and methods for forming interconnects in microfeature workpieces
TWI287273B (en) * 2006-01-25 2007-09-21 Advanced Semiconductor Eng Three dimensional package and method of making the same
TWI293499B (en) 2006-01-25 2008-02-11 Advanced Semiconductor Eng Three dimensional package and method of making the same
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US7629249B2 (en) 2006-08-28 2009-12-08 Micron Technology, Inc. Microfeature workpieces having conductive interconnect structures formed by chemically reactive processes, and associated systems and methods
US7902643B2 (en) * 2006-08-31 2011-03-08 Micron Technology, Inc. Microfeature workpieces having interconnects and conductive backplanes, and associated systems and methods
JP2008166652A (ja) * 2007-01-05 2008-07-17 Nippon Telegr & Teleph Corp <Ntt> 半導体装置の製造方法
JP4265668B2 (ja) * 2007-03-08 2009-05-20 ソニー株式会社 回路基板の製造方法および回路基板
JP4534096B2 (ja) * 2007-04-12 2010-09-01 ローム株式会社 半導体チップおよびその製造方法、ならびに半導体装置
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KR101215648B1 (ko) * 2011-02-11 2012-12-26 에스케이하이닉스 주식회사 반도체 칩 및 그 제조방법
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TW200305992A (en) 2003-11-01
KR100512817B1 (ko) 2005-09-06
EP1391923A4 (de) 2005-06-15
TW594972B (en) 2004-06-21
US6841849B2 (en) 2005-01-11
EP1391923A1 (de) 2004-02-25
US20040155330A1 (en) 2004-08-12
JPWO2003079430A1 (ja) 2005-07-21
KR20040012897A (ko) 2004-02-11
EP1391923B1 (de) 2012-05-09
CN1533604A (zh) 2004-09-29
WO2003079430A1 (en) 2003-09-25
CN1279605C (zh) 2006-10-11

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