WO2016114118A1 - 回路基板およびその製造方法 - Google Patents
回路基板およびその製造方法 Download PDFInfo
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- WO2016114118A1 WO2016114118A1 PCT/JP2016/000079 JP2016000079W WO2016114118A1 WO 2016114118 A1 WO2016114118 A1 WO 2016114118A1 JP 2016000079 W JP2016000079 W JP 2016000079W WO 2016114118 A1 WO2016114118 A1 WO 2016114118A1
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B9/00—Layered products comprising a layer of a particular substance not covered by groups B32B11/00 - B32B29/00
- B32B9/005—Layered products comprising a layer of a particular substance not covered by groups B32B11/00 - B32B29/00 comprising one layer of ceramic material, e.g. porcelain, ceramic tile
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- C—CHEMISTRY; METALLURGY
- C03—GLASS; MINERAL OR SLAG WOOL
- C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
- C03C10/00—Devitrified glass ceramics, i.e. glass ceramics having a crystalline phase dispersed in a glassy phase and constituting at least 50% by weight of the total composition
- C03C10/0054—Devitrified glass ceramics, i.e. glass ceramics having a crystalline phase dispersed in a glassy phase and constituting at least 50% by weight of the total composition containing PbO, SnO2, B2O3
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- C—CHEMISTRY; METALLURGY
- C03—GLASS; MINERAL OR SLAG WOOL
- C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
- C03C4/00—Compositions for glass with special properties
- C03C4/14—Compositions for glass with special properties for electro-conductive glass
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- C—CHEMISTRY; METALLURGY
- C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
- C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
- C04B35/00—Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products
- C04B35/622—Forming processes; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products
- C04B35/626—Preparing or treating the powders individually or as batches ; preparing or treating macroscopic reinforcing agents for ceramic products, e.g. fibres; mechanical aspects section B
- C04B35/63—Preparing or treating the powders individually or as batches ; preparing or treating macroscopic reinforcing agents for ceramic products, e.g. fibres; mechanical aspects section B using additives specially adapted for forming the products, e.g.. binder binders
- C04B35/6303—Inorganic additives
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/15—Ceramic or glass substrates
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
- H05K1/092—Dispersed materials, e.g. conductive pastes or inks
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
- H05K3/1283—After-treatment of the printed patterns, e.g. sintering or curing methods
- H05K3/1291—Firing or sintering at relative high temperatures for patterns on inorganic boards, e.g. co-firing of circuits on green ceramic sheets
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/28—Applying non-metallic protective coatings
- H05K3/285—Permanent coating compositions
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
- H05K3/4061—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in inorganic insulating substrates
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B2307/00—Properties of the layers or laminate
- B32B2307/20—Properties of the layers or laminate having particular electrical or magnetic properties, e.g. piezoelectric
- B32B2307/202—Conductive
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- C—CHEMISTRY; METALLURGY
- C03—GLASS; MINERAL OR SLAG WOOL
- C03C—CHEMICAL COMPOSITION OF GLASSES, GLAZES OR VITREOUS ENAMELS; SURFACE TREATMENT OF GLASS; SURFACE TREATMENT OF FIBRES OR FILAMENTS MADE FROM GLASS, MINERALS OR SLAGS; JOINING GLASS TO GLASS OR OTHER MATERIALS
- C03C2204/00—Glasses, glazes or enamels with special properties
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- C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
- C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
- C04B2237/00—Aspects relating to ceramic laminates or to joining of ceramic articles with other articles by heating
- C04B2237/30—Composition of layers of ceramic laminates or of ceramic or metallic articles to be joined by heating, e.g. Si substrates
- C04B2237/40—Metallic
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- C04B2237/00—Aspects relating to ceramic laminates or to joining of ceramic articles with other articles by heating
- C04B2237/50—Processing aspects relating to ceramic laminates or to the joining of ceramic articles with other articles by heating
- C04B2237/70—Forming laminates or joined articles comprising layers of a specific, unusual thickness
- C04B2237/704—Forming laminates or joined articles comprising layers of a specific, unusual thickness of one or more of the ceramic layers or articles
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0137—Materials
- H05K2201/017—Glass ceramic coating, e.g. formed on inorganic substrate
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/07—Electric details
- H05K2201/0753—Insulation
- H05K2201/0769—Anti metal-migration, e.g. avoiding tin whisker growth
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
- H05K2203/1126—Firing, i.e. heating a powder or paste above the melting temperature of at least one of its constituents
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
- H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49163—Manufacturing circuit on or in base with sintering of base
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/12—All metal or with adjacent metals
- Y10T428/12458—All metal or with adjacent metals having composition, density, or hardness gradient
Definitions
- the present invention relates to a circuit board and a manufacturing method thereof.
- Some circuit boards use ceramic substrates mainly made of alumina, mullite, silicon nitride, aluminum nitride, glass ceramics, and the like.
- a substrate in which a conductive pattern mainly made of silver (Ag) and a coating layer containing a glass component and covering the conductive pattern are formed on the surface of the ceramic substrate is known.
- the covering layer is also called an overcoat glass layer.
- the conductor pattern and the coating layer are formed by applying a conductor paste and a glass paste to the surface of the ceramic substrate and then firing.
- the present invention has been made to solve the above-described problems, and can be realized as the following modes.
- An embodiment of the present invention includes a ceramic substrate having a surface mainly made of ceramics; a conductor pattern formed on the surface of the ceramic substrate and mainly made of silver (Ag); and a glass component; Provided is a circuit board manufacturing method for manufacturing a circuit board formed on the surface of the ceramic substrate and having a coating layer covering the conductor pattern.
- the manufacturing method includes a step of firing the ceramic substrate; a step of producing a conductor paste in which at least one of a metal boride and a metal silicide is added to silver (Ag) powder; and the fired ceramic substrate Applying the conductive paste to the surface of the ceramic substrate; applying the conductive paste and then applying a glass paste to the surface of the ceramic substrate; and firing the conductive paste applied to the surface A step of forming a conductor pattern; and a step of forming the coating layer by firing the glass paste applied to the surface.
- the metal boride may include at least one of lanthanum hexaboride (LaB 6 ), silicon hexaboride (SiB 6 ), and titanium diboride (TiB 2 ). Good. According to this embodiment, diffusion of the silver component from the conductor pattern to the coating layer can be suppressed.
- the metal silicide may include at least one disilicide zirconium (Zisi 2) and secondary tantalum silicide (TaSi 2). According to this embodiment, diffusion of the silver component from the conductor pattern to the coating layer can be suppressed.
- 3 volume% or more and 15 volume% or less may be sufficient as content which match
- the step of producing the conductor paste includes a step of attaching the powder of at least one of the metal boride and the metal silicide to the surface of the silver (Ag) powder. But you can. According to this form, the diffusion of the silver component from the conductor pattern to the coating layer can be further suppressed.
- An embodiment of the present invention includes a ceramic substrate having a surface mainly made of ceramics; a conductor pattern formed on the surface of the ceramic substrate and mainly made of silver (Ag); and a glass component; Provided is a circuit board comprising a coating layer formed on the surface of the ceramic substrate and covering the conductor pattern.
- the concentration of at least one of silicon atoms (Si) and boron atoms (B) contained in the coating layer increases as the conductor pattern is approached in a region adjacent to the conductor pattern. According to this embodiment, it is possible to suppress a decrease in electrical insulation and discoloration in the coating layer. As a result, the quality of the circuit board can be improved.
- the present invention is not limited to the circuit board and the manufacturing method thereof, and can be realized in various forms.
- the invention can be realized in the form of an apparatus including the circuit board, a manufacturing apparatus for manufacturing the circuit board, and the like.
- FIG. 1 is an explanatory view schematically showing a cross section of a circuit board 100.
- the circuit board 100 is formed with at least a part of a circuit that realizes a predetermined function.
- the circuit board 100 is formed with a circuit for transmitting a signal to the electronic component.
- the circuit board 100 includes a ceramic substrate 110, a conductor pattern 170, and a covering layer 180.
- the ceramic substrate 110 of the circuit board 100 is a plate-shaped ceramic.
- the ceramic substrate 110 is mainly made of glass ceramics.
- “consisting mainly of (component)” means that the component occupies 50% by mass or more of the whole.
- the main component of the ceramic substrate 110 may be other ceramic materials such as alumina, mullite, silicon nitride, aluminum nitride.
- the ceramic substrate 110 is a low-temperature fired ceramic substrate.
- the ceramic substrate 110 has a structure in which a plurality of insulating ceramic layers (not shown) are stacked.
- the ceramic substrate 110 is provided with conductor layers, vias, through holes, and the like (not shown) as conductors constituting the circuit.
- the ceramic substrate 110 has surfaces 111 and 112.
- the front surface 112 is a back surface disposed at a position facing the front surface 111.
- a conductor pattern 170 and a covering layer 180 are formed on the surface 111.
- the conductive pattern 170 and the covering layer 180 may be formed on the surface 112 as well as the surface 111.
- the surfaces 111 and 112 are mainly made of ceramics.
- the surfaces 111 and 112 are surfaces of a ceramic layer obtained by firing borosilicate glass powder and alumina (Al 2 O 3 ) powder.
- Borosilicate glass mainly contains silicon dioxide (SiO 2 ), alumina (Al 2 O 3 ), and boron oxide (B 2 O 3 ).
- the conductor pattern 170 of the circuit board 100 is a conductive ceramic formed on the surface 111 of the ceramic substrate 110.
- the conductor pattern 170 is mainly made of silver (Ag).
- the conductor pattern 170 includes silver (Ag) powder and borosilicate glass powder, and has conductivity.
- the entire conductor pattern 170 is covered with the covering layer 180.
- a part of the conductor pattern 170 may be exposed from the coating layer 180.
- the thickness of the conductor pattern 170 is about 10 ⁇ m.
- the covering layer 180 of the circuit board 100 is an insulating ceramic formed on the surface 111 of the ceramic substrate 110.
- the coating layer 180 contains a glass component.
- the covering layer 180 is also referred to as an overcoat glass layer.
- the covering layer 180 is mainly made of glass ceramics.
- the coating layer 180 is an insulating ceramic obtained by firing borosilicate glass powder and alumina (Al 2 O 3 ) powder.
- the covering layer 180 covers at least a part of the conductor pattern 170. In the present embodiment, the thickness of the covering layer 180 is about 10 to 20 ⁇ m.
- the covering layer 180 has a region 181 adjacent to the conductor pattern 170.
- the concentration of at least one of silicon atoms (Si) and boron atoms (B) contained in the coating layer 180 increases as the conductor pattern 170 is approached in the region 181 adjacent to the conductor pattern 170.
- FIG. 2 is a process diagram showing a method for manufacturing the circuit board 100.
- the ceramic substrate 110 is produced by firing (process P110).
- a green sheet as a base of the ceramic substrate 110 is produced.
- the green sheet is formed by mixing an inorganic component powder with a binder (binder), a plasticizer, a solvent, and the like to form a thin plate (sheet).
- borosilicate glass powder and alumina powder which are inorganic component powders, are weighed so that the volume ratio is 60:40 and the total amount is 1 kg, and these powders are then made into an alumina container (pot). Put in.
- the ceramic slurry is obtained by mixing the materials in the pot for 5 hours.
- a green sheet is produced from the ceramic slurry by a doctor blade method.
- the green sheet has a thickness of 0.15 mm.
- the green sheet is formed by punching.
- the conductor paste is a paste in which a binder, a plasticizer, a solvent, and the like are mixed with powder of an inorganic component obtained by mixing silver (Ag) powder and borosilicate glass powder.
- a conductive paste is obtained by adding ethyl cellulose as a binder and terpineol as a solvent to an inorganic component powder and then kneading the material using a three-roll mill. Thereafter, a conductor paste is applied to the green sheet by screen printing and hole filling printing.
- a laminate in which a plurality of green sheets are laminated is prepared.
- the laminate is formed into a shape suitable for firing by cutting.
- the laminate is degreased by exposing the laminate to the atmosphere at 250 ° C. for 10 hours.
- the ceramic substrate 110 is produced by firing the laminate.
- the laminate is baked by exposing the laminate to the atmosphere at 900 ° C. for 60 minutes. The ceramic substrate 110 is obtained through these steps.
- a conductor paste which is a form before firing the conductor pattern 170 is produced (process P120).
- the conductive paste which is a form before firing of the conductive pattern 170, is a paste in which at least one of a metal boride and a metal silicide is added to silver (Ag) powder.
- metal borides added to the conductor paste are lanthanum hexaboride (LaB 6 ), silicon hexaboride (SiB 6 ), and titanium diboride (TiB 2). ) Is preferred.
- a metal silicide to be added to the conductive paste is at least one of disilicide zirconium (Zisi 2) and secondary tantalum silicide (TaSi 2) Is preferred.
- the total content of the metal boride and the metal silicide in the inorganic component contained in the conductor paste is 3% by volume or more and 15% by volume or less. preferable.
- the boron (B) common to the components of the ceramic substrate 110 is added to the silver (Ag) powder as the conductor material as the inorganic component material of the conductor paste.
- a mixed powder prepared by mixing silicate glass powder is prepared. Thereafter, at least one powder of metal boride and metal silicide, ethyl cellulose as a binder, and terpineol as a solvent are added to the mixed powder of inorganic components. Thereafter, the material is kneaded using a three-roll mill to obtain a conductor paste.
- the conductor paste is applied to the surface 111 of the fired ceramic substrate 110 (process P130).
- the conductor paste is applied to the ceramic substrate 110 by screen printing.
- the glass paste which is the form before firing of the coating layer 180 is applied to the surface 111 of the ceramic substrate 110 to which the conductor paste has been applied (process P150).
- a mixed powder prepared by mixing a borosilicate glass powder and an alumina powder is prepared as an inorganic component material of the glass paste.
- ethyl cellulose as a binder and terpineol as a solvent are added to the mixed powder of inorganic components.
- the material is kneaded using a three-roll mill to obtain a glass paste.
- a glass paste is applied to the surface 111 of the ceramic substrate 110 by screen printing.
- the conductive paste and the glass paste applied to the surface 111 of the ceramic substrate 110 are baked to form the conductive pattern 170 and the covering layer 180 (process P160).
- the conductor paste and the glass paste are baked by exposing the ceramic substrate 110 on which the conductor paste and the glass paste are applied in an atmosphere of 850 ° C. for 60 minutes. As a result, the conductor pattern 170 and the covering layer 180 are formed on the surface 111 of the ceramic substrate 110. Through these steps, the circuit board 100 is completed.
- oxygen in the vicinity of the conductor paste is consumed by an oxidation reaction of an additive component (at least one of a metal boride and a metal silicide) included in the conductor paste.
- an additive component at least one of a metal boride and a metal silicide included in the conductor paste.
- At least a part of the additive component oxidized during firing diffuses into the region 181 of the coating layer 180 adjacent to the conductor pattern 170. Therefore, the concentration of at least one of silicon atoms (Si) and boron atoms (B) included in the coating layer 180 increases as the conductor pattern 170 is approached in the region 181 adjacent to the conductor pattern 170.
- FIG. 3 is a table showing the results of the evaluation test.
- samples S01 to S10 were produced as circuit boards 100 using different conductor pastes and glass pastes.
- the content of the additive in the conductor paste that is the form before firing of the conductor pattern 170 indicates the volume percentage of the additive in the inorganic component contained in the conductor paste.
- the manufacturing method of the samples S01 to S07 is the same as the manufacturing method of FIG.
- the manufacturing method of the sample S08 is that the borosilicate glass powder contained in the material of each part of the circuit board 100 is used in place of the Na 2 —ZnO—B 2 O 3 glass powder, and the conductor paste and the glass paste are fired. Except for the temperature being 600 ° C., it is the same as the manufacturing method of FIG.
- the manufacturing method of sample S09 is the same as the manufacturing method of FIG. 2 except that a metal boride and a metal silicide are not added to the conductor paste.
- the manufacturing method of sample S10 is the same as the manufacturing method of sample S08 except that the metal boride and the metal silicide are not added to the conductor paste.
- the diffusion distance of silver to the coating layer 180 was measured by observing the cross section of each sample using a scanning electron microscope (SEM) and an electron beam microanalyzer (EPMA).
- SEM scanning electron microscope
- EPMA electron beam microanalyzer
- the silver (Ag) concentration at the interface between the conductor pattern 170 and the coating layer 180 is used as a reference value, and the distance from the interface to the position where the silver (Ag) concentration is half the reference value in the coating layer 180 is measured at 10 points.
- the average value was obtained as the silver diffusion distance.
- lanthanum hexaboride (LaB 6 ), silicon hexaboride (SiB 6 ), and titanium diboride (TiB 2 ), which are metal borides, were used as conductor patterns. It can be seen that the diffusion of silver into the covering layer 180 can be suppressed by adding to the conductive paste that is the basis of 170.
- the total content of the metal boride and the metal silicide in the inorganic component contained in the conductor paste that is the basis of the conductor pattern 170 is 3% by volume or more and 15% by volume or less. In this case, it can be seen that the diffusion of silver into the coating layer 180 can be sufficiently suppressed.
- the glass paste material is Na 2 —ZnO—B 2 O 3 glass powder
- the glass paste material is borosilicate. It can be seen that the diffusion of silver into the coating layer 180 can be suppressed as in the case of glass.
- the silver component of the conductor pattern 170 is diffused into the coating layer 180 by oxidizing at least one of the metal boride and metal silicide added to the conductor paste during firing. Can be suppressed. Therefore, it is possible to suppress the occurrence of electrical insulation deterioration and discoloration in the coating layer 180. As a result, the quality of the circuit board 100 can be improved.
- the metal boride added to the conductor paste may include at least one of lanthanum hexaboride (LaB 6 ), silicon hexaboride (SiB 6 ), and titanium diboride (TiB 2 ). Thereby, diffusion of the silver component from the conductor pattern to the coating layer can be suppressed.
- LaB 6 lanthanum hexaboride
- SiB 6 silicon hexaboride
- TiB 2 titanium diboride
- the metal silicide is added to the conductive paste may include at least one disilicide zirconium (Zisi 2) and secondary tantalum silicide (TaSi 2). Thereby, diffusion of the silver component from the conductor pattern to the coating layer can be suppressed.
- the silver component is diffused from the conductor pattern 170 to the coating layer 180. It can be suppressed sufficiently.
- the coating layer 180 is formed together with the conductor pattern 170 by firing the glass paste together with the conductor paste (process P160), the manufacturing process is compared with the case where the conductor pattern 170 and the coating layer 180 are separately formed. Can be simplified.
- FIG. 4 is a process diagram showing a method for manufacturing a circuit board 100 in a second embodiment.
- the manufacturing method of 2nd Embodiment is the same as that of 1st Embodiment except the point from which a post process differs from the process (process P130) of apply
- the conductor pattern 170 is formed by firing the conductor paste (process P240).
- the conductor paste is baked by exposing the conductor paste applied to the ceramic substrate 110 in the atmosphere of 850 ° C. for 60 minutes. As a result, a conductor pattern 170 is formed on the surface 111 of the ceramic substrate 110.
- the glass paste which becomes the base of the coating layer 180 is apply
- the method for producing and applying the glass paste in the second embodiment is the same as that in the first embodiment.
- the coating layer 180 is formed by firing the glass paste applied to the surface 111 of the ceramic substrate 110 (process P260).
- the glass paste is fired by exposing the glass paste applied to the ceramic substrate 110 to the atmosphere of 600 ° C. for 60 minutes.
- the coating layer 180 is formed on the surface 111 of the ceramic substrate 110.
- the silver component of the conductor pattern 170 can be prevented from diffusing into the coating layer 180 as in the first embodiment. Therefore, it is possible to suppress the occurrence of electrical insulation deterioration and discoloration in the coating layer 180. As a result, the quality of the circuit board 100 can be improved.
- the glass paste is applied to the surface 111 of the ceramic substrate 110, so that the diffusion of the silver component from the conductor pattern 170 to the coating layer 180 is further suppressed. it can.
- step P120 when preparing the conductor paste from which the conductor pattern 170 is based (step P120), before adding the binder and the solvent to the silver (Ag) powder, at least one of the metal boride and the metal silicide.
- the powder by mixing the powder with silver (Ag) powder, at least one of metal boride and metal silicide may be attached to the surface of the silver (Ag) powder. Thereby, the diffusion of the silver component of 180 from the conductor pattern 170 to the coating layer can be further suppressed.
- the paste serving as the resistor may be applied to the ceramic substrate 110.
- the paste serving as the base of the resistor may be a paste obtained by kneading ruthenium oxide powder and borosilicate glass powder with a binder and a solvent.
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Abstract
Description
図1は、回路基板100の断面を模式的に示す説明図である。回路基板100には、所定の機能を実現する回路の少なくとも一部が形成されている。本実施形態では、回路基板100には、電子部品へ信号を伝達するための回路が形成されている。回路基板100は、セラミック基板110と、導体パターン170と、被覆層180とを備える。
○(優):銀の拡散距離が5μm未満
×(劣):銀の拡散距離が5μm以上
図4は、第2実施形態における回路基板100の製造方法を示す工程図である。第2実施形態の製造方法は、導体ペーストを塗布する工程(工程P130)より後工程が異なる点を除き、第1実施形態と同様である。
本発明は、上述の実施形態や実施例、変形例に限られず、その趣旨を逸脱しない範囲において種々の構成で実現できる。例えば、発明の概要の欄に記載した各形態中の技術的特徴に対応する実施形態、実施例、変形例中の技術的特徴は、上述の課題の一部または全部を解決するために、あるいは、上述の効果の一部または全部を達成するために、適宜、差し替えや、組み合わせを行うことができる。また、その技術的特徴が本明細書中に必須なものとして説明されていなければ、適宜、削除できる。
110…セラミック基板
111…表面
112…表面
170…導体パターン
180…被覆層
181…領域
Claims (8)
- セラミックスから主に成る表面を有するセラミック基板と、
前記セラミック基板の前記表面に形成され、銀(Ag)から主に成る導体パターンと、
ガラス成分を含有し、前記セラミック基板の前記表面に形成され、前記導体パターンを覆う被覆層と
を備える回路基板、を製造する回路基板の製造方法であって、
前記セラミック基板を焼成する工程と、
金属ホウ化物および金属ケイ化物の少なくとも一方の粉末を銀(Ag)粉末に添加した導体ペーストを、作製する工程と、
焼成済みの前記セラミック基板の前記表面に前記導体ペーストを塗布する工程と、
前記導体ペーストを塗布した後、前記セラミック基板の前記表面にガラスペーストを塗布する工程と、
前記表面に塗布した前記導体ペーストを焼成することによって前記導体パターンを形成する工程と、
前記表面に塗布した前記ガラスペーストを焼成することによって前記被覆層を形成する工程と
を備えることを特徴とする回路基板の製造方法。 - 前記金属ホウ化物は、六ホウ化ランタン(LaB6)、六ホウ化ケイ素(SiB6)および二ホウ化チタン(TiB2)のうち少なくとも1つを含む、請求項1に記載の回路基板の製造方法。
- 前記金属ケイ化物は、二ケイ化ジルコニウム(ZiSi2)および二ケイ化タンタル(TaSi2)のうち少なくとも1つを含む、請求項1または請求項2に記載の回路基板の製造方法。
- 前記導体ペーストに含まれる無機成分における前記金属ホウ化物および前記金属ケイ化物を合わせた含有量は、3体積%以上15体積%以下である、請求項1から請求項3までのいずれか一項に記載の回路基板の製造方法。
- 前記導体ペーストを作製する工程は、前記金属ホウ化物および前記金属ケイ化物の少なくとも一方の前記粉末を、前記銀(Ag)粉末の表面に付着させる工程を含む、請求項1から請求項4までのいずれか一項に記載の回路基板の製造方法。
- 前記導体ペーストと共に前記ガラスペーストを焼成することによって、前記導体パターンと共に前記被覆層を形成する、請求項1から請求項5までのいずれか一項に記載の回路基板の製造方法。
- 前記導体ペーストを焼成することによって前記導体パターンを形成した後、前記ガラスペーストを前記セラミック基板の前記表面に塗布する、請求項1から請求項5までのいずれか一項に記載の回路基板の製造方法。
- セラミックスから主に成る表面を有するセラミック基板と、
前記セラミック基板の前記表面に形成され、銀(Ag)から主に成る導体パターンと、
ガラス成分を含有し、前記セラミック基板の前記表面に形成され、前記導体パターンを覆う被覆層と
を備える回路基板であって、
前記被覆層に含まれるケイ素原子(Si)およびホウ素原子(B)の少なくとも一方の濃度は、前記導体パターンに隣接する領域において前記導体パターンに近づくほど高くなることを特徴とする回路基板。
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US15/543,253 US20180035549A1 (en) | 2015-01-13 | 2016-01-08 | Circuit board and production method therefor |
JP2016541738A JP6261746B2 (ja) | 2015-01-13 | 2016-01-08 | 回路基板およびその製造方法 |
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