WO2009151123A1 - はんだペーストを用いた基板と被搭載物の接合方法 - Google Patents

はんだペーストを用いた基板と被搭載物の接合方法 Download PDF

Info

Publication number
WO2009151123A1
WO2009151123A1 PCT/JP2009/060785 JP2009060785W WO2009151123A1 WO 2009151123 A1 WO2009151123 A1 WO 2009151123A1 JP 2009060785 W JP2009060785 W JP 2009060785W WO 2009151123 A1 WO2009151123 A1 WO 2009151123A1
Authority
WO
WIPO (PCT)
Prior art keywords
metallized layer
substrate
solder
solder paste
main body
Prior art date
Application number
PCT/JP2009/060785
Other languages
English (en)
French (fr)
Inventor
石川　雅之
将 中川
Original Assignee
三菱マテリアル株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2008154003A external-priority patent/JP2009302229A/ja
Priority claimed from JP2008221633A external-priority patent/JP2010056399A/ja
Application filed by 三菱マテリアル株式会社 filed Critical 三菱マテリアル株式会社
Priority to EP09762553A priority Critical patent/EP2290676A4/en
Priority to CN2009801204361A priority patent/CN102047397B/zh
Priority to US12/736,986 priority patent/US20110067911A1/en
Publication of WO2009151123A1 publication Critical patent/WO2009151123A1/ja

Links

Images

Classifications

    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K1/00—Soldering, e.g. brazing, or unsoldering
    • B23K1/0008—Soldering, e.g. brazing, or unsoldering specially adapted for particular articles or work
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/001—Interlayers, transition pieces for metallurgical bonding of workpieces
    • B23K35/007—Interlayers, transition pieces for metallurgical bonding of workpieces at least one of the workpieces being of copper or another noble metal
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/02—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape
    • B23K35/0222—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape for use in soldering, brazing
    • B23K35/0244—Powders, particles or spheres; Preforms made therefrom
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/02—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape
    • B23K35/0222—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by mechanical features, e.g. shape for use in soldering, brazing
    • B23K35/0244—Powders, particles or spheres; Preforms made therefrom
    • B23K35/025—Pastes, creams, slurries
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24—Selection of soldering or welding materials proper
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24—Selection of soldering or welding materials proper
    • B23K35/26—Selection of soldering or welding materials proper with the principal constituent melting at less than 400 degrees C
    • B23K35/262—Sn as the principal constituent
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24—Selection of soldering or welding materials proper
    • B23K35/26—Selection of soldering or welding materials proper with the principal constituent melting at less than 400 degrees C
    • B23K35/268—Pb as the principal constituent
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24—Selection of soldering or welding materials proper
    • B23K35/30—Selection of soldering or welding materials proper with the principal constituent melting at less than 1550 degrees C
    • B23K35/3013—Au as the principal constituent
    • C—CHEMISTRY; METALLURGY
    • C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22C—ALLOYS
    • C22C11/00—Alloys based on lead
    • C22C11/06—Alloys based on lead with tin as the next major constituent
    • C—CHEMISTRY; METALLURGY
    • C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22C—ALLOYS
    • C22C13/00—Alloys based on tin
    • C—CHEMISTRY; METALLURGY
    • C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22C—ALLOYS
    • C22C5/00—Alloys based on noble metals
    • C22C5/02—Alloys based on gold
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838—Geometry or layout
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/03—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2101/00—Articles made by soldering, welding or cutting
    • B23K2101/36—Electric or electronic devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K2103/00—Materials to be soldered, welded or cut
    • B23K2103/50—Inorganic material, e.g. metals, not provided for in B23K2103/02 – B23K2103/26
    • B23K2103/52—Ceramics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04026—Bonding areas specifically adapted for layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13111—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13144—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29111—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29116—Lead [Pb] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29144—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3201—Structure
    • H01L2224/32012—Structure relative to the bonding area, e.g. bond pad
    • H01L2224/32014—Structure relative to the bonding area, e.g. bond pad the layer connector being smaller than the bonding area, e.g. bond pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/3205—Shape
    • H01L2224/32052—Shape in top view
    • H01L2224/32055—Shape in top view being circular or elliptic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8312—Aligning
    • H01L2224/83143—Passive alignment, i.e. self alignment, e.g. using surface energy, chemical reactions, thermal equilibrium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83194—Lateral distribution of the layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83385—Shape, e.g. interlocking features
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/95053—Bonding environment
    • H01L2224/95085—Bonding environment being a liquid, e.g. for fluidic self-assembly
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00013—Fully indexed content
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01012—Magnesium [Mg]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01023—Vanadium [V]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01028—Nickel [Ni]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0103—Zinc [Zn]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01049—Indium [In]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0105—Tin [Sn]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01051—Antimony [Sb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01052—Tellurium [Te]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01088—Radium [Ra]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/1026—Compound semiconductors
    • H01L2924/1032—III-V
    • H01L2924/10329—Gallium arsenide [GaAs]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/09381—Shape of non-curved single flat metallic pad, land or exposed part thereof; Shape of electrode of leadless component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/09427—Special relation between the location or dimension of a pad or land and the location or dimension of a terminal
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/12—All metal or with adjacent metals
    • Y10T428/12486—Laterally noncoextensive components [e.g., embedded, etc.]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24777—Edge feature

Definitions

  • the present invention relates to a method for bonding an object to be mounted to a substrate using a solder paste so as to be in the same position and direction, and in particular, an element is the same for a substrate using an Au—Sn alloy solder paste.
  • the present invention relates to a method of joining so as to be in a position and a direction.
  • an Au—Sn alloy solder paste or the like has come to be used for bonding a semiconductor element such as an LED (light emitting diode) element, a GaAs optical element, a GaAs high frequency element, and a heat transfer element to a substrate.
  • This Au—Sn alloy solder paste contains Sn: 15 to 25% by mass (preferably Sn: 20% by mass), and the remainder is composed of Au and inevitable impurities.
  • Au—Sn eutectic alloy gas atomized powder and rosin It is known that it is made by mixing a commercially available flux comprising an activator, a solvent and a thickener.
  • the Au—Sn alloy solder joint layer is an Au—Sn solder alloy
  • the thermal conductivity is good and the joint reliability is high.
  • the Au—Sn alloy solder paste is a paste, it can be supplied to a plurality of joints at a time and further subjected to a heat treatment.
  • the flux covers the Au—Sn solder alloy surface during reflow, there is little oxide film. Therefore, the fluidity of the molten Au—Sn solder alloy at the time of bonding is large, the wettability is improved, and the entire surface of the element can be bonded. Furthermore, it is not necessary to apply an excessive load to the elements during bonding.
  • Au— is formed on the metallized layer 2 formed on the surface of the substrate 1.
  • the Sn alloy solder paste 3 is mounted or applied, and the element 4 is mounted on the Au—Sn alloy solder paste 3 so that the metallized layer 6 of the element 4 is in contact with the Au—Sn alloy solder paste 3.
  • the substrate is heated and reflowed in this state and then cooled, the substrate 1 and the element 4 are bonded via the Au—Sn alloy solder bonding layer 5 as shown in the longitudinal sectional view of FIG. 1 etc.).
  • the area of the metallized layer 2 formed on the surface of the substrate 1 is generally the same as the area of the metallized layer 6 of the element 4 or larger than the area of the metallized layer 6 of the element 4.
  • the element 4 generally has a square shape, but some elements have a rectangular shape.
  • FIG. 15 is a plan view seen from above in FIG. 14A.
  • an Au—Sn alloy solder paste 3 is mounted or applied on the metallized layer 2 of the substrate 1.
  • the element 4 is mounted coaxially and in the same direction at the center of the metallized layer 2 of the substrate 1.
  • the Au—Sn alloy solder melted during the reflow treatment spreads over the entire surface of the metallized layer 2 in the substrate 1 to form the Au—Sn alloy solder bonding layer 5.
  • the element 4 temporarily floats on the molten Au—Sn alloy solder, and at this time, the element 4 rotates or moves.
  • FIG. 16 which is a plan view seen from above in FIG. 14B, the element 4 is formed on the Au—Sn alloy solder joint layer 5 on the metallization layer 2 and the metallization of the substrate 1.
  • the solder bonding is performed with respect to the layer 2 in a state of being inclined and shifted from the center of the metallized layer 2 of the substrate 1.
  • a large number of aligned metallized layers are formed on a wide substrate.
  • An Au—Sn alloy solder paste is mounted or applied on each of the metallized layers, and the elements are regularly mounted on the Au—Sn alloy solder paste.
  • the device is rotated during the reflow process, and the device is solder-joined by being tilted with a shift in a random direction from the central portion with respect to the metallized layer of the aligned substrate, which is not preferable as a product for shipping.
  • the package size is further reduced in the future, there is a concern that contact between the elements may occur when the distance between the elements approaches.
  • the present invention employs the following means.
  • the solder paste may be an Au—Sn alloy solder paste in which a flux is mixed with Au—Sn solder alloy powder containing 20 to 25% by mass of Sn and the balance being Au and inevitable impurities.
  • the solder paste may be a Pb—Sn alloy solder paste containing Pb—Sn solder alloy powder containing 35-60 mass% Pb, the balance being Sn and unavoidable impurities, and flux.
  • the solder paste may be a Pb—Sn alloy solder paste in which a flux is mixed with Pb—Sn solder alloy powder containing 90 to 95% by mass of Pb with the balance being Sn and inevitable impurities.
  • the solder paste contains 40 to 100% by mass of Sn, and the balance is one or more metals selected from the group consisting of Ag, Au, Cu, Bi, Sb, In and Zn, and Pb-free solder paste in which flux is mixed with Pb-free solder alloy powder, which is an inevitable impurity, may be used.
  • the mounted object may be an element.
  • the metallized layer formed on the substrate may be an electrode film.
  • a method of joining a substrate and a mounting object using a solder paste according to another aspect of the present invention is a metallized layer on a substrate on which a metallized layer is formed, and a mounted object having a rectangular shape on which the metallized layer is formed.
  • a step of mounting or applying a solder paste between the formed metallized layer and a step of reflowing in a non-oxidizing atmosphere to bond the substrate and the mounted object are included.
  • the metallized layer formed on the surface of the substrate includes a metallized layer main body part having an area smaller than the area of the metallized layer of the mounted object, and at least two solder attracting protrusions protruding from the periphery of the metallized layer main body part
  • the angle formed by the longitudinal directions of the solder attracting portions adjacent to each other is the same as any of the crossing angles formed by the diagonal lines of the mounted object.
  • the rectangular shape may be a square shape or a rectangular shape.
  • a metallized layer formed on the surface of the substrate which has a planar shape including a metallized layer main body part and a solder attracting part protruding from the periphery of the metallized layer main body part.
  • the metallized layer according to (10) above, wherein the metallized layer formed on the substrate is an electrode film.
  • the substrate according to (12), wherein the metallized layer is an electrode film.
  • the solder paste may be a paste in which a solder alloy powder containing at least Sn and a flux are mixed.
  • all the mounted objects can be soldered together in a desired position and direction.
  • it is a top view for demonstrating the structure before a reflow process.
  • it is a top view for demonstrating the structure after a reflow process.
  • it is a top view which shows the shape of the metallization layer formed in the board
  • it is a top view for demonstrating the structure after a reflow process.
  • it is a top view for demonstrating the structure before a reflow process.
  • it is a top view for demonstrating the structure after a reflow process.
  • it is a top view which shows the joining state of a metallizing layer and a to-be-mounted object.
  • it is a top view which shows the joining state of a metallizing layer and a to-be-mounted object.
  • it is a top view which shows the joining state of a metallizing layer and a to-be-mounted object.
  • it is a top view which shows the joining state of a metallizing layer and a to-be-mounted object. In other embodiment of this invention, it is a top view which shows the joining state of a metallizing layer and a to-be-mounted object. In other embodiment of this invention, it is a top view which shows the joining state of a metallizing layer and a to-be-mounted object. In other embodiment of this invention, it is a top view which shows the joining state of a metallizing layer and a to-be-mounted object. In other embodiment of this invention, it is a top view which shows the joining state of a metallizing layer and a to-be-mounted object.
  • the conventional method it is a longitudinal cross-sectional view for demonstrating the structure before a reflow process. It is a longitudinal cross-sectional view for demonstrating the structure after a reflow process in the conventional method. It is the top view which looked at the board
  • the present inventors have conducted research to develop a method for joining a substrate and an element that can be soldered to the metallized layer of the substrate so that the element is always in the same position and oriented in a certain direction. As a result, it has been found that according to the following embodiment, the position and orientation of the element after soldering can be aligned.
  • the substrate 10 and the element 14 are bonded using the solder paste 13 through the metallized layer 12 of the substrate 10 and the metallized layer 16 of the element 14.
  • the size of the element 14 is not limited in the present invention.
  • the length of one side is 50 ⁇ m to 1 cm and the height is 10 ⁇ m to 5000 ⁇ m.
  • the length of one side is 950 ⁇ m to 1100 ⁇ m, and the height is 90 ⁇ m to 110 ⁇ m.
  • the metallized layer 12 formed on the surface of the substrate 10 includes a metallized layer body portion 12A having a rectangular shape (rectangular shape or square shape), and a metallized layer body. And a solder attracting portion 12B protruding from the periphery of the portion 12A.
  • a thin rectangular solder attracting portion 12B projects vertically from the central portion of one side of the main body portion 12A.
  • the solder attracting portion 12B has a constant width in this embodiment, but may have a trapezoidal shape or a triangular shape that narrows toward the tip.
  • the area of the metallized layer body portion 12A is preferably about 30 to 95% of the area of the element 14.
  • the thickness of the metallized layer 12 is not limited, but is preferably 0.02 ⁇ m or more and 50 ⁇ m or less, for example. More preferably, it is 0.05 ⁇ m or more and 10 ⁇ m or less, for example.
  • the material of the outermost surface of the metallized layer 12 is not limited, but Au, Ag, Cu, etc. are preferable from the viewpoint of solder wettability.
  • the metallized layer is formed by a plating method, a sputtering method, a coating method, or the like.
  • the width W1 of the solder guiding portion 12B is not limited, but for example, it is preferably 5 to 50%, more preferably 10 to 40% of the length of the one side of the main body portion 12A.
  • the length L1 of the solder guiding portion 12B is set such that the tip of the solder attracting portion 12B is aligned with the corner of the element 14 and the solder attracting portion 12B is disposed along the diagonal line of the element 14.
  • the rear end of 12 is preferably such that the entire area of the metallized layer 12 is just hidden by the element 14. That is, it is preferable that the two corners at the rear end of the metallized layer 12 are located immediately below or near the side of the element 14.
  • the length L1 of the solder attracting part 12B is, for example, 20 to 70%, more preferably 30 to 50% of the length of the one side of the metallized layer main body part 12A within a range satisfying the above conditions.
  • the Au—Sn alloy solder paste 13 is mounted on the metallized layer main body portion 12A.
  • the mounting amount of the paste 13 may be the same as that in the past, but specifically, the thickness of the solder joint layer after soldering is preferably about 1 to 25 ⁇ m, more preferably 1 to 10 ⁇ m.
  • an element 14 having an area larger than the area of the metallized layer main body portion 12A is mounted in an arbitrary direction. At this time, in the present invention, since the orientation of the element 14 after soldering can be aligned by the solder attracting portion 12B even if accurate positioning is not performed, the manufacturing cost at the time of assembly is reduced because the positioning accuracy is low. be able to.
  • the element 14 may move to the two-dot chain line portion 14 '.
  • a flow of molten solder from the metallized layer main body portion 42 ⁇ / b> A toward the solder attracting portion 42 ⁇ / b> B may be considered to rotate the element 14.
  • the metallized layer body portion 12A and the solder attracting portion metallized layer 12B protruding from the periphery of the metallized layer body portion 12A include LED (light emitting diode) elements, GaAs optical elements, GaAs high frequency elements, heat transfer elements, etc. It can be used as an electrode film for a semiconductor element or the like.
  • the solder paste is preferably an Au—Sn alloy solder paste, but instead of the Au—Sn alloy solder paste, it contains Pb: 35 to 60% by mass, and the balance: Sn and inevitable impurities.
  • FIGS. 3A-13 Another embodiment of the present invention is shown in FIGS. 3A-13.
  • the shape of the metallized layer main body formed on the substrate is preferably the same shape as the element, but is not particularly limited.
  • the metallized layer 22 may have a circular metallized layer main body portion 22A and a rectangular solder attracting part 22B protruding radially from the outer periphery thereof.
  • the metallized layer main body portion may have an arbitrary planar shape.
  • the solder attraction part should just protrude from the arbitrary positions around the metallization layer main-body part. For example, as shown in FIG.
  • FIG. 4A is a plan view showing still another embodiment.
  • the metallized layer 42 formed on the surface of the substrate 10 protrudes vertically from the square metallized layer main body part 42A and the central part of the four sides of the metallized layer main body part 42A.
  • four solder attracting portions 42B The angle formed between the adjacent solder attracting portions 42B is 90 °, which coincides with the angle formed by the diagonal lines of the elements 14 to be joined.
  • the Au—Sn alloy solder paste 13 is mounted on the metallized layer main body portion 42A, and the square element 14 having an area larger than the area of the metallized layer main body portion 42A on the Au—Sn alloy solder paste 13 is mounted. Is mounted in any orientation.
  • the element 14 is rotated by the surface tension of the molten solder so that the diagonal line of the square-shaped element 14 and the longitudinal direction of the solder attracting portion 42B coincide with each other as shown in the plan view of FIG. 4B. And soldered.
  • all square elements on the substrate 10 are soldered in a certain direction. All other conditions may be the same as in the first embodiment.
  • the metallized layer main body intersects the metallized layer main body portion 52A and the diagonal line of the rectangular element 24 at the same angle as shown in FIG. 5A.
  • a metallized layer 52 having four solder attracting portions 52B formed protruding from the portion 52A is formed.
  • An Au—Sn alloy solder paste 13 is mounted on the metallized layer main body portion 52A.
  • An element 24 having a rectangular shape is mounted on the Au—Sn alloy solder paste 13 so as to face an arbitrary direction.
  • the diagonal direction of the element 24 having a rectangular shape coincides with the direction of the solder attracting portion 52B.
  • the element 24 having a rectangular shape can be soldered in a certain direction. All other conditions may be the same as in the first embodiment.
  • the phenomenon shown in the above (v) is not limited to the substrate and the square-shaped element, but also occurs to a mounted object having a general square shape with respect to the substrate.
  • the phenomenon shown in the above (vi) is not limited to the substrate and the rectangular element, but also occurs to a mounted object having a general rectangular shape that is bonded to the substrate. Therefore, this phenomenon is applied to solder bonding between a substrate and a mounted object having a square shape or between a substrate and a mounted object having a rectangular shape, and the mounted object is soldered to the substrate at a certain position and direction. Can do.
  • FIGS. 6 to 10 includes a metallized layer main body portion and a plurality of solder attracting portions protruding from the periphery of the metallized layer main body portion so as to intersect at the same angle as the diagonal line of the square object (element) 14.
  • the metallized layer is shown.
  • an Au—Sn alloy solder paste is mounted on the metallized layer main body.
  • a square mounting object (element) 14 having an area larger than the area of the metallized layer main body is mounted in an arbitrary direction.
  • FIGS. 6 to 10 also show a state in which the square object to be mounted (element) 14 after the reflow treatment in this state is soldered.
  • the size of the metallized layer main body portion 62 ⁇ / b> A may be the same as the width of the solder attracting part 62 ⁇ / b> B of the metallized layer 62.
  • the metallized layer main body portion 62A only needs to have an area where a solder paste can be mounted or applied.
  • the shape of the solder attracting portion is preferably a strip having a certain width as shown in FIG. 4B, but is not limited thereto.
  • the solder attracting part may have a triangular shape.
  • it may be a metallized layer 72 having a square metallized body portion 72A and triangular solder attracting portions 72B extending from the four sides thereof.
  • it may be a metallized layer 102 having a square metallized body portion 102A and two triangular solder attracting portions 102B extending from two adjacent sides thereof.
  • the number of solder attracting portions is preferably four as shown in FIG. 4B, FIG. 6 and FIG. However, the number may be two as shown in FIGS. 8 to 10, and may be three or five or more.
  • it may be a metallized layer 82 having a square metallized body portion 82A and two solder attracting portions 82B extending vertically from two adjacent sides.
  • a metallized layer 92 having a square metallized layer main body portion 92A and two solder attracting portions 92B having the same width as one side of the metallized layer main body portion 92A may be used.
  • FIG. 11 shows a metallized layer having a rectangular metallized layer body portion 112A and two solder attracting portions 112B protruding from both ends of one short side of the metallized layer body portion 112A.
  • the two solder attracting portions 112B have the same angle as the crossing angle of the two diagonal lines of the rectangular object to be mounted (element).
  • an Au—Sn alloy solder paste is mounted on the metallized layer main body portion 112A.
  • a rectangular object (element) 34 having an area larger than the area of the metallized layer main body is mounted on the Au—Sn alloy solder paste in an arbitrary direction.
  • FIG. 11 shows a state in which the rectangular object (element) 34 having been subjected to the reflow process in this state is soldered.
  • FIG. 12 shows a metallized layer having a rectangular metallized layer main body part 122A and three solder attracting parts 122B protruding from three corners of the metallized layer main body part 122A.
  • the three solder attracting portions 122B have the same angle as the intersection angle of the two diagonal lines of the rectangular object to be mounted (element) at the corresponding locations.
  • an Au—Sn alloy solder paste is mounted on the metallized layer main body portion 122A.
  • a rectangular mounting object (element) 34 is mounted on the Au—Sn alloy solder paste in an arbitrary direction and subjected to a reflow process, whereby the soldered state shown in FIG. 12 is obtained.
  • the shape of the metallization layer may be a shape obtained by removing a semicircular portion from the center of each side of the square metallization layer, as shown in FIG.
  • the metallized layer 132 includes a metallized layer main body portion 132A and four solder guiding portions 132B extending from the periphery to the four sides.
  • an Au—Sn alloy solder powder containing Sn: 20% by mass and having the remaining component composition of Au and having an average particle diameter D 50 : 11.1 ⁇ m and a maximum particle diameter: 20.1 ⁇ m is used. It was.
  • This Au—Sn alloy solder powder is blended with a commercially available RMA flux so that the RMA flux is 8.0% by mass and the balance is the composition of the Au—Sn alloy solder powder, and mixed to obtain a paste viscosity of 85 Pa ⁇ s.
  • An Au—Sn alloy solder paste having the following was prepared. Further, this Au—Sn alloy solder paste was filled in a syringe and mounted on a dispenser device (manufactured by Musashi Engineering, model number: ML-606GX).
  • LED elements having dimensions of length: 400 ⁇ m, width: 400 ⁇ m, and height: 100 ⁇ m are prepared, and the thicknesses: 3 ⁇ m, length: 400 ⁇ m, width: 400 ⁇ m are formed on the entire surface of one side of these LED elements. Having Au plating. Further, an alumina substrate is prepared, and on the surface of the alumina substrate, a Cu layer having a length: 200 ⁇ m, a width: 200 ⁇ m, a thickness: 10 ⁇ m, a Ni layer having a thickness: 5 ⁇ m, and a thickness.
  • the metallized layers shown in FIG. 2A composed of the portions were formed in a row at 50 locations at intervals of 600 ⁇ m as shown in FIG.
  • the Au-Sn alloy solder paste in an amount of 0.03 mg was applied to the center position of the metallized layer main body in the 50 metallized layers consisting of the metallized layer main body and the solder attracting portion by the previously prepared dispenser device.
  • 50 previously prepared LED elements were mounted using a mounter.
  • a reflow treatment was performed in a nitrogen atmosphere at a temperature of 300 ° C. for 30 seconds.
  • the element center position was measured using a three-dimensional measuring machine (NEXIV VMR-3020 manufactured by Nikon) on the positions of 50 LED elements arranged in a row.
  • the blur in the y-axis direction of the center position of 50 LED elements joined in a line in the x-axis direction was calculated as a standard deviation with respect to the average y-axis position.
  • the element center position y-axis deviation ⁇ 4.2 ⁇ m, and the element position accuracy was very high.
  • Pb—Sn alloy solder powder containing a component composition of Pb: 37% by mass with the balance being Sn and having an average particle diameter D 50 : 11.4 ⁇ m and a maximum particle diameter: 14.5 ⁇ m is used. It was.
  • the Pb—Sn alloy solder powder is blended with a commercially available RMA flux such that the RMA flux is 11.0% by mass, and the balance is the blend composition of the Pb—Sn alloy solder powder, and mixed to obtain a paste viscosity of 120 Pa ⁇ s.
  • this Pb—Sn alloy solder paste was filled into a syringe and mounted on a dispenser device (manufactured by Musashi Engineering, model number: ML-606GX). With this dispenser device, an amount of 0.02 mg of Pb—Sn alloy solder paste was applied onto the 50 metallized layers comprising the metallized layer main body part and the solder attracting part produced in Example 1.
  • the 50 LED elements prepared previously were mounted on the Pb—Sn alloy solder paste. In that state, a reflow treatment was performed in a nitrogen atmosphere at a temperature of 220 ° C. for 30 seconds. Then, it cooled and the element center position was measured for 50 LED element positions using the three-dimensional measuring machine (NEXIV VMR-3020 by Nikon).
  • the blur in the y-axis direction of the center position of 50 LED elements joined in a line in the x-axis direction was calculated as a standard deviation with respect to the average y-axis position.
  • the element center position y-axis shake ⁇ 5.8 ⁇ m, and the element position accuracy is very high.
  • Pb—Sn alloy solder powder containing 95% by mass of Pb, the balance being Sn, and having an average particle size D 50 : 11.7 ⁇ m and a maximum particle size: 14.8 ⁇ m is used. It was.
  • the Pb—Sn alloy solder powder is blended with a commercially available RA flux such that the RA flux is 10.0 mass% and the balance is the composition of the Pb—Sn alloy solder powder, and mixed to obtain a paste viscosity of 80 Pa ⁇ s.
  • this Pb—Sn alloy solder paste was filled into a syringe and mounted on a dispenser device (manufactured by Musashi Engineering, model number: ML-606GX). With this dispenser device, an amount of 0.03 mg of Pb—Sn alloy solder paste was applied onto the 50 metallized layers comprising the metallized layer main body portion and the solder attracting portion prepared in Example 1. The previously prepared 50 LED elements were mounted on the Pb—Sn alloy solder paste, and a reflow process was performed in a nitrogen atmosphere at a temperature of 330 ° C. for 30 seconds. Then, it cooled and the element center position was measured for 50 LED element positions using the three-dimensional measuring machine (NEXIV VMR-3020 by Nikon).
  • the blur in the y-axis direction of the center position of 50 LED elements joined in a line in the x-axis direction was calculated as a standard deviation with respect to the average y-axis position.
  • the element center position y-axis shake ⁇ 6.7 ⁇ m, and the position accuracy of the element was very high.
  • solder alloy As a solder alloy, Sn: 96.5% by mass, Ag: 3.0% by mass, with the balance being a component composition consisting of Cu, average particle size D 50 : 10.8 ⁇ m, maximum particle size: 14.1 ⁇ m Pb-free solder powder having the following was used.
  • Commercially available RMA flux is mixed with this Pb-free solder powder so that the RMA flux is 12.5% by mass, and the balance is the composition of Pb-free solder powder, and mixed to obtain a Pb-free paste having a paste viscosity of 72 Pa ⁇ s.
  • a solder paste was prepared.
  • this Pb-free solder paste was filled in a syringe and mounted on a dispenser device (manufactured by Musashi Engineering, model number: ML-606GX). With this dispenser device, an amount of 0.02 mg of Pb-free solder paste was applied on the 50 metallized layers comprising the metallized layer main body and the solder attracting part prepared in Example 1. The previously prepared 50 LED elements were mounted on this Pb-free solder paste, and reflow treatment was performed in a nitrogen atmosphere at a temperature of 240 ° C. for 30 seconds. Then, it cooled and the element center position was measured for 50 LED element positions using the three-dimensional measuring machine (NEXIV VMR-3020 by Nikon).
  • an Au—Sn alloy solder powder containing Sn: 20% by mass and having the remaining component composition of Au and having an average particle diameter D 50 : 11.1 ⁇ m and a maximum particle diameter: 20.1 ⁇ m is used. It was.
  • This Au—Sn alloy solder powder is blended with a commercially available RMA flux so that the RMA flux is 8.0% by mass and the balance is the composition of the Au—Sn alloy solder powder, and mixed to obtain a paste viscosity of 85 Pa ⁇ s.
  • this Au—Sn alloy solder paste was filled in a syringe and mounted on a dispenser device (manufactured by Musashi Engineering, model number: ML-606GX). Further, 50 LED elements having dimensions of 400 ⁇ m in length, 400 ⁇ m in width, and 100 ⁇ m in height are prepared, and Au plating having dimensions of 3 ⁇ m in thickness, 400 ⁇ m in length, 400 ⁇ m in width, and 400 ⁇ m in width on the entire surface of these LED elements. gave.
  • an alumina substrate is prepared, and a surface of the alumina substrate has a length: 500 ⁇ m, a width: 500 ⁇ m, a thickness: a Cu layer having a thickness of 10 ⁇ m, a thickness: a Ni layer having a thickness of 5 ⁇ m, and a thickness.
  • the Au—Sn alloy solder paste in an amount of 0.03 mg was applied to the center position of the 50 metallized layers made of these metallized layers by a dispenser device prepared in advance.
  • a dispenser device prepared in advance.
  • 50 previously prepared LED elements were mounted using a mounter.
  • a reflow treatment was performed in a nitrogen atmosphere at a temperature of 300 ° C. for 30 seconds. Then, it cooled and the element center position was measured for the 50 LED element position arranged in a line using the three-dimensional measuring machine (NEXIV VMR-3020 by Nikon).
  • the blur in the y-axis direction of the center position of 50 LED elements joined in a line in the x-axis direction was calculated as a standard deviation with respect to the average y-axis position.
  • the element center position y-axis shake ⁇ 38.2 ⁇ m, and the element position accuracy was low.
  • an Au—Sn alloy solder powder containing Sn: 20% by mass and having the remaining component composition of Au and having an average particle diameter D 50 : 11.1 ⁇ m and a maximum particle diameter: 20.1 ⁇ m is used. It was.
  • This Au—Sn alloy solder powder is blended with a commercially available RMA flux so that the RMA flux is 8.0% by mass and the balance is the composition of the Au—Sn alloy solder powder, and mixed to obtain a paste viscosity of 85 Pa ⁇ s.
  • An Au—Sn alloy solder paste having the following was prepared. Further, this Au—Sn alloy solder paste was filled in a syringe and mounted on a dispenser device (manufactured by Musashi Engineering, model number: ML-606GX).
  • LED elements having a square shape with dimensions of vertical: 400 ⁇ m, horizontal: 400 ⁇ m, and height: 100 ⁇ m were prepared, and the thickness: 3 ⁇ m, vertical: 400 ⁇ m, horizontal: 400 ⁇ m on one side of these LED elements.
  • An Au plating having the following dimensions was applied.
  • an alumina substrate is prepared, and on the surface of the alumina substrate, a Cu layer having a length: 200 ⁇ m, a width: 200 ⁇ m, a thickness: 10 ⁇ m, a Ni layer having a thickness: 5 ⁇ m, and a thickness.
  • the Au-Sn alloy solder paste in an amount of 0.03 mg was applied to the central position of the metallized layer main body in the 50 metallized layers consisting of the metallized layer main body and the solder attracting part by the dispenser device prepared in advance.
  • 50 previously prepared LED elements were mounted using a mounter.
  • a reflow treatment was performed in a nitrogen atmosphere at a temperature of 300 ° C. for 30 seconds. Then, it cooled and the element center position was measured for the 50 LED element position arranged in a line using the three-dimensional measuring machine (NEXIV VMR-3020 by Nikon).
  • the blur in the x-axis direction and the blur in the y-axis direction at the center position of the 50 LED elements joined are calculated as a standard deviation with respect to the average x-axis position and a standard deviation with respect to the average y-axis position, respectively.
  • the x-axis shake at the element center position is ⁇ 4.8 ⁇ m
  • the y-axis shake is ⁇ 5.2 ⁇ m, indicating that the position accuracy of the element is very high.
  • Pb—Sn alloy solder powder containing a component composition of Pb: 37% by mass with the balance being Sn and having an average particle diameter D 50 : 11.4 ⁇ m and a maximum particle diameter: 14.5 ⁇ m is used. It was.
  • a commercially available RMA flux was blended with the Pb—Sn alloy solder powder so that the RMA flux was 11.0% by mass, and the balance was the blend composition of the Pb—Sn alloy solder powder.
  • a Pb—Sn alloy solder paste having a paste viscosity of 120 Pa ⁇ s is prepared by mixing, and this Pb—Sn alloy solder paste is filled into a syringe and placed in a dispenser device (manufactured by Musashi Engineering, model number: ML-606GX). Installed.
  • LED elements having a rectangular shape with dimensions of 200 ⁇ m in length, 400 ⁇ m in width, and 100 ⁇ m in height are prepared. Thickness: 3 ⁇ m, length: 200 ⁇ m, width on the entire surface of one side of these LED elements. Au plating having a dimension of 400 ⁇ m was applied. Further, an alumina substrate is prepared, and on the surface of the alumina substrate, a Cu layer having a length: 100 ⁇ m, a width: 200 ⁇ m, a thickness: 10 ⁇ m, a Ni layer having a thickness: 5 ⁇ m, and a thickness.
  • the Pb—Sn alloy solder paste in an amount of 0.02 mg was applied to the center position of the metallized layer main body in the 50 metallized layers consisting of the metallized layer main body and the solder attracting part by the previously prepared dispenser device.
  • 50 previously prepared LED elements were mounted using a mounter.
  • a reflow treatment was performed in a nitrogen atmosphere at a temperature of 220 ° C. for 30 seconds. Then, it cooled and the element center position was measured for the 50 LED element position arranged in a line using the three-dimensional measuring machine (NEXIV VMR-3020 by Nikon).
  • the blur in the x-axis direction and the blur in the y-axis direction at the center position of the 50 LED elements joined are calculated as a standard deviation with respect to the average x-axis position and a standard deviation with respect to the average y-axis position, respectively.
  • the x-axis shake at the element center position was ⁇ 7.1 ⁇ m
  • the y-axis shake was ⁇ 6.8 ⁇ m, indicating that the position accuracy of the element was very high.
  • Pb—Sn alloy solder powder containing 95% by mass of Pb, the balance being Sn, and having an average particle size D 50 : 11.7 ⁇ m and a maximum particle size: 14.8 ⁇ m is used. It was.
  • the Pb—Sn alloy solder powder is blended with a commercially available RA flux such that the RA flux is 10.0 mass% and the balance is the composition of the Pb—Sn alloy solder powder, and mixed to obtain a paste viscosity of 80 Pa ⁇ s.
  • a Pb—Sn alloy solder paste having the following was prepared. Further, this Pb—Sn alloy solder paste was filled into a syringe and mounted on a dispenser device (manufactured by Musashi Engineering, model number: ML-606GX).
  • LED elements having a rectangular shape with dimensions of 200 ⁇ m in length, 400 ⁇ m in width, and 100 ⁇ m in height are prepared. Thickness: 3 ⁇ m, length: 200 ⁇ m, width on the entire surface of one side of these LED elements. Au plating having a dimension of 400 ⁇ m was applied. Further, an alumina substrate is prepared, and on the surface of the alumina substrate, a Cu layer having a length: 100 ⁇ m, a width: 200 ⁇ m, a thickness: 10 ⁇ m, a Ni layer having a thickness: 5 ⁇ m, and a thickness.
  • a planar metallized layer shown in FIG. 11 having two dimensions and having two dimensions of the metallized layer body having the same structure as the metallized layer main body portion was formed in a row at 50 ⁇ m intervals.
  • a 0.03 mg amount of Pb—Sn alloy solder paste was applied to the center position of the metallized layer main body in the 50 metallized layers consisting of the metallized layer main body and the solder attracting part by the previously prepared dispenser device.
  • 50 previously prepared LED elements were mounted using a mounter.
  • a reflow treatment was performed in a nitrogen atmosphere at a temperature of 330 ° C. for 30 seconds. Then, it cooled and the element center position was measured for the 50 LED element position arranged in a line using the three-dimensional measuring machine (NEXIV VMR-3020 by Nikon).
  • the blur in the x-axis direction and the blur in the y-axis direction at the center position of the 50 LED elements joined are calculated as a standard deviation with respect to the average x-axis position and a standard deviation with respect to the average y-axis position, respectively.
  • the x-axis shake at the element center position was ⁇ 6.6 ⁇ m
  • the y-axis shake was ⁇ 7.2 ⁇ m, indicating that the position accuracy of the element was very high.
  • solder alloy As a solder alloy, Sn: 96.5% by mass, Ag: 3.0% by mass, with the balance being a component composition consisting of Cu, average particle size D 50 : 10.8 ⁇ m, maximum particle size: 14.1 ⁇ m Pb-free solder powder having the following was used.
  • Commercially available RMA flux is mixed with this Pb-free solder powder so that the RMA flux is 12.5% by mass, and the balance is the composition of Pb-free solder powder, and mixed to obtain a Pb-free paste having a paste viscosity of 72 Pa ⁇ s.
  • a solder paste was prepared. Further, this Pb-free solder paste was filled in a syringe and mounted on a dispenser device (manufactured by Musashi Engineering, model number: ML-606GX).
  • LED elements having a square shape with dimensions of vertical: 400 ⁇ m, horizontal: 400 ⁇ m, and height: 100 ⁇ m were prepared, and thickness: 3 ⁇ m, vertical: 400 ⁇ m, horizontal: on the entire surface of one side of these LED elements.
  • Au plating having a dimension of 400 ⁇ m was applied.
  • an alumina substrate is prepared, and on the surface of the alumina substrate, a Cu layer having a length: 200 ⁇ m, a width: 200 ⁇ m, a thickness: 10 ⁇ m, a Ni layer having a thickness: 5 ⁇ m, and a thickness.
  • the planar metallized layers shown in FIG. 8 composed of two solder attracting parts composed of a composite metallized layer having the same structure as the main body part were formed in a line at 50 locations at intervals of 600 ⁇ m.
  • a Pb-free solder paste in an amount of 0.02 mg was applied to the center position of the metallized layer main body portion in 50 metallized layers consisting of the metallized layer main body portion and the solder attracting portion by a dispenser device prepared in advance.
  • 50 LED elements prepared previously were mounted using a mounter.
  • a reflow treatment was performed in a nitrogen atmosphere at a temperature of 240 ° C. for 30 seconds.
  • the device was cooled and the center positions of the 50 LED elements arranged in a line were measured using a three-dimensional measuring machine (NEXIV VMR-3020 manufactured by Nikon).
  • the blur in the x-axis direction and the blur in the y-axis direction at the center position of the 50 LED elements joined are calculated as a standard deviation with respect to the average x-axis position and a standard deviation with respect to the average y-axis position, respectively.
  • the x-axis shake at the element center position is ⁇ 9.3 ⁇ m
  • the y-axis shake is ⁇ 8.9 ⁇ m, indicating that the position accuracy of the element is very high.
  • an Au—Sn alloy solder powder containing Sn: 20% by mass and having the remaining component composition of Au and having an average particle diameter D 50 : 11.1 ⁇ m and a maximum particle diameter: 20.1 ⁇ m is used. It was.
  • This Au—Sn alloy solder powder is blended with a commercially available RMA flux so that the RMA flux is 8.0% by mass and the balance is the composition of the Au—Sn alloy solder powder, and mixed to obtain a paste viscosity of 85 Pa ⁇ s.
  • this Au—Sn alloy solder paste was filled in a syringe and mounted on a dispenser device (manufactured by Musashi Engineering, model number: ML-606GX). Furthermore, 50 LED elements having dimensions of 400 ⁇ m in length, 400 ⁇ m in width, and 100 ⁇ m in height are prepared, and Au plating having dimensions of 3 ⁇ m in thickness, 400 ⁇ m in length, 400 ⁇ m in width, and 400 ⁇ m in width on one side of these LED elements. was given.
  • an alumina substrate is prepared, and a surface of the alumina substrate has a length: 500 ⁇ m, a width: 500 ⁇ m, a thickness: a Cu layer having a thickness of 10 ⁇ m, a thickness: a Ni layer having a thickness of 5 ⁇ m, and a thickness.
  • the Au—Sn alloy solder paste in an amount of 0.03 mg was applied to the center position of the 50 metallized layers made of these metallized layers by a dispenser device prepared in advance.
  • a dispenser device prepared in advance.
  • 50 previously prepared LED elements were mounted using a mounter.
  • a reflow treatment was performed in a nitrogen atmosphere at a temperature of 300 ° C. for 30 seconds. Then, it cooled and the element center position was measured for the 50 LED element position arranged in a line using the three-dimensional measuring machine (NEXIV VMR-3020 by Nikon).
  • the blur in the x-axis direction and the blur in the y-axis direction at the center position of 50 LED elements joined in a row in the x-axis direction were calculated as the standard deviation with respect to the average x-axis position and the standard deviation with respect to the average y-axis position, respectively.
  • the x-axis shake at the element center position was ⁇ 42.1 ⁇ m
  • the y-axis shake was ⁇ 37.5 ⁇ m, indicating that the position accuracy of the element was low.
  • the present invention relates to a method for joining an object to be mounted to a substrate using a solder paste so as to be in the same position and direction, and in particular, using an Au—Sn alloy solder paste to place an element in the same position and direction. Therefore, the present invention has industrial applicability.

Landscapes

  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

　このはんだペーストを用いた基板と被搭載物の接合方法では、前記基板に形成されたメタライズ層と前記被搭載物に形成されたメタライズ層との間に、前記はんだペーストを搭載または塗布したのち非酸化性雰囲気中でリフロー処理して前記基板と前記被搭載物を接合する。前記基板の表面に形成される前記メタライズ層は、面積が前記被搭載物の前記メタライズ層の面積よりも小さいメタライズ層本体部分と前記メタライズ層本体部分の周囲から突出したはんだ誘引部とからなる平面形状を有する。

Description

はんだペーストを用いた基板と被搭載物の接合方法
　本発明は、はんだペーストを用いて基板に対して被搭載物を同じ位置および方向となるように接合する方法に関するものであり、特にＡｕ－Ｓｎ合金はんだペーストを用いて基板に対して素子を同じ位置および方向となるように接合する方法に関する。
　本願は、２００８年６月１２日に、日本に出願された特願２００８－１５４００３号と２００８年８月２９日に、日本に出願された特願２００８－２２１６３３号とに基づき優先権を主張し、それらの内容をここに援用する。
　一般に、ＬＥＤ（発光ダイオード）素子、ＧａＡｓ光素子、ＧａＡｓ高周波素子、熱伝素子などの半導体素子と基板との接合などにＡｕ－Ｓｎ合金はんだペーストなどが使用されるようになってきた。このＡｕ－Ｓｎ合金はんだペーストは、Ｓｎ：１５～２５質量％（好ましくはＳｎ：２０質量％）を含有し、残りがＡｕおよび不可避不純物からなる組成を有するＡｕ－Ｓｎ共晶合金ガスアトマイズ粉末とロジン、活性剤、溶剤および増粘剤からなる市販のフラックスとを混合して作られることが知られている。
　このＡｕ－Ｓｎ合金はんだペーストを使用して素子と基板とを接合すると、以下のメリットがある。Ａｕ－Ｓｎ合金はんだ接合層がＡｕ－Ｓｎはんだ合金であるので熱伝導性が良く接合信頼性も高い。また、Ａｕ－Ｓｎ合金はんだペーストは、ペーストであるので複数の接合部に一括供給でき、さらに一括熱処理できる。さらに、リフロー時にフラックスがＡｕ－Ｓｎはんだ合金表面を覆っているために酸化膜が少ない。そのため、接合時の溶融Ａｕ－Ｓｎはんだ合金の流動性が大きく、濡れが良くなって素子全面を接合することができる。さらに、接合時に素子に過剰な荷重をかける必要がない。
　このＡｕ－Ｓｎ合金はんだペーストを用いて基板と素子とを接合するには、まず、図１４Ａの縦断面図に示されるように、基板１の表面に形成されたメタライズ層２の上にＡｕ－Ｓｎ合金はんだペースト３を搭載または塗布し、このＡｕ－Ｓｎ合金はんだペースト３の上に素子４を素子４のメタライズ層６がＡｕ－Ｓｎ合金はんだペースト３に接するように搭載する。この状態で加熱してリフロー処理を施したのち冷却すると、図１４Ｂの縦断面図に示されるように、Ａｕ－Ｓｎ合金はんだ接合層５を介して基板１と素子４とが接合する（特許文献１など参照）。この時、基板１の表面に形成されるメタライズ層２の面積は、素子４のメタライズ層６の面積と同じかまたは素子４のメタライズ層６の面積よりも大きくとることが普通である。また、素子４は、一般に正方形状を有しているが、長方形状を有しているものもある。
特開２００７－６１８５７号公報
　図１５は、図１４Ａの上方向から見た平面図である。図１５および図１４Ａに示されるように、基板１のメタライズ層２の上にＡｕ－Ｓｎ合金はんだペースト３を搭載または塗布する。このＡｕ－Ｓｎ合金はんだペースト３の上に素子４を基板１のメタライズ層２の中心部に同軸でかつ同一方向となるように搭載する。しかし、この状態で加熱してリフロー処理を施すと、リフロー処理時に溶融したＡｕ－Ｓｎ合金はんだは、基板１におけるメタライズ層２の全面に広がってＡｕ－Ｓｎ合金はんだ接合層５を形成する。同時に一時的に素子４が溶融したＡｕ－Ｓｎ合金はんだの上に浮んだ状態になり、このとき素子４が回転または移動する。冷却後は、図１４Ｂの上方向から見た平面図である図１６に示されるように、素子４は、メタライズ層２の上のＡｕ－Ｓｎ合金はんだ接合層５の上に、基板１のメタライズ層２に対して基板１のメタライズ層２中心部よりずれて傾いた状態ではんだ接合されることが多い。
　特に、工業的に素子４を基板にはんだ接合するには、広い基板の上に多数の整列したメタライズ層を形成させる。この多数のメタライズ層の上にそれぞれＡｕ－Ｓｎ合金はんだペーストを搭載または塗布し、このＡｕ－Ｓｎ合金はんだペーストの上に素子を規則正しく搭載する。この状態で加熱炉に装入し、多数個の素子を１回のリフロー処理により基板にはんだ接合する。このリフロー処理時に素子が回転して、整列した基板のメタライズ層に対して中心部よりランダムな方向にずれて傾いて素子がはんだ接合され、出荷するための製品としては好ましくない。また、今後のパッケージサイズの更なる微小化の際に、素子同士の距離が近づくと、素子同士の接触が生じることも懸念される。
　上記課題を解決して係る目的を達成するために、本発明は、以下の手段を採用した。
（１）はんだペーストを用いた基板と被搭載物の接合方法であって、メタライズ層を形成した前記基板における前記メタライズ層とメタライズ層を形成した前記被搭載物における前記メタライズ層との間に前記はんだペーストを搭載または塗布したのち非酸化性雰囲気中でリフロー処理して前記基板と前記被搭載物を接合し、前記基板の表面に形成される前記メタライズ層は、面積が前記被搭載物の前記メタライズ層の面積よりも小さいメタライズ層本体部分と前記メタライズ層本体部分の周囲から突出したはんだ誘引部とからなる平面形状を有する。
（２）前記はんだペーストは、２０～２５質量％のＳｎを含有し、残部がＡｕおよび不可避不純物であるＡｕ－Ｓｎはんだ合金粉末にフラックスを混合したＡｕ－Ｓｎ合金はんだペーストであってもよい。
（３）前記はんだペーストは、３５～６０質量％のＰｂを含有し、残部がＳｎおよび不可避不純物であるＰｂ－Ｓｎはんだ合金粉末にフラックスを混合したＰｂ－Ｓｎ合金はんだペーストであってもよい。
（４）前記はんだペーストは、９０～９５質量％のＰｂを含有し、残部がＳｎおよび不可避不純物であるＰｂ－Ｓｎはんだ合金粉末にフラックスを混合したＰｂ－Ｓｎ合金はんだペーストであってもよい。
（５）前記はんだペーストは、４０～１００質量％のＳｎを含有し、残部がＡｇ、Ａｕ、Ｃｕ、Ｂｉ、Ｓｂ、Ｉｎ及びＺｎからなる群より選ばれた１種又は２種以上の金属および不可避不純物であるＰｂフリーはんだ合金粉末にフラックスを混合したＰｂフリーはんだペーストであってもよい。
（６）前記被搭載物は、素子であってもよい。
（７）前記基板に形成される前記メタライズ層は、電極膜であってもよい。
（８）本発明の他の態様に係るはんだペーストを用いた基板と被搭載物の接合方法は、メタライズ層を形成した基板におけるメタライズ層と、メタライズ層を形成した矩形状を有する被搭載物に形成されたメタライズ層との間に、はんだペーストを搭載または塗布する工程と、非酸化性雰囲気中でリフロー処理して前記基板と前記被搭載物を接合する工程とを有する。前記基板の表面に形成される前記メタライズ層は、面積が前記被搭載物の前記メタライズ層の面積よりも小さいメタライズ層本体部分と、前記メタライズ層本体部分の周囲から突出した少なくとも２個のはんだ誘引部とからなる平面形状を有し、互いに隣接するはんだ誘引部の長手方向同士がなす角度は、前記被搭載物の対角線同士のなす交差角のいずれかと同じである。
（９）前記矩形状は、正方形状であっても、長方形状であってもよい。
（１０）基板の表面に形成されるメタライズ層であって、メタライズ層本体部分と、前記メタライズ層本体部分の周囲から突出したはんだ誘引部とからなる平面形状を有する。
（１１）上記（１０）に記載のメタライズ層であって、前記基板に形成される前記メタライズ層は電極膜である。
（１２）メタライズ層を形成した基板であって、前記メタライズ層は、メタライズ層本体部分と、前記メタライズ層本体部分の周囲から突出するはんだ誘引部とを含む平面形状を有する。
（１３）上記（１２）に記載の基板であって、前記メタライズ層が電極膜である。
（１４）前記ハンダペーストは、少なくともＳｎを含有するはんだ合金粉末とフラックスとを混合したペーストであってもよい。
（１５）被搭載物と基板との接合体であって、上記（１）ないし（９）のいずれかに記載の接合方法によって、被搭載物と前記基板とが接合されている。
（１６）被搭載物と基板との接合体の製造方法であって、上記（１）ないし（９）のいずれかに記載の接合方法により、被搭載物と基板とを接合して接合体を製造する。
　本発明の基板と被搭載物の接合方法によると、すべての被搭載物を所望の位置および方向に合わせてはんだ接合することができる。
本発明の方法により基板と素子とを接合する工程において、リフロー処理前の構成の全体像を説明するための縦断面図である。 本発明の方法において、リフロー処理前の構成を説明するための平面図である。 本発明の方法において、リフロー処理後の構成を説明するための平面図である。 本発明において、基板に形成されたメタライズ層の形状を示す平面図である。 本発明において、基板に形成されたメタライズ層の形状を示す平面図である。 本発明の方法において、リフロー処理前の構成を説明するための平面図である。 本発明の方法において、リフロー処理後の構成を説明するための平面図である。 本発明の方法において、リフロー処理前の構成を説明するための平面図である。 本発明の方法において、リフロー処理後の構成を説明するための平面図である。 本発明の他の実施形態において、メタライズ層および被搭載物の接合状態を示す平面図である。 本発明の他の実施形態において、メタライズ層および被搭載物の接合状態を示す平面図である。 本発明の他の実施形態において、メタライズ層および被搭載物の接合状態を示す平面図である。 本発明の他の実施形態において、メタライズ層および被搭載物の接合状態を示す平面図である。 本発明の他の実施形態において、メタライズ層および被搭載物の接合状態を示す平面図である。 本発明の他の実施形態において、メタライズ層および被搭載物の接合状態を示す平面図である。 本発明の他の実施形態において、メタライズ層および被搭載物の接合状態を示す平面図である。 本発明の他の実施形態において、メタライズ層および被搭載物の接合状態を示す平面図である。 従来の方法において、リフロー処理前の構成を説明するための縦断面図である。 従来の方法において、リフロー処理後の構成を説明するための縦断面図である。 図１４Ａの状態での基板と素子とを上から見た平面図である。 図１４Ｂの状態での基板と素子とを上から見た平面図である。
　本発明者らは、基板のメタライズ層に対して素子が常に同じ位置でかつ一定の方向を向くようにはんだ付けすることができる、基板と素子の接合方法を開発すべく研究を行った。その結果、以下の実施形態によれば、はんだ付け後の素子の位置と向きとを揃えられることが分かった。
　（ｉ）図１の縦断面図に示すように、基板１０のメタライズ層１２および素子１４のメタライズ層１６を介し、ハンダペースト１３を用いて基板１０と素子１４とを接合する。素子１４の大きさは、本発明では限定されないが、例えば、一辺の長さが５０μｍ以上１ｃｍ以下、高さが１０μｍ以上５０００μｍ以下である。例えば、製品としては、一辺の長さが９５０μｍ以上１１００μｍ以下、高さが９０μｍ以上１１０μｍ以下である。一般に、ＬＥＤ（発光ダイオード）素子、ＧａＡｓ光素子、ＧａＡｓ高周波素子、熱伝素子などの半導体素子では、基板１０上にメタライズ層１２は、一定間隔を空けて多数形成される。しかし、本発明では、一定間隔でなくてもよいし、メタライズ層１２がひとつであってもよい。この実施形態では、図２Ａの平面図に示されるように、基板１０の表面に形成されたメタライズ層１２は、矩形状（長方形状または正方形状）をなすメタライズ層本体部分１２Ａと、メタライズ層本体部分１２Ａの周囲から突出したはんだ誘引部１２Ｂとを有する。この実施形態では特に、本体部分１２Ａの一辺の中央部から、細い矩形状のはんだ誘引部１２Ｂが垂直に突出している。はんだ誘引部１２Ｂは、この実施形態では一定幅であるが、先端に向けて窄まる台形または三角形状としてもよい。メタライズ層本体部分１２Ａの面積は、素子１４の面積の３０～９５％程度であることが好ましい。
 メタライズ層１２の厚さは、限定されないが、例えば０．０２μｍ以上５０μｍ以下が好ましい。より好ましくは、例えば０．０５μｍ以上１０μｍ以下である。メタライズ層１２の最表面材質も限定はされないが、はんだぬれ性の観点から、Ａｕ、Ａｇ、Ｃｕなどが好適である。メタライズ層は、メッキ法やスパッタ法やコーティング法などで形成される。はんだ誘導部１２Ｂの幅Ｗ１は、限定はされないが、例えば、本体部分１２Ａの前記一辺の長さの５～５０％、より好ましくは１０～４０％であることが好ましい。幅Ｗ１が小さすぎても、大きすぎても素子１４を位置あわせする効果が低下する。はんだ誘導部１２Ｂの長さＬ１は、図２Ｂに示すように、はんだ誘引部１２Ｂの先端を素子１４の角に合わせ、はんだ誘引部１２Ｂを素子１４の対角線に沿って配置した状態で、メタライズ層１２の後端がメタライズ層１２の全域が素子１４によりちょうど隠れる程度がよい。すなわち、メタライズ層１２の後端の２つの角が素子１４の辺の直下または近辺に位置していることが好ましい。はんだ誘引部１２Ｂの長さＬ１は、上記の条件を満たす範囲で、例えば、メタライズ層本体部分１２Ａの前記一辺の長さの２０～７０％、より好ましくは３０～５０％であることが好ましい。
　メタライズ層本体部分１２Ａの上に、Ａｕ－Ｓｎ合金はんだペースト１３を搭載する。ペースト１３の搭載量は従来と同様でよいが、具体的には、はんだ付け後のはんだ接合層の厚さが１～２５μｍとなる程度であることが好ましく、より好ましくは１～１０μｍである。Ａｕ－Ｓｎ合金はんだペースト１３の上に前記メタライズ層本体部分１２Ａの面積よりも大きな面積を有する素子１４を任意の方向に搭載する。この時、正確な位置決めをしなくても、本発明でははんだ付け後の素子１４の向きをはんだ誘引部１２Ｂにより揃えることができるため、位置決め精度が低くて済む分、組み立て時の製造コストを下げることができる。
　この状態で不活性ガス雰囲気中においてリフロー処理すると、はんだペースト１３が溶融し、溶融はんだの表面張力によって、基板１０のメタライズ層１２と素子１４のメタライズ層１６との対向面積が最大化する相対位置（図２Ｂ）へ回転および移動する。図２Ｂに示されるように、リフロー処理中に素子１４の最長対角線（素子が正方形または長方形の場合は通常の対角線であり、楕円形の場合は長径である）とはんだ誘引部１２Ｂの突出方向とが一致するように回転してはんだ付けされる。したがって、予めはんだ誘引部１２Ｂの向きを揃えておくことにより、同一形状の素子は、全て一定の方向を向いてはんだ付けされる。このとき、素子１４は、二点鎖線部分１４´まで移動しても良い。一定の方向に素子１４がはんだ付けされる要因として、メタライズ層本体部分４２Ａからはんだ誘引部４２Ｂへ向かって溶融はんだの流れが生じ、素子１４を回転させることも考えられる。
　（ｉｉ）前記メタライズ層本体部分１２Ａとこのメタライズ層本体部分１２Ａの周囲から突出したはんだ誘引部メタライズ層１２Ｂとは、ＬＥＤ（発光ダイオード）素子、ＧａＡｓ光素子、ＧａＡｓ高周波素子、熱伝素子などの半導体素子などの電極膜として使用することができる。
　（ｉｉｉ）前記（ｉ）に示される現象は、基板と素子とに限定されるものではなく、基板に対する一般の被搭載物に対しても生じる。したがって、一般の被搭載物にも適用可能である。
　（ｉｖ）はんだペーストは、Ａｕ－Ｓｎ合金はんだペーストであることが好ましいが、前記Ａｕ－Ｓｎ合金はんだペーストに換えて、Ｐｂ：３５～６０質量％を含有し、残部：Ｓｎおよび不可避不純物であるＰｂ－Ｓｎはんだ合金粉末にフラックスを混合したＰｂ－Ｓｎ合金はんだペースト、Ｐｂ：９０～９５質量％を含有し、残部：Ｓｎおよび不可避不純物であるＰｂ－Ｓｎはんだ合金粉末にフラックスを混合したＰｂ－Ｓｎ合金はんだペースト、またはＳｎ：４０～１００質量％を含有し、残部：Ａｇ、Ａｕ、Ｃｕ、Ｂｉ、Ｓｂ、Ｉｎ及びＺｎからなる群より選ばれた１種又は２種以上の金属および不可避不純物であるＰｂフリーはんだ合金粉末にフラックスを混合したＰｂフリーはんだペーストであっても同様の効果は得られる。
　本発明の他の実施形態を図３Ａ～図１３に示す。
　基板に形成されるメタライズ層本体部分の形状は、素子の形状と同じ形状であることが好ましいが、特に限定されるものではない。例えば、図３Ａに示されるように、メタライズ層２２が円形のメタライズ層本体部分２２Ａと、その外周から半径方向に突出する矩形状のはんだ誘引部２２Ｂを有していても良い。メタライズ層本体部分は、その他、任意の平面形状を有していても良い。
　また、はんだ誘引部は、メタライズ層本体部分の周囲の任意の位置から突出していれば良い。例えば、図３Ｂに示されるように、正方形のメタライズ層本体部分３２Ａの１つの頂点からはんだ誘引部３２Ｂが対角線の延長方向に突出してメタライズ層３２を形成していても良い。
　（ｖ）図４Ａは、さらに他の実施形態を示す平面図である。図４Ａに示されるように、この実施形態では、基板１０の表面に形成されるメタライズ層４２が、正方形状のメタライズ層本体部分４２Ａと、メタライズ層本体部分４２Ａの四辺の中央部から垂直に突出した４つのはんだ誘引部４２Ｂとを有する。隣接するはんだ誘引部４２Ｂ同士がなす角度は９０゜であり、接合すべき素子１４の対角線のなす角度に一致している。このメタライズ層本体部分４２Ａの上にＡｕ－Ｓｎ合金はんだペースト１３を搭載し、このＡｕ－Ｓｎ合金はんだペースト１３の上に前記メタライズ層本体部分４２Ａの面積よりも大きな面積を有する正方形状の素子１４を任意の向きに搭載する。この状態でリフロー処理すると、溶融はんだの表面張力によって、図４Ｂの平面図に示されるように、正方形状の素子１４の対角線とはんだ誘引部４２Ｂの長手方向とが一致するように素子１４が回転してはんだ付けされる。その結果、基板１０上の全ての正方形状の素子は、一定の方向を向いてはんだ付けされる。その他の条件はいずれも、第１実施形態と同様でよい。
　（ｖｉ）長方形状を有する素子２４を用いる場合は、図５Ａに示すように、基板表面に、メタライズ層本体部分５２Ａと長方形状を有する素子２４の対角線と同じ角度で交差するようにメタライズ層本体部分５２Ａから突出して形成された４つのはんだ誘引部５２Ｂとを有するメタライズ層５２を形成する。前記メタライズ層本体部分５２Ａの上にＡｕ－Ｓｎ合金はんだペースト１３を搭載する。このＡｕ－Ｓｎ合金はんだペースト１３の上に長方形状を有する素子２４を任意の方向を向くように搭載する。その状態でリフロー処理すると、図５Ｂに示すように長方形状を有する素子２４の対角線方向とはんだ誘引部５２Ｂの方向とが一致する。その結果、一定の方向を向けて長方形状を有する素子２４をはんだ付けすることができる。その他の条件はいずれも、第１実施形態と同様でよい。
　（ｖｉｉ）前記（ｖ）に示される現象は、基板と正方形状素子とに限定されるものではなく、基板に対する一般の正方形状を有する被搭載物に対しても生じる。さらに、前記（ｖｉ）に示される現象は、基板と長方形状の素子とに限定されるものではなく、基板に対して接合する一般の長方形状を有する被搭載物に対しても生じる。そのため、この現象を基板と正方形状を有する被搭載物または基板と長方形状を有する被搭載物とのはんだ接合に適用して被搭載物を基板に対して一定の位置および方向にはんだ接合することができる。
　図６～１０はいずれも、メタライズ層本体部分と、このメタライズ層本体部分の周囲から正方形状の被搭載物（素子）１４の対角線と同じ角度で交差して突出した複数のはんだ誘引部とを有するメタライズ層を示している。素子と基板とを接続するために、これらのメタライズ層本体部分の上にＡｕ－Ｓｎ合金はんだペーストを搭載する。これらのＡｕ－Ｓｎ合金はんだペーストの上に前記メタライズ層本体部分の面積よりも大きな面積を有する正方形状の被搭載物（素子）１４を任意の方向に搭載する。図６～１０は、この状態でリフロー処理した後の正方形状の被搭載物（素子）１４がはんだ付けされた状態も示している。
　図６の実施形態に示すように、メタライズ層本体部分６２Ａの大きさは、メタライズ層６２のはんだ誘引部６２Ｂの幅と同じ大きさであってもよい。メタライズ層本体部分６２Ａは、はんだペーストを搭載または塗布できる面積があればよい。
　はんだ誘引部の形状は、図４Ｂに示されるように一定幅の帯状であることが好ましいが、これに限定されるものではない。例えば、はんだ誘引部の形状が三角形状を有しても良い。例えば、図７のように正方形状のメタライズ本体部分７２Ａと、その四辺からそれぞれ伸びる三角形状のはんだ誘引部７２Ｂとを有するメタライズ層７２であってもよい。また、図１０のように正方形状のメタライズ本体部分１０２Ａと、その隣接する２辺から伸びる２つの三角形状のはんだ誘引部１０２Ｂとを有するメタライズ層１０２であってもよい。
　はんだ誘引部の数は、図４Ｂ、図６および図７に示されるように４個であることが好ましい。しかし、図８～１０に示されるように２個であってもよく、さらに、３つまたは５つ以上であっても良い。例えば、図８のように、正方形状のメタライズ本体部分８２Ａと、その隣接する二辺から垂直に伸びる２つのはんだ誘引部８２Ｂとを有するメタライズ層８２であってもよい。また、図９のように、正方形状のメタライズ層本体部分９２Ａと、このメタライズ層本体部分９２Ａの一辺と同じ幅を有する２つのはんだ誘引部９２Ｂとを有するメタライズ層９２であってもよい。
　図１１は、長方形状のメタライズ層本体部分１１２Ａと、このメタライズ層本体部分１１２Ａのひとつの短辺の両端から突きだした２本のはんだ誘引部１１２Ｂとを有するメタライズ層を示している。２本のはんだ誘引部１１２Ｂは、長方形状の被搭載物（素子）の２本の対角線の交差角と同じ角度をなしている。素子と基板とを接続するには、メタライズ層本体部分１１２Ａの上に、Ａｕ－Ｓｎ合金はんだペーストを搭載する。Ａｕ－Ｓｎ合金はんだペーストの上に前記メタライズ層本体部分の面積よりも大きな面積を有する長方形状の被搭載物（素子）３４を任意の方向に搭載する。図１１は、この状態でリフロー処理した後の長方形状の被搭載物（素子）３４がはんだ付けされた状態を示している。
　図１２は、長方形状のメタライズ層本体部分１２２Ａと、このメタライズ層本体部分１２２Ａの三隅から突きだした３本のはんだ誘引部１２２Ｂとを有するメタライズ層を示している。３本のはんだ誘引部１２２Ｂは、互いに、対応する箇所における、長方形状の被搭載物（素子）の２本の対角線の交差角と同じ角度をなしている。素子と基板とを接続するには、メタライズ層本体部分１２２Ａの上に、Ａｕ－Ｓｎ合金はんだペーストを搭載する。Ａｕ－Ｓｎ合金はんだペーストの上に長方形状の被搭載物（素子）３４を任意の方向に搭載し、リフロー処理することにより、図１２のはんだ付け状態が得られる。
　メタライズ層の形状は、図１３に示すように、正方形状のメタライズ層の各辺の中央部から半円状の部分を取り除いた形状であっても良い。このメタライズ層１３２は、メタライズ層本体部分１３２Ａと、その周辺から四方へ伸びる４つのはんだ誘導部１３２Ｂとによって構成される。
　はんだ合金として、Ｓｎ：２０質量％を含有し、残部がＡｕからなる成分組成を有し平均粒径Ｄ５０：１１．１μｍ、最大粒径：２０．１μｍを有するＡｕ－Ｓｎ合金はんだ粉末を用いた。このＡｕ－Ｓｎ合金はんだ粉末に市販のＲＭＡフラックスを、ＲＭＡフラックス：８．０質量％、残部がＡｕ－Ｓｎ合金はんだ粉末の配合組成となるように配合し、混合してペースト粘度：８５Ｐａ・ｓを有するＡｕ－Ｓｎ合金はんだペーストを作製した。さらに、このＡｕ－Ｓｎ合金はんだペーストをシリンジに充填してディスペンサー装置（武蔵エンジニアリング製、型番：ＭＬ－６０６ＧＸ）に装着した。
　さらに、縦：４００μｍ、横：４００μｍ、高さ：１００μｍの寸法を有する５０個のＬＥＤ素子を用意し、これらのＬＥＤ素子の片面全面に厚さ：３μｍ、縦：４００μｍ、横：４００μｍの寸法を有するＡｕメッキを施した。
　さらに、アルミナ製基板を用意し、このアルミナ製基板の表面に、縦：２００μｍ、横：２００μｍの寸法を有し、厚さ：１０μｍを有するＣｕ層、厚さ：５μｍを有するＮｉ層および厚さ：０．１μｍを有するＡｕ層からなる複合メタライズ層を形成したメタライズ層本体部分、並びにメタライズ層本体部分と同じ構造の複合メタライズ層を形成した幅：１００μｍ、長さ：９０μｍの寸法を有するはんだ誘引部からなる図２Ａに示されるメタライズ層を図１に示すように６００μｍ間隔で５０個所一列に形成した。はんだ誘引部は、メタライズ層本体部分の列の方向と同一方向になるように突出している。
　これらのメタライズ層本体部分およびはんだ誘引部からなる５０個所のメタライズ層におけるメタライズ層本体部の中心位置に、先に用意したディスペンサー装置により０．０３ｍｇの量のＡｕ－Ｓｎ合金はんだペーストを塗布した。このＡｕ－Ｓｎ合金はんだペーストの上に先に用意した５０個のＬＥＤ素子をマウンターを用いて搭載した。この状態で、窒素雰囲気中、温度：３００℃、３０秒間保持する条件のリフロー処理を施した。その後、冷却し、一列に配列した５０個のＬＥＤ素子位置を３次元測定機（Ｎｉｋｏｎ製　ＮＥＸＩＶ　ＶＭＲ－３０２０）を用いて、素子中心位置を測定した。ここでは、ｘ軸方向に一列に５０個接合したＬＥＤ素子の中心位置のｙ軸方向のブレを平均ｙ軸位置に対する標準偏差として算出した。その結果、素子中心位置：ｙ軸ぶれ±４．２μｍであり、素子の位置精度が非常に高いことがわかった。
　はんだ合金として、Ｐｂ：３７質量％を含有し、残部がＳｎからなる成分組成を有し平均粒径Ｄ５０：１１．４μｍ、最大粒径：１４．５μｍを有するＰｂ－Ｓｎ合金はんだ粉末を用いた。このＰｂ－Ｓｎ合金はんだ粉末に市販のＲＭＡフラックスを、ＲＭＡフラックス：１１．０質量％、残部がＰｂ－Ｓｎ合金はんだ粉末の配合組成となるように配合し、混合してペースト粘度：１２０Ｐａ・ｓを有するＰｂ－Ｓｎ合金はんだペーストを作製した。さらに、このＰｂ－Ｓｎ合金はんだペーストをシリンジに充填してディスペンサー装置（武蔵エンジニアリング製、型番：ＭＬ－６０６ＧＸ）に装着した。
　このディスペンサー装置により０．０２ｍｇの量のＰｂ－Ｓｎ合金はんだペーストを実施例１で作製したメタライズ層本体部分およびはんだ誘引部からなる５０個所のメタライズ層の上に塗布した。このＰｂ－Ｓｎ合金はんだペーストの上に先に用意した５０個のＬＥＤ素子を搭載した。その状態で、窒素雰囲気中、温度：２２０℃、３０秒間保持する条件のリフロー処理を施した。その後、冷却し、５０個のＬＥＤ素子位置を３次元測定機（Ｎｉｋｏｎ製　ＮＥＸＩＶ　ＶＭＲ－３０２０）を用いて、素子中心位置を測定した。ここでは、ｘ軸方向に一列に５０個接合したＬＥＤ素子の中心位置のｙ軸方向のブレを平均ｙ軸位置に対する標準偏差として算出した。その結果、素子中心位置：ｙ軸ぶれ±５．８μｍであり、素子の位置精度が非常に高いことがわかった。
　はんだ合金として、Ｐｂ：９５質量％を含有し、残部がＳｎからなる成分組成を有し平均粒径Ｄ５０：１１．７μｍ、最大粒径：１４．８μｍを有するＰｂ－Ｓｎ合金はんだ粉末を用いた。このＰｂ－Ｓｎ合金はんだ粉末に市販のＲＡフラックスを、ＲＡフラックス：１０．０質量％、残部がＰｂ－Ｓｎ合金はんだ粉末の配合組成となるように配合し、混合してペースト粘度：８０Ｐａ・ｓを有するＰｂ－Ｓｎ合金はんだペーストを作製した。さらに、このＰｂ－Ｓｎ合金はんだペーストをシリンジに充填してディスペンサー装置（武蔵エンジニアリング製、型番：ＭＬ－６０６ＧＸ）に装着した。
　このディスペンサー装置により０．０３ｍｇの量のＰｂ－Ｓｎ合金はんだペーストを実施例１で作製したメタライズ層本体部分およびはんだ誘引部からなる５０個所のメタライズ層の上に塗布した。このＰｂ－Ｓｎ合金はんだペーストの上に先に用意した５０個のＬＥＤ素子を搭載し、窒素雰囲気中、温度：３３０℃、３０秒間保持する条件のリフロー処理を施した。その後、冷却し、５０個のＬＥＤ素子位置を３次元測定機（Ｎｉｋｏｎ製　ＮＥＸＩＶ　ＶＭＲ－３０２０）を用いて、素子中心位置を測定した。ここでは、ｘ軸方向に一列に５０個接合したＬＥＤ素子の中心位置のｙ軸方向のブレを平均ｙ軸位置に対する標準偏差として算出した。その結果、素子中心位置：ｙ軸ぶれ±６．７μｍであり、素子の位置精度が非常に高いことがわかった。
　はんだ合金として、Ｓｎ：９６．５質量％、Ａｇ：３．０質量％を含有し、残部がＣｕからなる成分組成を有し平均粒径Ｄ５０：１０．８μｍ、最大粒径：１４．１μｍを有するＰｂフリーはんだ粉末を用いた。このＰｂフリーはんだ粉末に市販のＲＭＡフラックスを、ＲＭＡフラックス：１２．５質量％、残部がＰｂフリーはんだ粉末の配合組成となるように配合し、混合してペースト粘度：７２Ｐａ・ｓを有するＰｂフリーはんだペーストを作製した。さらに、このＰｂフリーはんだペーストをシリンジに充填してディスペンサー装置（武蔵エンジニアリング製、型番：ＭＬ－６０６ＧＸ）に装着した。
　このディスペンサー装置により０．０２ｍｇの量のＰｂフリーはんだペーストを実施例１で作製したメタライズ層本体部分およびはんだ誘引部からなる５０個所のメタライズ層の上に塗布した。このＰｂフリーはんだペーストの上に先に用意した５０個のＬＥＤ素子を搭載し、窒素雰囲気中、温度：２４０℃、３０秒間保持する条件のリフロー処理を施した。その後、冷却し、５０個のＬＥＤ素子位置を３次元測定機（Ｎｉｋｏｎ製　ＮＥＸＩＶ　ＶＭＲ－３０２０）を用いて、素子中心位置を測定した。ここでは、ｘ軸方向に一列に５０個接合したＬＥＤ素子の中心位置のｙ軸方向のブレを平均ｙ軸位置に対する標準偏差として算出した。その結果、素子中心位置：ｙ軸ぶれ±５．１μｍであり、素子の位置精度が非常に高いことがわかった。
（従来例１）
　はんだ合金として、Ｓｎ：２０質量％を含有し、残部がＡｕからなる成分組成を有し平均粒径Ｄ５０：１１．１μｍ、最大粒径：２０．１μｍを有するＡｕ－Ｓｎ合金はんだ粉末を用いた。このＡｕ－Ｓｎ合金はんだ粉末に市販のＲＭＡフラックスを、ＲＭＡフラックス：８．０質量％、残部がＡｕ－Ｓｎ合金はんだ粉末の配合組成となるように配合し、混合してペースト粘度：８５Ｐａ・ｓを有するＡｕ－Ｓｎ合金はんだペーストを作製した。さらに、このＡｕ－Ｓｎ合金はんだペーストをシリンジに充填してディスペンサー装置（武蔵エンジニアリング製、型番：ＭＬ－６０６ＧＸ）に装着した。
　さらに、縦４００μｍ、横４００μｍ、高さ１００μｍの寸法を有する５０個のＬＥＤ素子を用意し、これらＬＥＤ素子の片面全面に厚さ：３μｍ、縦：４００μｍ、横：４００μｍの寸法を有するＡｕメッキを施した。
　さらに、アルミナ製基板を用意し、このアルミナ製基板の表面に、縦：５００μｍ、横：５００μｍの寸法を有し、厚さ：１０μｍを有するＣｕ層、厚さ：５μｍを有するＮｉ層および厚さ：０．１μｍを有するＡｕ層からなる複合メタライズ層を形成した図１５に示されるメタライズ層を６００μｍ間隔で５０個所一列に形成した。
　これらのメタライズ層からなる５０個所のメタライズ層の中心位置に、先に用意したディスペンサー装置により０．０３ｍｇの量のＡｕ－Ｓｎ合金はんだペーストを塗布した。このＡｕ－Ｓｎ合金はんだペーストの上に先に用意した５０個のＬＥＤ素子をマウンターを用いて搭載した。この状態で、窒素雰囲気中、温度：３００℃、３０秒間保持する条件のリフロー処理を施した。その後、冷却し、一列に配列した５０個のＬＥＤ素子位置を３次元測定機（Ｎｉｋｏｎ製　ＮＥＸＩＶ　ＶＭＲ－３０２０）を用いて、素子中心位置を測定した。ここでは、ｘ軸方向に一列に５０個接合したＬＥＤ素子の中心位置のｙ軸方向のブレを平均ｙ軸位置に対する標準偏差として算出した。その結果、素子中心位置：ｙ軸ぶれ±３８．２μｍであり、素子の位置精度が低いことがわかった。
　はんだ合金として、Ｓｎ：２０質量％を含有し、残部がＡｕからなる成分組成を有し平均粒径Ｄ５０：１１．１μｍ、最大粒径：２０．１μｍを有するＡｕ－Ｓｎ合金はんだ粉末を用いた。このＡｕ－Ｓｎ合金はんだ粉末に市販のＲＭＡフラックスを、ＲＭＡフラックス：８．０質量％、残部がＡｕ－Ｓｎ合金はんだ粉末の配合組成となるように配合し、混合してペースト粘度：８５Ｐａ・ｓを有するＡｕ－Ｓｎ合金はんだペーストを作製した。さらに、このＡｕ－Ｓｎ合金はんだペーストをシリンジに充填してディスペンサー装置（武蔵エンジニアリング製、型番：ＭＬ－６０６ＧＸ）に装着した。
　さらに、縦：４００μｍ、横：４００μｍ、高さ：１００μｍの寸法を有する正方形状を有する５０個のＬＥＤ素子を用意し、これらＬＥＤ素子の片面全面に厚さ：３μｍ、縦：４００μｍ、横：４００μｍの寸法を有するＡｕメッキを施した。
　さらに、アルミナ製基板を用意し、このアルミナ製基板の表面に、縦：２００μｍ、横：２００μｍの寸法を有し、厚さ：１０μｍを有するＣｕ層、厚さ：５μｍを有するＮｉ層および厚さ：０．１μｍを有するＡｕ層からなる複合メタライズ層を形成したメタライズ層本体部分と、前記メタライズ層本体部分から十字状に突出した幅：５０μｍ、長さ：１５０μｍの寸法を有し前記メタライズ層本体部分と同じ構造の複合メタライズ層からなるはんだ誘引部とからなる図４Ｂに示される平面形状のメタライズ層を６００μｍ間隔で５０個所一列に形成した。
　これらのメタライズ層本体部分およびはんだ誘引部からなる５０個所のメタライズ層におけるメタライズ層本体部の中心位置に、先に用意したディスペンサー装置により０．０３ｍｇの量のＡｕ－Ｓｎ合金はんだペーストを塗布した。このＡｕ－Ｓｎ合金はんだペーストの上に先に用意した５０個のＬＥＤ素子をマウンターを用いて搭載した。この状態で、窒素雰囲気中、温度：３００℃、３０秒間保持する条件のリフロー処理を施した。その後、冷却し、一列に配列した５０個のＬＥＤ素子位置を３次元測定機（Ｎｉｋｏｎ製　ＮＥＸＩＶ　ＶＭＲ－３０２０）を用いて、素子中心位置を測定した。ここでは、５０個接合したＬＥＤ素子の中心位置のｘ軸方向のブレおよびｙ軸方向のブレをそれぞれ平均ｘ軸位置に対する標準偏差および平均ｙ軸位置に対する標準偏差として算出した。その結果、素子中心位置のｘ軸ぶれは、±４．８μｍであり、ｙ軸ぶれは、±５．２μｍであり、素子の位置精度が非常に高いことがわかった。
　はんだ合金として、Ｐｂ：３７質量％を含有し、残部がＳｎからなる成分組成を有し平均粒径Ｄ５０：１１．４μｍ、最大粒径：１４．５μｍを有するＰｂ－Ｓｎ合金はんだ粉末を用いた。このＰｂ－Ｓｎ合金はんだ粉末に市販のＲＭＡフラックスを、ＲＭＡフラックス：１１．０質量％、残部がＰｂ－Ｓｎ合金はんだ粉末の配合組成となるように配合した。さらに、混合してペースト粘度：１２０Ｐａ・ｓを有するＰｂ－Ｓｎ合金はんだペーストを作製し、このＰｂ－Ｓｎ合金はんだペーストをシリンジに充填してディスペンサー装置（武蔵エンジニアリング製、型番：ＭＬ－６０６ＧＸ）に装着した。
　さらに、縦：２００μｍ、横：４００μｍ、高さ：１００μｍの寸法を有する長方形状を有する５０個のＬＥＤ素子を用意し、これらのＬＥＤ素子の片面全面に厚さ：３μｍ、縦：２００μｍ、横：４００μｍの寸法を有するＡｕメッキを施した。
　さらに、アルミナ製基板を用意し、このアルミナ製基板の表面に、縦：１００μｍ、横：２００μｍの寸法を有し、厚さ：１０μｍを有するＣｕ層、厚さ：５μｍを有するＮｉ層および厚さ：０．１μｍを有するＡｕ層からなる複合メタライズ層を形成したメタライズ層本体部分と、前記メタライズ層本体部分から長方形状のＬＥＤ素子の対角線と同じ角度で突出した幅：５０μｍ、長さ：１５０μｍの寸法を有し前記メタライズ層本体部分と同じ構造の複合メタライズ層からなる４つのはんだ誘引部とからなる図５Ｂに示される平面形状のメタライズ層を６００μｍ間隔で５０個所一列に形成した。
　これらのメタライズ層本体部分およびはんだ誘引部からなる５０個所のメタライズ層におけるメタライズ層本体部の中心位置に、先に用意したディスペンサー装置により０．０２ｍｇの量のＰｂ－Ｓｎ合金はんだペーストを塗布した。このＰｂ－Ｓｎ合金はんだペーストの上に先に用意した５０個のＬＥＤ素子をマウンターを用いて搭載した。この状態で、窒素雰囲気中、温度：２２０℃、３０秒間保持する条件のリフロー処理を施した。その後、冷却し、一列に配列した５０個のＬＥＤ素子位置を３次元測定機（Ｎｉｋｏｎ製　ＮＥＸＩＶ　ＶＭＲ－３０２０）を用いて、素子中心位置を測定した。ここでは、５０個接合したＬＥＤ素子の中心位置のｘ軸方向のブレおよびｙ軸方向のブレをそれぞれ平均ｘ軸位置に対する標準偏差および平均ｙ軸位置に対する標準偏差として算出した。その結果、素子中心位置のｘ軸ぶれは、±７．１μｍであり、ｙ軸ぶれは、±６．８μｍであり、素子の位置精度が非常に高いことがわかった。
　はんだ合金として、Ｐｂ：９５質量％を含有し、残部がＳｎからなる成分組成を有し平均粒径Ｄ５０：１１．７μｍ、最大粒径：１４．８μｍを有するＰｂ－Ｓｎ合金はんだ粉末を用いた。このＰｂ－Ｓｎ合金はんだ粉末に市販のＲＡフラックスを、ＲＡフラックス：１０．０質量％、残部がＰｂ－Ｓｎ合金はんだ粉末の配合組成となるように配合し、混合してペースト粘度：８０Ｐａ・ｓを有するＰｂ－Ｓｎ合金はんだペーストを作製した。さらに、このＰｂ－Ｓｎ合金はんだペーストをシリンジに充填してディスペンサー装置（武蔵エンジニアリング製、型番：ＭＬ－６０６ＧＸ）に装着した。
　さらに、縦：２００μｍ、横：４００μｍ、高さ：１００μｍの寸法を有する長方形状を有する５０個のＬＥＤ素子を用意し、これらのＬＥＤ素子の片面全面に厚さ：３μｍ、縦：２００μｍ、横：４００μｍの寸法を有するＡｕメッキを施した。
　さらに、アルミナ製基板を用意し、このアルミナ製基板の表面に、縦：１００μｍ、横：２００μｍの寸法を有し、厚さ：１０μｍを有するＣｕ層、厚さ：５μｍを有するＮｉ層および厚さ：０．１μｍを有するＡｕ層からなる複合メタライズ層を形成したメタライズ層本体部分と、前記メタライズ層本体部分から長方形状のＬＥＤ素子の対角線と同じ角度で突出した幅：１００μｍ、長さ：１５０μｍの寸法を有し前記メタライズ層本体部分と同じ構造の複合メタライズ層からなる２つのはんだ誘引部とからなる図１１に示される平面形状のメタライズ層を６００μｍ間隔で５０個所一列に形成した。
　これらのメタライズ層本体部分およびはんだ誘引部からなる５０個所のメタライズ層におけるメタライズ層本体部の中心位置に、先に用意したディスペンサー装置により０．０３ｍｇの量のＰｂ－Ｓｎ合金はんだペーストを塗布した。このＰｂ－Ｓｎ合金はんだペーストの上に先に用意した５０個のＬＥＤ素子をマウンターを用いて搭載した。この状態で、窒素雰囲気中、温度：３３０℃、３０秒間保持する条件のリフロー処理を施した。その後、冷却し、一列に配列した５０個のＬＥＤ素子位置を３次元測定機（Ｎｉｋｏｎ製　ＮＥＸＩＶ　ＶＭＲ－３０２０）を用いて、素子中心位置を測定した。ここでは、５０個接合したＬＥＤ素子の中心位置のｘ軸方向のブレおよびｙ軸方向のブレをそれぞれ平均ｘ軸位置に対する標準偏差および平均ｙ軸位置に対する標準偏差として算出した。その結果、素子中心位置のｘ軸ぶれは、±６．６μｍであり、ｙ軸ぶれは、±７．２μｍであり、素子の位置精度が非常に高いことがわかった。
　はんだ合金として、Ｓｎ：９６．５質量％、Ａｇ：３．０質量％を含有し、残部がＣｕからなる成分組成を有し平均粒径Ｄ５０：１０．８μｍ、最大粒径：１４．１μｍを有するＰｂフリーはんだ粉末を用いた。このＰｂフリーはんだ粉末に市販のＲＭＡフラックスを、ＲＭＡフラックス：１２．５質量％、残部がＰｂフリーはんだ粉末の配合組成となるように配合し、混合してペースト粘度：７２Ｐａ・ｓを有するＰｂフリーはんだペーストを作製した。さらに、このＰｂフリーはんだペーストをシリンジに充填してディスペンサー装置（武蔵エンジニアリング製、型番：ＭＬ－６０６ＧＸ）に装着した。
　さらに、縦：４００μｍ、横：４００μｍ、高さ：１００μｍの寸法を有する正方形状を有する５０個のＬＥＤ素子を用意し、これらのＬＥＤ素子の片面全面に厚さ：３μｍ、縦：４００μｍ、横：４００μｍの寸法を有するＡｕメッキを施した。
　さらに、アルミナ製基板を用意し、このアルミナ製基板の表面に、縦：２００μｍ、横：２００μｍの寸法を有し、厚さ：１０μｍを有するＣｕ層、厚さ：５μｍを有するＮｉ層および厚さ：０．１μｍを有するＡｕ層からなる複合メタライズ層を形成したメタライズ層本体部分と、前記メタライズ層本体部分からＬ字状に突出した幅：１００μｍ、長さ：２００μｍの寸法を有し前記メタライズ層本体部分と同じ構造の複合メタライズ層からなる２つのはんだ誘引部とからなる図８に示される平面形状のメタライズ層を６００μｍ間隔で５０個所一列に形成した。
　これらのメタライズ層本体部分およびはんだ誘引部からなる５０個所のメタライズ層におけるメタライズ層本体部の中心位置に、先に用意したディスペンサー装置により０．０２ｍｇの量のＰｂフリーはんだペーストを塗布した。このＰｂフリーはんだペーストの上に先に用意した５０個のＬＥＤ素子をマウンターを用いて搭載した。この状態で、窒素雰囲気中、温度：２４０℃、３０秒間保持する条件のリフロー処理を施した。その後、冷却し、一列に配列した５０個のＬＥＤ素子位置を３次元測定機（Ｎｉｋｏｎ製　ＮＥＸＩＶ　ＶＭＲ－３０２０）を用いて、素子中心位置を測定した。ここでは、５０個接合したＬＥＤ素子の中心位置のｘ軸方向のブレおよびｙ軸方向のブレをそれぞれ平均ｘ軸位置に対する標準偏差および平均ｙ軸位置に対する標準偏差として算出した。その結果、素子中心位置のｘ軸ぶれは、±９．３μｍであり、ｙ軸ぶれは、±８．９μｍであり、素子の位置精度が非常に高いことがわかった。
（従来例２）
　はんだ合金として、Ｓｎ：２０質量％を含有し、残部がＡｕからなる成分組成を有し平均粒径Ｄ５０：１１．１μｍ、最大粒径：２０．１μｍを有するＡｕ－Ｓｎ合金はんだ粉末を用いた。このＡｕ－Ｓｎ合金はんだ粉末に市販のＲＭＡフラックスを、ＲＭＡフラックス：８．０質量％、残部がＡｕ－Ｓｎ合金はんだ粉末の配合組成となるように配合し、混合してペースト粘度：８５Ｐａ・ｓを有するＡｕ－Ｓｎ合金はんだペーストを作製した。さらに、このＡｕ－Ｓｎ合金はんだペーストをシリンジに充填してディスペンサー装置（武蔵エンジニアリング製、型番：ＭＬ－６０６ＧＸ）に装着した。
　さらに、縦４００μｍ、横４００μｍ、高さ１００μｍの寸法を有する５０個のＬＥＤ素子を用意し、これらのＬＥＤ素子の片面全面に厚さ：３μｍ、縦：４００μｍ、横：４００μｍの寸法を有するＡｕメッキを施した。
　さらに、アルミナ製基板を用意し、このアルミナ製基板の表面に、縦：５００μｍ、横：５００μｍの寸法を有し、厚さ：１０μｍを有するＣｕ層、厚さ：５μｍを有するＮｉ層および厚さ：０．１μｍを有するＡｕ層からなる複合メタライズ層を形成したメタライズ層を６００μｍ間隔で５０個所一列に形成した。
　これらのメタライズ層からなる５０個所のメタライズ層の中心位置に、先に用意したディスペンサー装置により０．０３ｍｇの量のＡｕ－Ｓｎ合金はんだペーストを塗布した。このＡｕ－Ｓｎ合金はんだペーストの上に先に用意した５０個のＬＥＤ素子をマウンターを用いて搭載した。この状態で、窒素雰囲気中、温度：３００℃、３０秒間保持する条件のリフロー処理を施した。その後、冷却し、一列に配列した５０個のＬＥＤ素子位置を３次元測定機（Ｎｉｋｏｎ製　ＮＥＸＩＶ　ＶＭＲ－３０２０）を用いて、素子中心位置を測定した。ここでは、ｘ軸方向に一列に５０個接合したＬＥＤ素子の中心位置のｘ軸方向のブレおよびｙ軸方向のブレをそれぞれ平均ｘ軸位置に対する標準偏差および平均ｙ軸位置に対する標準偏差として算出した。その結果、素子中心位置のｘ軸ぶれは、±４２．１μｍであり、ｙ軸ぶれは、±３７．５μｍであり、素子の位置精度が低いことがわかった。
　本発明は、はんだペーストを用いて基板に対して被搭載物を同じ位置および方向となるように接合する方法、特にＡｕ－Ｓｎ合金はんだペーストを用いて基板に対して素子を同じ位置および方向となるように接合する方法を提供するから、産業上の利用可能性を有する。
　１　　基板
　２　　メタライズ層
　３　　Ａｕ－Ｓｎ合金はんだペースト
　４　　素子、被搭載物
　５　　Ａｕ－Ｓｎ合金はんだ接合層
　６　　メタライズ層
　１０　　基板
　１２　　メタライズ層
　１２Ａ　　メタライズ層本体部分
　１２Ｂ　　はんだ誘引部
　１３　　Ａｕ－Ｓｎ合金はんだペースト
　１４　　正方形状を有する素子、被搭載物
　１６　　メタライズ層
　２４　　長方形状を有する素子、被搭載物
　４２　　メタライズ層
　４２Ａ　　メタライズ層本体部分
　４２Ｂ　　はんだ誘引部
　５２　　メタライズ層
　５２Ａ　　メタライズ層本体部分
　５２Ｂ　　はんだ誘引部

Claims (14)

  1. 　はんだペーストを用いた基板と被搭載物の接合方法であって、
    　前記基板に形成されたメタライズ層と、前記被搭載物に形成されたメタライズ層との間に、前記はんだペーストを搭載または塗布する工程と、
    　これらを非酸化性雰囲気中でリフロー処理して、はんだを溶融させ、前記基板と前記被搭載物をはんだにより接合する工程とを有し、
    　前記基板に形成された前記メタライズ層は、面積が前記被搭載物の前記メタライズ層の面積よりも小さいメタライズ層本体部分と、前記メタライズ層本体部分の周囲から突出したはんだ誘引部とからなる平面形状を有することを特徴とする、はんだペーストを用いた基板と被搭載物の接合方法。
  2. 　前記はんだペーストは、２０～２５質量％のＳｎを含有し、残部がＡｕおよび不可避不純物であるＡｕ－Ｓｎはんだ合金粉末に、フラックスを混合したＡｕ－Ｓｎ合金はんだペーストである請求項１記載のはんだペーストを用いた基板と被搭載物の接合方法。
  3. 　前記はんだペーストは、３５～６０質量％のＰｂを含有し、残部がＳｎおよび不可避不純物であるＰｂ－Ｓｎはんだ合金粉末に、フラックスを混合したＰｂ－Ｓｎ合金はんだペーストである請求項１記載のはんだペーストを用いた基板と被搭載物の接合方法。
  4. 　前記はんだペーストは、９０～９５質量％のＰｂを含有し、残部がＳｎおよび不可避不純物であるＰｂ－Ｓｎはんだ合金粉末に、フラックスを混合したＰｂ－Ｓｎ合金はんだペーストである請求項１記載のはんだペーストを用いた基板と被搭載物の接合方法。
  5. 　前記はんだペーストは、４０～１００質量％のＳｎを含有し、残部がＡｇ、Ａｕ、Ｃｕ、Ｂｉ、Ｓｂ、Ｉｎ及びＺｎからなる群より選ばれた１種又は２種以上の金属および不可避不純物であるＰｂフリーはんだ合金粉末に、フラックスを混合したＰｂフリーはんだペーストである請求項１記載のはんだペーストを用いた基板と被搭載物の接合方法。
  6. 　前記被搭載物は、素子である請求項１記載のはんだペーストを用いた基板と被搭載物の接合方法。
  7. 　前記基板に形成される前記メタライズ層は、電極膜である請求項１記載のはんだペーストを用いた基板と被搭載物の接合方法。
  8. 　　請求項１記載のはんだペーストを用いた基板と被搭載物の接合方法であって、
    　　前記基板の表面に形成される前記メタライズ層は、前記メタライズ層本体部分の周囲から突出した少なくとも２個のはんだ誘引部を有する平面形状をなし、互いに隣接するはんだ誘引部の長手方向同士がなす角度は、前記被搭載物の対角線同士のなす交差角のいずれかと同じである、はんだペーストを用いた基板と被搭載物の接合方法。
  9. 　基板の表面に形成されるメタライズ層であって、メタライズ層本体部分と前記メタライズ層本体部分の周囲から突出したはんだ誘引部とからなる平面形状を有することを特徴とする基板の表面に形成されたメタライズ層。
  10. 　前記基板に形成される前記メタライズ層は、電極膜であることを特徴とする請求項９に記載の基板表面に形成されるメタライズ層。
  11. 　メタライズ層を形成した基板であって、前記メタライズ層は、メタライズ層本体部分と、前記メタライズ層本体部分の周囲から突出するはんだ誘引部とを含む平面形状である、ことを特徴とする基板。
  12. 　前記基板上に形成する前記メタライズ層が電極膜であることを特徴とする請求項１１に記載の基板。
  13. 　請求項１記載の接合方法によって接合されたことを特徴とする被搭載物と基板との接合体。
  14. 　請求項１記載の接合方法を用いることを特徴とする被搭載物と基板との接合体の製造方法。
PCT/JP2009/060785 2008-06-12 2009-06-12 はんだペーストを用いた基板と被搭載物の接合方法 WO2009151123A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
EP09762553A EP2290676A4 (en) 2008-06-12 2009-06-12 METHOD FOR CONNECTING A SUBSTRATE AND MOUNTING OBJECT WITH SOLDERING PASTE
CN2009801204361A CN102047397B (zh) 2008-06-12 2009-06-12 使用锡焊膏进行的基板与焊件的接合方法
US12/736,986 US20110067911A1 (en) 2008-06-12 2009-06-12 Method of bonding parts to substrate using solder paste

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP2008-154003 2008-06-12
JP2008154003A JP2009302229A (ja) 2008-06-12 2008-06-12 位置合わせ性に優れたはんだペーストを用いた基板と被搭載物の接合方法
JP2008221633A JP2010056399A (ja) 2008-08-29 2008-08-29 位置合わせ性に優れたはんだペーストを用いた基板と被搭載物の接合方法
JP2008-221633 2008-08-29

Publications (1)

Publication Number Publication Date
WO2009151123A1 true WO2009151123A1 (ja) 2009-12-17

Family

ID=41416825

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2009/060785 WO2009151123A1 (ja) 2008-06-12 2009-06-12 はんだペーストを用いた基板と被搭載物の接合方法

Country Status (6)

Country Link
US (1) US20110067911A1 (ja)
EP (1) EP2290676A4 (ja)
KR (1) KR101565184B1 (ja)
CN (2) CN103208435B (ja)
TW (1) TWI536466B (ja)
WO (1) WO2009151123A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017212354A (ja) * 2016-05-26 2017-11-30 ローム株式会社 Ｌｅｄモジュール

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9899329B2 (en) 2010-11-23 2018-02-20 X-Celeprint Limited Interconnection structures and methods for transfer-printed integrated circuit elements with improved interconnection alignment tolerance
JP2012119637A (ja) * 2010-12-03 2012-06-21 Sumitomo Electric Device Innovations Inc 光半導体装置の製造方法
US8889485B2 (en) 2011-06-08 2014-11-18 Semprius, Inc. Methods for surface attachment of flipped active componenets
KR20140041975A (ko) 2012-09-25 2014-04-07 삼성전자주식회사 범프 구조체 및 이를 포함하는 전기적 연결 구조체
JP6007358B2 (ja) * 2014-02-27 2016-10-12 日信工業株式会社 回路基板および車両用ブレーキ液圧制御装置
CN108311812A (zh) * 2014-04-02 2018-07-24 千住金属工业株式会社 软钎料合金和使用其的方法
US9799719B2 (en) 2014-09-25 2017-10-24 X-Celeprint Limited Active-matrix touchscreen
US20160093600A1 (en) * 2014-09-25 2016-03-31 X-Celeprint Limited Compound micro-assembly strategies and devices
JP6340482B2 (ja) * 2014-12-19 2018-06-06 ウォーカー マイロンWALKER, Myron 集積回路パッケージのはんだ付け性及び自己整合性を改良するスポーク付きはんだパッド
CN107113963B (zh) * 2014-12-19 2020-07-24 麦伦·沃克 用以改善集成电路封装的自我对位及焊接性的辐条式焊垫
USD816135S1 (en) 2014-12-19 2018-04-24 Myron Walker Spoked solder pad
TWI681508B (zh) 2016-02-25 2020-01-01 愛爾蘭商艾克斯瑟樂普林特有限公司 有效率地微轉印微型裝置於大尺寸基板上
CN107623012B (zh) * 2016-07-13 2020-04-28 群创光电股份有限公司 显示装置及其形成方法
US20180019234A1 (en) * 2016-07-13 2018-01-18 Innolux Corporation Display devices and methods for forming the same
JP6519549B2 (ja) 2016-08-02 2019-05-29 日亜化学工業株式会社 発光装置
US10600671B2 (en) 2016-11-15 2020-03-24 X-Celeprint Limited Micro-transfer-printable flip-chip structures and methods
WO2018091459A1 (en) 2016-11-15 2018-05-24 X-Celeprint Limited Micro-transfer-printable flip-chip structures and methods
US10395966B2 (en) 2016-11-15 2019-08-27 X-Celeprint Limited Micro-transfer-printable flip-chip structures and methods
US11024608B2 (en) 2017-03-28 2021-06-01 X Display Company Technology Limited Structures and methods for electrical connection of micro-devices and substrates
CN108521722A (zh) * 2018-07-12 2018-09-11 贵州贵安新区众鑫捷创科技有限公司 一种smt贴片工艺
JP7166818B2 (ja) * 2018-07-13 2022-11-08 スタンレー電気株式会社 光半導体素子
US11557878B2 (en) * 2019-10-22 2023-01-17 University Of Maryland, College Park High power, narrow linewidth semiconductor laser system and method of fabrication
DE102019131950A1 (de) * 2019-11-26 2021-05-27 Landulf Martin Skoda Lötpad und Verfahren zum Löten
DE102021202178A1 (de) 2021-03-05 2022-09-08 Robert Bosch Gesellschaft mit beschränkter Haftung Verbindungsanordnung

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09107173A (ja) * 1995-10-11 1997-04-22 Tokai Rika Co Ltd パッド構造及び配線基板装置
JP2005052869A (ja) * 2003-08-06 2005-03-03 Sumitomo Metal Mining Co Ltd 高温はんだ付用ろう材とそれを用いた半導体装置
WO2006132130A1 (ja) * 2005-06-06 2006-12-14 Rohm Co., Ltd. 半導体装置、基板および半導体装置の製造方法
JP2007061857A (ja) 2005-08-31 2007-03-15 Mitsubishi Materials Corp Ａｕ−Ｓｎ合金はんだペーストを用いた基板と素子の接合方法
JP2008010545A (ja) * 2006-06-28 2008-01-17 Mitsubishi Materials Corp Ａｕ−Ｓｎ合金はんだペーストを用いて素子の接合面全面を基板に接合する方法
JP2008154003A (ja) 2006-12-18 2008-07-03 Ntt Docomo Inc 移動通信端末及び送信電力制御方法
JP2008221633A (ja) 2007-03-13 2008-09-25 Toyo Mach & Metal Co Ltd 射出成形機

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5149550B2 (ja) * 1972-09-14 1976-12-27
JPH06326141A (ja) * 1993-05-17 1994-11-25 Mitsubishi Electric Corp 半導体チップ接合用基材および半導体チップ接合用半田材および半導体チップ接合用半田材の製造方法
KR100703830B1 (ko) * 1996-12-26 2007-04-05 가부시키가이샤 히타치세이사쿠쇼 수지밀봉형 반도체장치의 제조방법
WO1998035382A1 (en) * 1997-02-10 1998-08-13 Matsushita Electronics Corporation Resin sealed semiconductor device and method for manufacturing the same
US6316736B1 (en) * 1998-06-08 2001-11-13 Visteon Global Technologies, Inc. Anti-bridging solder ball collection zones
US6115262A (en) * 1998-06-08 2000-09-05 Ford Motor Company Enhanced mounting pads for printed circuit boards
TW516346B (en) * 1999-04-06 2003-01-01 Eighttech Tectron Co Ltd Device for heating printed-circuit board
JP3924481B2 (ja) * 2002-03-08 2007-06-06 ローム株式会社 半導体チップを使用した半導体装置
KR100951626B1 (ko) * 2002-03-08 2010-04-09 로무 가부시키가이샤 반도체 칩을 사용한 반도체 장치
US20050056458A1 (en) * 2003-07-02 2005-03-17 Tsuyoshi Sugiura Mounting pad, package, device, and method of fabricating the device
CN100481535C (zh) * 2004-03-24 2009-04-22 日立电线精密株式会社 发光器件的制造方法和发光器件
JP4560830B2 (ja) * 2004-06-28 2010-10-13 三菱マテリアル株式会社 はんだペースト用Ａｕ−Ｓｎ合金粉末
JP4777692B2 (ja) 2005-06-06 2011-09-21 ローム株式会社 半導体装置
JP4826735B2 (ja) * 2005-11-21 2011-11-30 三菱マテリアル株式会社 大きなボイドを内蔵することのないＡｕ−Ｓｎ合金バンプの製造方法
JP4940900B2 (ja) * 2006-11-08 2012-05-30 日亜化学工業株式会社 実装用部品、および半導体装置
JP4962217B2 (ja) * 2007-08-28 2012-06-27 富士通株式会社 プリント配線基板及び電子装置製造方法

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09107173A (ja) * 1995-10-11 1997-04-22 Tokai Rika Co Ltd パッド構造及び配線基板装置
JP2005052869A (ja) * 2003-08-06 2005-03-03 Sumitomo Metal Mining Co Ltd 高温はんだ付用ろう材とそれを用いた半導体装置
WO2006132130A1 (ja) * 2005-06-06 2006-12-14 Rohm Co., Ltd. 半導体装置、基板および半導体装置の製造方法
JP2007061857A (ja) 2005-08-31 2007-03-15 Mitsubishi Materials Corp Ａｕ−Ｓｎ合金はんだペーストを用いた基板と素子の接合方法
JP2008010545A (ja) * 2006-06-28 2008-01-17 Mitsubishi Materials Corp Ａｕ−Ｓｎ合金はんだペーストを用いて素子の接合面全面を基板に接合する方法
JP2008154003A (ja) 2006-12-18 2008-07-03 Ntt Docomo Inc 移動通信端末及び送信電力制御方法
JP2008221633A (ja) 2007-03-13 2008-09-25 Toyo Mach & Metal Co Ltd 射出成形機

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP2290676A4

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017212354A (ja) * 2016-05-26 2017-11-30 ローム株式会社 Ｌｅｄモジュール

Also Published As

Publication number Publication date
CN103208435A (zh) 2013-07-17
CN102047397B (zh) 2013-10-16
TWI536466B (zh) 2016-06-01
KR20110035996A (ko) 2011-04-06
CN103208435B (zh) 2016-01-20
TW201019405A (en) 2010-05-16
EP2290676A4 (en) 2012-01-11
EP2290676A1 (en) 2011-03-02
CN102047397A (zh) 2011-05-04
US20110067911A1 (en) 2011-03-24
KR101565184B1 (ko) 2015-11-02

Similar Documents

Publication Publication Date Title
WO2009151123A1 (ja) はんだペーストを用いた基板と被搭載物の接合方法
US7201304B2 (en) Multi-functional solder and articles made therewith, such as microelectronic components
JP3476464B2 (ja) すずビスマス半田ペーストと，このペーストを利用して，高温特性の改良された接続を形成する方法
US20070221711A1 (en) Method of Packaging Electronic Component
KR20030096420A (ko) 고온 무연 땜납용 조성물, 방법 및 소자
WO2013132942A1 (ja) 接合方法、接合構造体およびその製造方法
JP2010056399A (ja) 位置合わせ性に優れたはんだペーストを用いた基板と被搭載物の接合方法
WO2019054509A1 (ja) 半導体素子の実装構造及び半導体素子と基板との組み合わせ
CN101119827B (zh) 用于具有不同基板的热可靠封装的方法和配置
KR101733023B1 (ko) 경화제, 그 경화제를 포함하는 열경화성 수지 조성물, 그것을 사용한 접합 방법, 및 열경화성 수지의 경화 온도의 제어 방법
JP4366838B2 (ja) 電子回路モジュールの製造方法
US6214131B1 (en) Mixed solder pastes for low-temperature soldering process
JP4134976B2 (ja) 半田接合方法
JP5758242B2 (ja) 鉛フリー接合材料
JP5699472B2 (ja) はんだ材料とその作製方法、及びこれを用いた半導体装置の製造方法
JP6958156B2 (ja) 半導体装置の製造方法
JP4259445B2 (ja) 半田ペーストおよび半田接合方法
JPH0318041A (ja) 電気的接合部
JP2014146635A (ja) はんだ接合方法およびはんだボールと電極との接合構造体
JP4259431B2 (ja) 半田ペーストおよび半田接合方法
JP2009302229A (ja) 位置合わせ性に優れたはんだペーストを用いた基板と被搭載物の接合方法
JP2004095907A (ja) ハンダ接合構造およびハンダペースト
KR102282259B1 (ko) 전자 부품 및 전자 부품의 제조 방법
US20050199684A1 (en) Method of semiconductor device assembly including fatigue-resistant ternary solder alloy
JPH07120848B2 (ja) 電気的接合部

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 200980120436.1

Country of ref document: CN

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 09762553

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 20107022971

Country of ref document: KR

Kind code of ref document: A

WWE Wipo information: entry into national phase

Ref document number: 2009762553

Country of ref document: EP

WWE Wipo information: entry into national phase

Ref document number: 12736986

Country of ref document: US

NENP Non-entry into the national phase

Ref country code: DE