WO2007135906A1 - Procédé de gravure à sec d'un film intermédiaire isolant - Google Patents

Procédé de gravure à sec d'un film intermédiaire isolant Download PDF

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Publication number
WO2007135906A1
WO2007135906A1 PCT/JP2007/060010 JP2007060010W WO2007135906A1 WO 2007135906 A1 WO2007135906 A1 WO 2007135906A1 JP 2007060010 W JP2007060010 W JP 2007060010W WO 2007135906 A1 WO2007135906 A1 WO 2007135906A1
Authority
WO
WIPO (PCT)
Prior art keywords
gas
etching
interlayer insulating
insulating film
dry etching
Prior art date
Application number
PCT/JP2007/060010
Other languages
English (en)
Japanese (ja)
Inventor
Yasuhiro Morikawa
Koukou Suu
Original Assignee
Ulvac, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ulvac, Inc. filed Critical Ulvac, Inc.
Priority to US12/301,786 priority Critical patent/US20100219158A1/en
Priority to JP2008516618A priority patent/JP4950188B2/ja
Priority to KR1020087028192A priority patent/KR101190137B1/ko
Priority to DE112007001243.9T priority patent/DE112007001243B4/de
Priority to CN2007800189986A priority patent/CN101454878B/zh
Publication of WO2007135906A1 publication Critical patent/WO2007135906A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31127—Etching organic layers
    • H01L21/31133—Etching organic layers by chemical means
    • H01L21/31138—Etching organic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Plasma & Fusion (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

L'invention concerne un procédé de gravure à sec d'un film intermédiaire isolant, le film intermédiaire isolant étant microfabriqué tout en formant un film polymère sur une résine ARF ou une résine KrF disposée sur le film intermédiaire isolant par un gaz de gravure. Le gaz de gravure est introduit à une pression de 0,5 Pa ou moins et la gravure est réalisée tout en formant le film polymère ayant un pic de liaison C-F voisin de 1 200 cm-1, et un pic de liaison C-N voisin de 1 600 cm-1 et un pic de liaison C-H (spectre mesuré par un spectrophotomètre à infrarouge de transformation de Fourier) voisin de 3 300 cm-1.
PCT/JP2007/060010 2006-05-24 2007-05-16 Procédé de gravure à sec d'un film intermédiaire isolant WO2007135906A1 (fr)

Priority Applications (5)

Application Number Priority Date Filing Date Title
US12/301,786 US20100219158A1 (en) 2006-05-24 2007-05-16 Method for dry etching interlayer insulating film
JP2008516618A JP4950188B2 (ja) 2006-05-24 2007-05-16 層間絶縁膜のドライエッチング方法
KR1020087028192A KR101190137B1 (ko) 2006-05-24 2007-05-16 층간 절연막의 드라이 에칭 방법
DE112007001243.9T DE112007001243B4 (de) 2006-05-24 2007-05-16 Verfahren zum Trockenätzen einer Zwischenisolierschicht
CN2007800189986A CN101454878B (zh) 2006-05-24 2007-05-16 层间绝缘膜的干式蚀刻方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2006-143868 2006-05-24
JP2006143868 2006-05-24

Publications (1)

Publication Number Publication Date
WO2007135906A1 true WO2007135906A1 (fr) 2007-11-29

Family

ID=38723220

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/060010 WO2007135906A1 (fr) 2006-05-24 2007-05-16 Procédé de gravure à sec d'un film intermédiaire isolant

Country Status (7)

Country Link
US (1) US20100219158A1 (fr)
JP (1) JP4950188B2 (fr)
KR (1) KR101190137B1 (fr)
CN (1) CN101454878B (fr)
DE (1) DE112007001243B4 (fr)
TW (1) TWI437633B (fr)
WO (1) WO2007135906A1 (fr)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009193988A (ja) * 2008-02-12 2009-08-27 Tokyo Electron Ltd プラズマエッチング方法及びコンピュータ記憶媒体
JP2012096823A (ja) * 2010-11-01 2012-05-24 Takagi Seiko Corp 液体貯蔵容器
WO2021161368A1 (fr) * 2020-02-10 2021-08-19 株式会社日立ハイテク Procédé de traitement par plasma
JP7445150B2 (ja) 2019-03-22 2024-03-07 セントラル硝子株式会社 ドライエッチング方法及び半導体デバイスの製造方法

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7637269B1 (en) * 2009-07-29 2009-12-29 Tokyo Electron Limited Low damage method for ashing a substrate using CO2/CO-based process
KR101102495B1 (ko) * 2011-08-11 2012-01-05 주식회사 미로 가로등
US11798811B2 (en) 2020-06-26 2023-10-24 American Air Liquide, Inc. Iodine-containing fluorocarbon and hydrofluorocarbon compounds for etching semiconductor structures

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004071731A (ja) * 2002-08-05 2004-03-04 Ulvac Japan Ltd エッチング方法
JP2005251814A (ja) * 2004-03-02 2005-09-15 Ulvac Japan Ltd 層間絶縁膜のドライエッチング方法及びその装置
JP2006100628A (ja) * 2004-09-30 2006-04-13 Hitachi High-Technologies Corp プラズマ処理方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6635185B2 (en) * 1997-12-31 2003-10-21 Alliedsignal Inc. Method of etching and cleaning using fluorinated carbonyl compounds
JP4538209B2 (ja) * 2003-08-28 2010-09-08 株式会社日立ハイテクノロジーズ 半導体装置の製造方法
JP2007537602A (ja) * 2004-05-11 2007-12-20 アプライド　マテリアルズ　インコーポレイテッド フルオロカーボン化学エッチングにおけるｈ２添加物を使用しての炭素ドープ酸化ケイ素エッチング
US20060051965A1 (en) * 2004-09-07 2006-03-09 Lam Research Corporation Methods of etching photoresist on substrates
US7794880B2 (en) * 2005-11-16 2010-09-14 California Institute Of Technology Fluorination of multi-layered carbon nanomaterials

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004071731A (ja) * 2002-08-05 2004-03-04 Ulvac Japan Ltd エッチング方法
JP2005251814A (ja) * 2004-03-02 2005-09-15 Ulvac Japan Ltd 層間絶縁膜のドライエッチング方法及びその装置
JP2006100628A (ja) * 2004-09-30 2006-04-13 Hitachi High-Technologies Corp プラズマ処理方法

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009193988A (ja) * 2008-02-12 2009-08-27 Tokyo Electron Ltd プラズマエッチング方法及びコンピュータ記憶媒体
CN102254813A (zh) * 2008-02-12 2011-11-23 东京毅力科创株式会社 等离子体蚀刻方法
JP2012096823A (ja) * 2010-11-01 2012-05-24 Takagi Seiko Corp 液体貯蔵容器
JP7445150B2 (ja) 2019-03-22 2024-03-07 セントラル硝子株式会社 ドライエッチング方法及び半導体デバイスの製造方法
WO2021161368A1 (fr) * 2020-02-10 2021-08-19 株式会社日立ハイテク Procédé de traitement par plasma
JPWO2021161368A1 (fr) * 2020-02-10 2021-08-19
JP7075537B2 (ja) 2020-02-10 2022-05-25 株式会社日立ハイテク プラズマ処理方法
TWI783362B (zh) * 2020-02-10 2022-11-11 日商日立全球先端科技股份有限公司 電漿處理方法
US11887814B2 (en) 2020-02-10 2024-01-30 Hitachi High-Tech Corporation Plasma processing method

Also Published As

Publication number Publication date
US20100219158A1 (en) 2010-09-02
DE112007001243B4 (de) 2015-01-22
CN101454878B (zh) 2011-03-23
KR101190137B1 (ko) 2012-10-12
JP4950188B2 (ja) 2012-06-13
KR20090012329A (ko) 2009-02-03
JPWO2007135906A1 (ja) 2009-10-01
DE112007001243T5 (de) 2009-05-28
TWI437633B (zh) 2014-05-11
CN101454878A (zh) 2009-06-10
TW200809961A (en) 2008-02-16

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