WO2002041381A1 - Procede d'elaboration d'un dispositif semi-conducteur - Google Patents
Procede d'elaboration d'un dispositif semi-conducteur Download PDFInfo
- Publication number
- WO2002041381A1 WO2002041381A1 PCT/JP2001/008840 JP0108840W WO0241381A1 WO 2002041381 A1 WO2002041381 A1 WO 2002041381A1 JP 0108840 W JP0108840 W JP 0108840W WO 0241381 A1 WO0241381 A1 WO 0241381A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- film
- fluid
- substrate
- semiconductor device
- manufacturing
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76819—Smoothing of the dielectric
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/31051—Planarisation of the insulating layers
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/399,755 US7273820B2 (en) | 2000-11-17 | 2001-10-09 | Method for fabricating semiconductor device |
EP01974736A EP1341224A4 (en) | 2000-11-17 | 2001-10-09 | METHOD FOR PRODUCING A SEMICONDUCTOR DEVICE |
KR10-2003-7006715A KR20030051844A (ko) | 2000-11-17 | 2001-10-09 | 반도체장치의 제조방법 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2000350934A JP3927768B2 (ja) | 2000-11-17 | 2000-11-17 | 半導体装置の製造方法 |
JP2000-350934 | 2000-11-17 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2002041381A1 true WO2002041381A1 (fr) | 2002-05-23 |
Family
ID=18824078
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2001/008840 WO2002041381A1 (fr) | 2000-11-17 | 2001-10-09 | Procede d'elaboration d'un dispositif semi-conducteur |
Country Status (7)
Country | Link |
---|---|
US (2) | US7273820B2 (ja) |
EP (1) | EP1341224A4 (ja) |
JP (1) | JP3927768B2 (ja) |
KR (1) | KR20030051844A (ja) |
CN (1) | CN1210771C (ja) |
TW (1) | TW517285B (ja) |
WO (1) | WO2002041381A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004114388A1 (ja) * | 2003-06-20 | 2004-12-29 | Matsushita Electric Industrial Co., Ltd. | 半導体装置の製造方法 |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004166963A (ja) * | 2002-11-20 | 2004-06-17 | Aruze Corp | 遊技機 |
TW200503167A (en) * | 2003-06-20 | 2005-01-16 | Matsushita Electric Ind Co Ltd | Manufacturing method of semiconductor device |
TW200507175A (en) * | 2003-06-20 | 2005-02-16 | Matsushita Electric Ind Co Ltd | Pattern forming method, and manufacturing method for semiconductor device |
JP2006066637A (ja) * | 2004-08-26 | 2006-03-09 | Murata Mfg Co Ltd | セラミック多層基板の製造方法およびそれに用いられる押し型 |
US20060211237A1 (en) | 2005-03-21 | 2006-09-21 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method and apparatus for planarizing gap-filling material |
JP2008140786A (ja) * | 2005-03-28 | 2008-06-19 | Pioneer Electronic Corp | ゲート絶縁膜、有機トランジスタ、有機el表示装置の製造方法、ディスプレイ |
JP4531661B2 (ja) * | 2005-08-26 | 2010-08-25 | 東京エレクトロン株式会社 | 基板の処理方法及び基板の処理装置 |
JP4950771B2 (ja) * | 2007-01-19 | 2012-06-13 | 東京エレクトロン株式会社 | 塗布処理方法、プログラム及びコンピュータ記憶媒体 |
KR100862008B1 (ko) | 2007-06-04 | 2008-10-07 | 삼성전기주식회사 | 인쇄회로기판의 제조방법 |
CN101477305B (zh) * | 2008-01-03 | 2012-10-10 | 鸿富锦精密工业(深圳)有限公司 | 用于压印制程的模仁制造方法 |
TWI411875B (zh) * | 2008-01-04 | 2013-10-11 | Hon Hai Prec Ind Co Ltd | 用於壓印製程之模仁製造方法 |
JP4754595B2 (ja) * | 2008-03-05 | 2011-08-24 | 大日本スクリーン製造株式会社 | 薄膜形成装置および方法 |
US8434229B2 (en) * | 2010-11-24 | 2013-05-07 | Canon Kabushiki Kaisha | Liquid ejection head manufacturing method |
KR101535403B1 (ko) * | 2013-11-19 | 2015-07-10 | 주식회사 네패스 | 반도체 패키지 제조방법 |
JP6289996B2 (ja) * | 2014-05-14 | 2018-03-07 | 東京エレクトロン株式会社 | 被エッチング層をエッチングする方法 |
JP6542141B2 (ja) * | 2016-03-08 | 2019-07-10 | 東芝メモリ株式会社 | パターン形成方法 |
JP7175620B2 (ja) * | 2018-03-30 | 2022-11-21 | キヤノン株式会社 | 型を用いて基板上の組成物を成形する成形装置、成形方法、および物品の製造方法 |
JP7119617B2 (ja) * | 2018-06-15 | 2022-08-17 | 東京エレクトロン株式会社 | 塗布膜形成方法及び塗布膜形成装置 |
KR102353946B1 (ko) * | 2020-02-25 | 2022-01-20 | 주식회사 나노바이오시스템 | 치주조직 재생 유도제 및 이의 제조장치와 제조방법 |
KR102535126B1 (ko) * | 2020-10-15 | 2023-05-22 | (주)휴넷플러스 | 유체 가압을 이용한 반도체 집적소자의 평탄화 방법 |
CN113725079A (zh) * | 2021-08-11 | 2021-11-30 | 长江存储科技有限责任公司 | 基体的表面处理方法、预处理衬底以及存储器的制作方法 |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07147393A (ja) * | 1993-07-20 | 1995-06-06 | Fuji Electric Co Ltd | 半導体装置およびその製造方法ならびに製造装置 |
JPH09213791A (ja) * | 1996-02-01 | 1997-08-15 | Sumitomo Chem Co Ltd | 半導体装置の製造方法及び半導体装置 |
US5679610A (en) * | 1994-12-15 | 1997-10-21 | Kabushiki Kaisha Toshiba | Method of planarizing a semiconductor workpiece surface |
JPH1085641A (ja) * | 1996-09-10 | 1998-04-07 | Toshiba Microelectron Corp | 液体塗布方法および液体塗布装置 |
JPH10247647A (ja) * | 1997-03-04 | 1998-09-14 | Sony Corp | 基板面の平坦化方法及び平坦化装置 |
JPH11274297A (ja) * | 1998-03-24 | 1999-10-08 | Sharp Corp | 多層配線層の形成方法及び多層配線層 |
JP2000294627A (ja) * | 1999-04-09 | 2000-10-20 | Seiko Epson Corp | 半導体装置の製造方法 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6245045A (ja) * | 1985-08-22 | 1987-02-27 | Nec Corp | 半導体装置の製造方法 |
US5254143A (en) * | 1990-07-09 | 1993-10-19 | Dainippon Ink And Chemical, Inc. | Diaphragm for gas-liquid contact, gas-liquid contact apparatus and process for producing liquid containing gas dissolved therein |
US6111306A (en) * | 1993-12-06 | 2000-08-29 | Fujitsu Limited | Semiconductor device and method of producing the same and semiconductor device unit and method of producing the same |
US5434107A (en) * | 1994-01-28 | 1995-07-18 | Texas Instruments Incorporated | Method for planarization |
EP0683511B1 (en) * | 1994-05-18 | 2000-02-23 | AT&T Corp. | Device fabrication involving planarization |
JP3492880B2 (ja) | 1996-04-16 | 2004-02-03 | 日本電信電話株式会社 | 薄膜形成方法 |
JP3512596B2 (ja) * | 1996-07-04 | 2004-03-29 | シャープ株式会社 | 旋光光学素子およびその製造方法と、それを用いた画像表示装置 |
JP3428829B2 (ja) * | 1996-08-27 | 2003-07-22 | キヤノン株式会社 | 位置合わせ方法及びそれを用いた投影露光装置 |
JP3504092B2 (ja) | 1996-11-19 | 2004-03-08 | 大日本スクリーン製造株式会社 | 塗布液塗布方法 |
EP0862202A1 (en) | 1997-02-27 | 1998-09-02 | Nec Corporation | Method for making a semiconductor device with a planarizing SOG layer and apparatus used in the same method |
US6124215A (en) * | 1997-10-06 | 2000-09-26 | Chartered Semiconductor Manufacturing Ltd. | Apparatus and method for planarization of spin-on materials |
US6248168B1 (en) | 1997-12-15 | 2001-06-19 | Tokyo Electron Limited | Spin coating apparatus including aging unit and solvent replacement unit |
AU7367400A (en) | 1999-09-09 | 2001-04-10 | Allied-Signal Inc. | Improved apparatus and methods for integrated circuit planarization |
-
2000
- 2000-11-17 JP JP2000350934A patent/JP3927768B2/ja not_active Expired - Lifetime
-
2001
- 2001-10-09 EP EP01974736A patent/EP1341224A4/en not_active Withdrawn
- 2001-10-09 KR KR10-2003-7006715A patent/KR20030051844A/ko active Search and Examination
- 2001-10-09 WO PCT/JP2001/008840 patent/WO2002041381A1/ja not_active Application Discontinuation
- 2001-10-09 CN CNB01819060XA patent/CN1210771C/zh not_active Expired - Fee Related
- 2001-10-09 US US10/399,755 patent/US7273820B2/en not_active Expired - Lifetime
- 2001-10-29 TW TW090126731A patent/TW517285B/zh not_active IP Right Cessation
-
2007
- 2007-04-06 US US11/783,131 patent/US20070202666A1/en not_active Abandoned
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07147393A (ja) * | 1993-07-20 | 1995-06-06 | Fuji Electric Co Ltd | 半導体装置およびその製造方法ならびに製造装置 |
US5679610A (en) * | 1994-12-15 | 1997-10-21 | Kabushiki Kaisha Toshiba | Method of planarizing a semiconductor workpiece surface |
JPH09213791A (ja) * | 1996-02-01 | 1997-08-15 | Sumitomo Chem Co Ltd | 半導体装置の製造方法及び半導体装置 |
JPH1085641A (ja) * | 1996-09-10 | 1998-04-07 | Toshiba Microelectron Corp | 液体塗布方法および液体塗布装置 |
JPH10247647A (ja) * | 1997-03-04 | 1998-09-14 | Sony Corp | 基板面の平坦化方法及び平坦化装置 |
JPH11274297A (ja) * | 1998-03-24 | 1999-10-08 | Sharp Corp | 多層配線層の形成方法及び多層配線層 |
JP2000294627A (ja) * | 1999-04-09 | 2000-10-20 | Seiko Epson Corp | 半導体装置の製造方法 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004114388A1 (ja) * | 2003-06-20 | 2004-12-29 | Matsushita Electric Industrial Co., Ltd. | 半導体装置の製造方法 |
Also Published As
Publication number | Publication date |
---|---|
EP1341224A4 (en) | 2005-01-26 |
US7273820B2 (en) | 2007-09-25 |
US20040029363A1 (en) | 2004-02-12 |
CN1475029A (zh) | 2004-02-11 |
KR20030051844A (ko) | 2003-06-25 |
JP2002158221A (ja) | 2002-05-31 |
US20070202666A1 (en) | 2007-08-30 |
TW517285B (en) | 2003-01-11 |
EP1341224A1 (en) | 2003-09-03 |
CN1210771C (zh) | 2005-07-13 |
JP3927768B2 (ja) | 2007-06-13 |
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