WO1999008320A1 - Composants electroniques montes en surface enveloppes dans une resine - Google Patents

Composants electroniques montes en surface enveloppes dans une resine Download PDF

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Publication number
WO1999008320A1
WO1999008320A1 PCT/JP1998/003457 JP9803457W WO9908320A1 WO 1999008320 A1 WO1999008320 A1 WO 1999008320A1 JP 9803457 W JP9803457 W JP 9803457W WO 9908320 A1 WO9908320 A1 WO 9908320A1
Authority
WO
WIPO (PCT)
Prior art keywords
resin
electronic component
layer
hole
wiring board
Prior art date
Application number
PCT/JP1998/003457
Other languages
English (en)
Japanese (ja)
Inventor
Masashi Gotoh
Jitsuo Kanazawa
Shuichiro Yamamoto
Original Assignee
Tdk Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tdk Corporation filed Critical Tdk Corporation
Priority to EP98935341A priority Critical patent/EP1020908B1/fr
Priority to DE69833943T priority patent/DE69833943D1/de
Publication of WO1999008320A1 publication Critical patent/WO1999008320A1/fr
Priority to US09/499,299 priority patent/US6281436B1/en

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/403—Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49805—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00—Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02—Details
    • H03H9/05—Holders; Supports
    • H03H9/10—Mounting in enclosures
    • H03H9/1064—Mounting in enclosures for surface acoustic wave [SAW] devices
    • H03H9/1071—Mounting in enclosures for surface acoustic wave [SAW] devices the enclosure being defined by a frame built on a substrate and a cap, the frame having no mechanical contact with the SAW device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09145—Edge details
    • H05K2201/09181—Notches in edge pads
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10727—Leadless chip carrier [LCC], e.g. chip-modules for cards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703—Plating
    • H05K2203/0723—Electroplating, e.g. finish plating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0052—Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/244—Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3442—Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections

Definitions

  • the present invention relates to improving the airtightness of an electronic component in which an electronic component element is hermetically sealed with a resin wiring board and another resin material, and particularly to a method of hermetically sealing a piezoelectric element such as a surface acoustic wave element in a cavity.
  • the present invention relates to a suitable resin-sealed surface mounting type electronic component sealing structure. That is, the resin-sealed surface-mount type electronic component according to the present invention has a sealed cavity region (vacuum or gas region), and is simply a resin-sealed or air-sealed device that shuts off the electronic component element from the outside air. This is a different technical field from resin casting. Background art
  • the main method of cavity sealing is a hermetic package using a ceramic case, and recently a sealing method using a resin material has been proposed in Japanese Patent Application Laid-Open No. 9-148847, etc. in terms of economy. Have been.
  • FIGS. 4 and 5 schematically show an example of a conventional hermetically sealed structure made of a resin material carried out by the present applicant.
  • reference numeral 1 denotes a resin wiring board, and an electronic component element 5 is bonded and fixed onto the resin wiring board 1 via a bonding member (for example, gold) 6.
  • the electronic component element 5 is connected to the outside via a conductor on the wiring board 1 through the through hole 4 as a through conductive hole formed in the wiring board 1.
  • Reference numeral 2 denotes a resin frame substrate, which has a space for accommodating the electronic component element 5, and has a resin cover thereon.
  • the substrate 3 is placed, and the wiring substrate 1 and the frame substrate 2 and the frame substrate 2 and the lid substrate 3 are bonded and sealed with an adhesive.
  • the through-hole 4 is connected by a conductor on the wiring board 1 to the electronic component element 5 housed in the cavity 7 surrounded by the wiring board 1, the frame board 2, and the lid board 3, so that the half-cylinder is formed.
  • a surface-mounted electronic component using the through-hole surface 4a cut into a shape as a side electrode for external connection can be configured, and the electronic component housed inside by connecting the through-hole surface 4a to an external circuit The function of element 5 can be operated.
  • FIGS. 6 and 7 are enlarged views of through-hole portions of the hermetically sealed structure made of the resin material shown in FIGS. 4 and 5.
  • the through-holes 4 are provided on the inner peripheral surface thereof for the purpose of electrically connecting the conductors 10 and 11 (for example, a Cu foil pattern attached to the substrate) on the upper and lower surfaces of the resin wiring board 1.
  • a Cu plating layer 12 was deposited and formed thereon, and an Au plating layer 13 of Au plating was deposited on the uppermost layer via a Ni plating layer or the like (not shown). Things.
  • the purpose of the Au plating is to solder the internal surface of the through-hole 4 and the external connection surface of the wiring board 1 (the lower side in the drawing) when using the surface-mounted electronic component. This is to form a chemically stable surface so that the solderability does not deteriorate even when exposed.
  • land pads 10a and 11a are provided on both sides of the through hole 4 in order to easily fill the inside of the through hole and to secure connection reliability with the pattern of the wiring board 1.
  • These land pads 10 a, 11 a are formed integrally with the ends of the conductors 10, 11 on the upper and lower surfaces of the resin wiring board 1 so as to surround the entire periphery of the through hole 4. It is configured as an annular portion, and the Cu plating layer 12 to the uppermost Au plating layer 13 are laminated by the above plating process.
  • the bonding surface is roughened by a chemical treatment in order to improve the adhesiveness.
  • the Au land pad surface P (the surface on which the Au plating layer 13 is applied on the top layer of the land pad 10a) on the upper surface of the wiring board 1 is chemically stable, so that the surface is roughened. It is not peeled off, resulting in a surface with low bonding reliability.
  • the minimum air-tight and reliable bonding surface distance blocking the outside air and the cavity 7 is determined from the total width L 0 of the bonding surface. Will also be a fairly small L1.
  • the product dimensions must be increased by the width of the Au land pad surface P to secure the required L1 dimension, and the product dimensions are limited.
  • the hermetic reliability is lowered.
  • the difference is confirmed by a thermal shock test at 140 ° C to 85 ° C, and when the through-hole 16 is cut into a semi-cylindrical shape to be used as a side electrode of the electronic component, Due to the mechanical stress of the conductor, the conductor 16a in the through-hole may peel off or the strength of the terminal may decrease when soldering to an external circuit. Therefore, it is not appropriate to use it as a side electrode for external connection of the electronic component.
  • An object of the present invention is to improve the reliability of adhesion between a resin wiring substrate and a lid member, which forms a sealed region in which the interior surrounding an electronic component element has a hollow space, and thereby improve the reliability of hermetic sealing.
  • a resin-sealed surface-mounted electronic component that can be manufactured.
  • the present invention provides an electronic component element mounted on a resin wiring board, a lid member adhered to the wiring board so as to cover the electronic component element, and the electronic component element is stored.
  • a resin-encapsulated surface-mounted electronic component in which a hollow sealing region is formed, and a through-conductive hole or a groove provided in the bonding surface of the lid member on the wiring substrate forms a connection conduction path with an external circuit.
  • the plating layer in the through-hole or the groove is formed of two or more types of metal layers including a CU layer having an Au layer as the uppermost layer, and the upper surface and the lower surface of the wiring board are formed with the through-hole or the groove. It has a conductor connected to the periphery and the Cu layer is formed on the conductor, and there is no other plating layer including the Au layer on the conductor on the upper surface in the bonding surface of the lid member.
  • the present invention is characterized in that the external circuit connection pattern is provided over the entire area of the lower surface side.
  • a semi-cylindrical through-conductive groove having a shape obtained by substantially dividing a circular through-conductive hole into two and being provided in a cover member bonding surface on the wiring board is used for external connection.
  • it is a side electrode.
  • the electronic component element is a piezoelectric element.
  • the lid member has a configuration in which a frame and a lid plate are bonded and integrated.
  • FIG. 1 is a front cross-sectional view of an embodiment of a resin-sealed surface-mounted electronic component according to the present invention, in which an intermediate portion is omitted.
  • FIG. 2 is a front cross-sectional view showing a structure around a through hole in a stage before dividing the through hole in the embodiment.
  • FIG. 3 is a plan view showing a structure around the through hole in a stage before dividing the through hole in the embodiment.
  • FIG. 4 is a front sectional view schematically showing a conventional hermetically sealed structure made of a resin material.
  • FIG. 5 is a front sectional view of a resin-sealed surface-mounted electronic component obtained by cutting the structure of FIG.
  • FIG. 6 is a front sectional view showing a structure around a through hole in a conventional hermetically sealed structure made of a resin material.
  • FIG. 7 is a plan view of the same.
  • FIG. 8 is a plan view showing a conventional substrate with a landless through-hole structure.
  • FIG. 9 is a front sectional view of the same.
  • FIG. 1 is an embodiment of a resin-sealed surface-mounted electronic component, and is a front sectional view in which an intermediate portion is omitted.
  • FIGS. 2 and 3 show through-hole portions before cutting into individual electronic components.
  • 3 is a front sectional view and a plan view of FIG.
  • the through hole 20 is provided for the purpose of electrically connecting the conductor 10 on the upper surface of the resin wiring board 1 (for example, a Cu foil pattern attached to the substrate) to the conductor 11 on the lower surface.
  • a Cu plating layer 12 of Cu plating is formed and formed, and an Au plating is formed on the uppermost layer via a Ni plating layer (not shown).
  • Layer 13 was applied and formed.
  • the land pads 10 a and 11 a on both sides of the through hole 4 the land pad 10 a on the upper surface side of the resin wiring board 1 and the conductor 10 continuous therewith are provided with a Cu plating layer.
  • the bonding surface of the frame substrate 2 is provided with a Ni plating layer or an Au plating layer.
  • the lumber layer 13 is not formed.
  • the land pad 11a on the lower surface side of the resin wiring board 1 and the conductor 11 (continuously connected to the external circuit) which is integrally connected to the land pad 11a are provided with the Cu plating layer 1 2 in the same manner as the inner peripheral surface of the through hole.
  • a Ni plating layer to an Au plating layer 13 are deposited and formed over the entire area.
  • the resin wiring substrate 1 and the resin frame substrate 2 and the resin frame substrate 2 and the resin cover substrate 3 having the through hole peripheral structure as described above are bonded and sealed with an adhesive, respectively, and then cut at the cutting position Z. By doing so, an individual resin-sealed surface-mounted electronic component as shown in Fig. 1 can be obtained.
  • the bonding surface between the wiring substrate 1 and the frame substrate 2 is made of only resin and Cu, and a sufficiently airtight and reliable bonding surface is obtained by the bonding technology (roughening technology) of the resin substrate.
  • the minimum distance of the airtight and reliable bonding surface that shields the cavity 7 that holds the electronic component element 5 from the outside air from outside air is L2 in Fig. 3, and can be close to the total width L0 of the bonding surface. It can be much larger than the example L1.
  • the resin-sealed surface-mounted electronic component shown in FIG. 1 has a lid member composed of a resin frame substrate 2 (frame body) and a resin lid substrate 3 (lid plate) that are air-tightly bonded to each other.
  • An electronic component element 5 such as a surface acoustic wave element as a piezoelectric element is housed and fixed in a cavity 7 inside the lid member, which is air-tightly adhered and covered on the top, as shown in FIGS. 2 and 3.
  • the semi-cylindrical through conductive groove in which the hole 20 is substantially divided into two forms a side electrode 21 for external connection and a bottom electrode 2 2 for external connection composed of an external circuit connection pattern on the lower surface of the wiring board 1. It functions as a connection conducting path to the connection.
  • the material of the resin wiring substrate 1, the resin frame substrate 2, and the resin lid substrate 3 is, for example, BT resin (bismaleimide triazine resin), and the mutual bonding can be performed by using a BT resin-based pre-reader.
  • BT resin bismaleimide triazine resin
  • the Cu plating layer 12 is provided with land pads on the top and bottom (land pads of the conductor 10a , 11a), including the plating of the intermediate layer (Ni etc.)
  • Au plating layer 13 is provided with a land pad on the bonding surface of the resin frame substrate 2 on the upper surface side of the wiring board 1.
  • the bonding surface between the wiring board 1 and the resin frame substrate 2 is made of resin and C It is made of only u, and it is possible to provide a sufficiently airtight and reliable bonding surface by the surface roughening technology, and to significantly increase the cutoff distance between the cavity 7 in which the electronic component elements 5 are hermetically stored and the outside air. Becomes possible. For this reason, the hermetic reliability can be greatly improved.
  • the through-hole 20 of FIGS. 2 and 3 was cut into approximately two parts at the cutting position Z to form the external connection side electrode 21 composed of a semi-cylindrical through conductive groove.
  • the cutting position to, for example, Z ′ in FIGS. 2 and 3, the through hole 20 is left as it is, and the bottom surface electrode 22 for external connection composed of the external circuit connection pattern on the lower surface of the wiring board 1 is It is also possible to use a connection conduction path.
  • the lid member may be a cap-shaped resin member originally formed so as to have a concave portion inside, instead of being configured by bonding the resin frame substrate 2 and the resin lid substrate 3 to each other. .
  • the sample is left in a humidity of 85 ° C and 85% RH to absorb moisture.
  • the adhesiveness of the adhesive surface between the resin wiring board and the lid member is improved, and the outside air and the electronic component element are hermetically sealed. It is possible to increase the cut-off distance from the cavity and to improve the airtight reliability. Further, since a pattern (land pad) of a Cu layer connected to the periphery of the through conductive hole or the groove is provided on the upper surface and the lower surface of the wiring board, the inner conductor of the through conductive hole or the groove is provided with a metal conductor.

Abstract

Afin de former des composants électroniques montés en surface enveloppés dans une résine, on fixe un élément composant électronique (5) sur une plaquette (1) à circuit imprimé constituée de résine et on forme une surface fermée creusée d'une cavité abritant ledit élément (5) en collant un élément couvercle sur la plaquette (1) de façon à recouvrir ledit élément (5); puis on forme des électrodes latérales (21) dans des rainures conductrices traversantes creusées dans la surface de liaison de l'élément couvercle sur la plaquette (1). Les couches plaquées dans les rainures traversantes comportent, sur les surfaces supérieure et inférieure de la plaquette (1), des conducteurs (10, 11) formés de couches métalliques de deux types différents ou davantage, notamment d'une couche d'or (13) constituant la couche supérieure et d'une couche de cuivre (12), et reliés aux bords périphériques des rainures conductrices. On n'applique sur le conducteur supérieur (10) que la couche de cuivre (12), mais pas les autres couches, notamment la couche d'or (13), ce qui améliore la fiabilité de l'adhérence entre la plaquette (1) et l'élément couvercle. Ce procédé améliore la fiabilité de l'adhérence entre la plaquette (1) et l'élément couvercle pour constituer la zone fermée creusée d'une cavité abritant l'élément (5) et donc l'étanchéité de ladite cavité.
PCT/JP1998/003457 1997-08-05 1998-08-04 Composants electroniques montes en surface enveloppes dans une resine WO1999008320A1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
EP98935341A EP1020908B1 (fr) 1997-08-05 1998-08-04 Composants electroniques montes en surface enveloppes dans une resine
DE69833943T DE69833943D1 (de) 1997-08-05 1998-08-04 Harzvergossene elektronische bauelemente vom oberflächenmontierungstyp
US09/499,299 US6281436B1 (en) 1997-08-05 2000-02-07 Encapsulated surface mounting electronic part

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP9/223029 1997-08-05
JP22302997A JP3669463B2 (ja) 1997-08-05 1997-08-05 樹脂封止表面実装型電子部品

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US09/499,299 Continuation US6281436B1 (en) 1997-08-05 2000-02-07 Encapsulated surface mounting electronic part

Publications (1)

Publication Number Publication Date
WO1999008320A1 true WO1999008320A1 (fr) 1999-02-18

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP1998/003457 WO1999008320A1 (fr) 1997-08-05 1998-08-04 Composants electroniques montes en surface enveloppes dans une resine

Country Status (5)

Country Link
US (1) US6281436B1 (fr)
EP (1) EP1020908B1 (fr)
JP (1) JP3669463B2 (fr)
DE (1) DE69833943D1 (fr)
WO (1) WO1999008320A1 (fr)

Cited By (1)

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Publication number Priority date Publication date Assignee Title
US6518501B1 (en) * 1999-10-26 2003-02-11 Nrs Technologies Inc. Electronic part and method of assembling the same

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IL133453A0 (en) 1999-12-10 2001-04-30 Shellcase Ltd Methods for producing packaged integrated circuit devices and packaged integrated circuit devices produced thereby
JP3376994B2 (ja) * 2000-06-27 2003-02-17 株式会社村田製作所 弾性表面波装置及びその製造方法
DE10133151B4 (de) * 2001-07-07 2004-07-29 Robert Bosch Gmbh Bauteil mit einem Gehäuse umgebenen Bauelement und Vorrichtung und Verfahren, die bei seiner Herstellung einsetzbar sind
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EP1020908A4 (fr) 2003-08-20
DE69833943D1 (de) 2006-05-11
JP3669463B2 (ja) 2005-07-06
US6281436B1 (en) 2001-08-28
JPH1155069A (ja) 1999-02-26
EP1020908B1 (fr) 2006-03-22

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