TWI541909B - 減少焊料上氧化物形成之技術 - Google Patents
減少焊料上氧化物形成之技術 Download PDFInfo
- Publication number
- TWI541909B TWI541909B TW100135872A TW100135872A TWI541909B TW I541909 B TWI541909 B TW I541909B TW 100135872 A TW100135872 A TW 100135872A TW 100135872 A TW100135872 A TW 100135872A TW I541909 B TWI541909 B TW I541909B
- Authority
- TW
- Taiwan
- Prior art keywords
- substrate
- plasma
- chamber
- bonding
- solder
- Prior art date
Links
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K1/00—Soldering, e.g. brazing, or unsoldering
- B23K1/20—Preliminary treatment of work or areas to be soldered, e.g. in respect of a galvanic coating
- B23K1/206—Cleaning
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K1/00—Soldering, e.g. brazing, or unsoldering
- B23K1/0008—Soldering, e.g. brazing, or unsoldering specially adapted for particular articles or work
- B23K1/0016—Brazing of electronic components
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K1/00—Soldering, e.g. brazing, or unsoldering
- B23K1/008—Soldering within a furnace
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K1/00—Soldering, e.g. brazing, or unsoldering
- B23K1/20—Preliminary treatment of work or areas to be soldered, e.g. in respect of a galvanic coating
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K1/00—Soldering, e.g. brazing, or unsoldering
- B23K1/20—Preliminary treatment of work or areas to be soldered, e.g. in respect of a galvanic coating
- B23K1/203—Fluxing, i.e. applying flux onto surfaces
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K3/00—Tools, devices, or special appurtenances for soldering, e.g. brazing, or unsoldering, not specially adapted for particular methods
- B23K3/04—Heating appliances
- B23K3/047—Heating appliances electric
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K3/00—Tools, devices, or special appurtenances for soldering, e.g. brazing, or unsoldering, not specially adapted for particular methods
- B23K3/08—Auxiliary devices therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67092—Apparatus for mechanical treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/67161—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers
- H01L21/67173—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers in-line arrangement
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
- H01L21/67207—Apparatus for manufacturing or treating in a plurality of work-stations comprising a chamber adapted to a particular process
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/741—Apparatus for manufacturing means for bonding, e.g. connectors
- H01L24/742—Apparatus for manufacturing bump connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/75—Apparatus for connecting with bump connectors or layer connectors
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K2101/00—Articles made by soldering, welding or cutting
- B23K2101/36—Electric or electronic devices
- B23K2101/40—Semiconductor devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/273—Manufacturing methods by local deposition of the material of the layer connector
- H01L2224/2731—Manufacturing methods by local deposition of the material of the layer connector in liquid form
- H01L2224/27318—Manufacturing methods by local deposition of the material of the layer connector in liquid form by dispensing droplets
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/273—Manufacturing methods by local deposition of the material of the layer connector
- H01L2224/2733—Manufacturing methods by local deposition of the material of the layer connector in solid form
- H01L2224/27334—Manufacturing methods by local deposition of the material of the layer connector in solid form using preformed layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
- H01L2224/27444—Manufacturing methods by blanket deposition of the material of the layer connector in gaseous form
- H01L2224/2745—Physical vapour deposition [PVD], e.g. evaporation, or sputtering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
- H01L2224/2746—Plating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/278—Post-treatment of the layer connector
- H01L2224/2781—Cleaning, e.g. oxide removal step, desmearing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/278—Post-treatment of the layer connector
- H01L2224/2782—Applying permanent coating, e.g. in-situ coating
- H01L2224/27826—Physical vapour deposition [PVD], e.g. evaporation, or sputtering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29144—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7501—Means for cleaning, e.g. brushes, for hydro blasting, for ultrasonic cleaning, for dry ice blasting, using gas-flow, by etching, by applying flux or plasma
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/751—Means for controlling the bonding environment, e.g. valves, vacuum pumps
- H01L2224/75101—Chamber
- H01L2224/75102—Vacuum chamber
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83009—Pre-treatment of the layer connector or the bonding area
- H01L2224/8301—Cleaning the layer connector, e.g. oxide removal step, desmearing
- H01L2224/83013—Plasma cleaning
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/832—Applying energy for connecting
- H01L2224/83201—Compression bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83399—Material
- H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/83801—Soldering or alloying
- H01L2224/83815—Reflow soldering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/27—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/146—Mixed devices
- H01L2924/1461—MEMS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Mechanical Engineering (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Pressure Welding/Diffusion-Bonding (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Wire Bonding (AREA)
- Manufacturing Of Printed Wiring (AREA)
Description
這申請案依據35 U.S.C. §119(e)主張Buu Diep等人之2010年11月5日申請,代理人檔號004578.2146,且名稱為“電漿移除金屬氧化物(Plasma Removal of Metal Oxide)”之美國暫時申請案第61/410,454號的利益,且該申請案在此加入作為參考。
本發明係有關於一種減少焊料上氧化物形成之技術。
在電子封裝工業中,可實施以一氣體混合物(例如一H2混合物)電漿清潔以便移除氧化物形成。
依據本發明,與用以減少焊料上金屬氧化物形成之習知技術相關之缺點及問題可減少或消除。
在某些實施例中,一種系統包括一沈積系統及一電漿/接合系統。該沈積系統由複數個基材之一基材向外沈積一焊料。該電漿/接合系統包含一組配成電漿清潔該基材之電漿系統及一組配成接合該等基材之接合系統。該電漿/接合系統至少減少該焊料之再氧化。
在某些實施例中,一種方法包含由一基材向外沈積焊料,由該基材移除金屬氧化物,及由該基材向外沈積一覆蓋層以便至少減少該焊料之再氧化。
本發明之某些實施例可提供一或多個技術優點。一實施例之一技術優點可為一電漿/接合系統可被用來至少減少(或甚至防止)金屬氧化物形成。該系統可在不暴露複數個晶圓於氧之情形下電漿清潔且接著接合該等晶圓,這可至少減少金屬氧化物形成。一實施例之一技術優點可為一覆蓋層可保護一晶圓不暴露於氧,這可減少金屬氧化物形成。
本發明之某些實施例可不包括上述技術優點,或可包括某些或全部上述技術優點。所屬技術領域中具有通常知識者可由圖式、說明及在此包括之申請專利範圍輕易地了解一或多個其他技術優點。
為了更完整了解本發明及其特徵及優點,配合添附圖式參照以下說明,其中:第1圖顯示可至少減少一基材上金屬氧化物再形成之一系統的一例;第2A至2C圖顯示可減少一基材上金屬氧化物再形成之一或多個室的複數個例子;第3圖顯示可減少一基材上金屬氧化物再形成之一方法的一例;第4圖顯示可減少一基材上金屬氧化物再形成之一室的一例;及第5圖顯示可減少一基材上金屬氧化物再形成之兩室的一例。
本發明之實施例及其優點係藉參照圖式之第1至4圖最佳地了解,相似符號被用於各圖之相似及對應部件。
第1圖顯示可至少減少一基材上金屬氧化物再形成之一系統10的一例。系統10可具有一或多個設計成減少再形成之室或可施加一減少再形成之覆蓋層。
某些焊料在空氣中氧化且形成一金屬氧化物(例如Sn氧化物)。氧化物之存在會造成防止一良好接合線形成之問題。例如,該等氧化物可產生複數個空隙形成或造成在該接合程序時該焊料之抗濕潤。這些問題會導致損失或可靠性問題。
可實施以一氣體混合物(例如一H2混合物)電漿清潔以便移除氧化物形成。但是,該經清潔部件一暴露於空氣,氧化物就會再形成。例如,對使用噴射焊料之晶圓級接合而言,在該焊料噴射後Sn被輕易地氧化,形成氧化錫。
在某些實施例中,系統10可在例如一晶圓之一基材上操作。一晶圓可為一例如矽晶之半導體材料的薄片。一晶圓可被用於製造積體電路及其他微裝置,且可作為用於複數個微電子裝置之基材,而該等微電子裝置係設置在該晶圓內且由該晶圓向外地設置。複數個基材可具有任何適當應用,例如微機電系統(MEMS)裝置或紅外線(IR)偵測器。例如,具有一基底金屬堆疊物(例如一Ti/Pt/Au金屬堆疊物)之一第一基材及具有微機電系統之一第二基材可利用焊料接合在一起。
在所示例子中,系統10包含一印刷系統20(具有一沈積系統26)及一電漿/接合系統24。沈積系統26由一或多個基材之至少一基材向外沈積一焊料。電漿/接合系統24包含一電漿系統及一接合系統。該電漿系統電漿清潔至少一基材,且該接合系統接合複數個基材。電漿/接合系統24至少減少在該焊料上金屬氧化物再形成(或該焊料之再氧化)。印刷系統20及電漿/接合系統24可分開成各自實施它自己之操作的複數個區域系統或可結合成實施兩系統之一或多個操作的一系統。
沈積系統26可將焊料沈積在一基材上。在某些實施例中,沈積系統26以任何適當方式由一基材向外沈積一焊料。例如,焊料可藉焊料噴射而被沈積。可使用一焊料預成形物,一特別設計形狀之焊料,作為另一例子。其他技術例子包括物理蒸氣沈積及電鍍。
焊料包含具有熔點在攝氏90至450度(190至840℉)之範圍內(例如180與190℃(360與370℉))的一可熔化金屬合金,且該可熔化金屬合金可熔化以便連結金屬表面。焊料可包含任何適當金屬之任何適當組合。金屬之例子包括錫、鉛、銅、銀、鉍、銦、鋅、銻、及其他金屬之線路。在某些例子中,焊料可包含一金-錫合金,例如Au80Sn20。
在某些實施例中,印刷系統20可先形成表示用以在一基材上施加焊料之複數個區域的一光阻圖案。沈積系統26可接著如該等區域所示地電漿清潔。
電漿/接合系統24電漿將複數個基材清潔且接合在一起。電漿/接合系統24可以任何適當方式電漿清潔。在某些實施例中,電漿清潔以一由氣體產生之高能電漿清潔複數個基材。可使用任何適當氣體,例如包含以下一或多個之一氣體:氫、氮、氬、氦、或空氣。該電漿可藉使用高頻電壓以便將該低壓氣體離子化而產生。在該電漿中,氣體原子被激發至更高之能量狀態且被離子化。該等電漿激化原子及離子的行為類似一分子噴砂且分解有機污染物。該等污染物被蒸發及移除。
電漿/接合系統24可以任何適當方式接合複數個基材。在某些實施例中,電漿/接合系統24可對準該等基材,該等基材之一或多個基材可具有焊料沈積於其上。電漿接合系統24可接著施加壓力至該等基材之一或多個基材以便將該等基材接合在一起。
電漿/接合系統24以任何適當之方式至少減少(及甚至可防止)一基材上金屬氧化物再形成。在某些實施例中,電漿/接合系統24可具有設計來減少該基材暴露於氧之一或多個室。一室可為一箱,且一或複數個氣體已由該箱中移除。例如,一室可為一真空室,該真空室具有一例如小於10或10到20帕斯卡(Pa)之低壓。一室可使用用以推出另一氣體之一氣體。例如,一氮室可使用氮氣以便將氧氣推出而產生一低濃度之氧,例如小於1每百萬份(ppm)。
一室可具有一或多個被複數個真空凸緣覆蓋之開口,以便讓器具或窗可被安裝在該室之壁中。該等室可以任何適當方式配置。電漿/接合系統24之例子係參照第2A至2C圖更詳細地說明。
第2A圖顯示包含一電漿/接合室30之電漿/接合系統24的一例。複數個焊料在電漿/接合室30中被電漿清潔及接合使得在金屬氧化物移除後及在接合前,該焊料不暴露於氧。例如,一電漿系統可與一接合系統整合在電漿/接合室30中。
第2B圖顯示顯示包含一電漿室34,一加載互鎖模組36,及一接合室38之電漿/接合系統24。一基材在電漿室34中被電漿清潔,且複數個基材在接合室38中接合。在某些實施例中,電漿室34與接合室38可透過加載互鎖模組36耦合,且加載互鎖模組36係組配成在一實質真空下耦合複數個室。在某些實施例中,電漿室34與接合室38可在一實質真空下在不需藉助加載互鎖模組36之情形下耦合。
第2C圖顯示包含一室40之電漿/接合系統24。電漿室34及接合室38係設置在室40內。在某些實施例中,室40可以是一氮室,且該氮室係組配成使用氮氣以便將氧氣推出該氮室。在某些實施例中,室40可以是一真空室,且該真空室內有一實質真空。
在某些實施例中,第1圖之電漿/接合系統24可使用一覆蓋層以便減少一基材上金屬氧化物再形成。系統10(例如,印刷系統20及/或電漿/接合系統24)可接著電漿清潔該基材且接著施加一阻止該基材氧化之覆蓋層。系統10可接著蝕刻及清潔該基材。這些實施例之一例子係參照第3圖更詳細地說明。
第3圖顯示可減少一基材上金屬氧化物再形成之一方法的一例。該方法在步驟210開始,其中可在該基材上實施光刻法以便在該基材上產生一圖案化金屬層。在步驟214,該基材可以光阻圖案化。該光阻圖案可表示應放置焊料之區域。例如,焊料可被放置在環繞一密封區域之複數個區域中。
在步驟218,焊料由該基材向下沈積。在步驟219,一金層由該基材向外沈積。該焊料可藉沈積系統26沈積在由該光阻圖案表示之區域中。在步驟220,該金屬氧化物由該基材移除。該金屬氧化物可以任何適當方式,例如,藉電漿清潔或濺鍍蝕刻來移除。例如,該焊料之表面可藉高能離子轟擊以便由該焊料移除所有或實質所有氧化物。
在步驟224,一覆蓋層係由該基材向外施加。該覆蓋層可包含一阻止氧化之覆蓋材料,例如金。在移除該金屬氧化物後隨即及在該基材暴露於氧之前施加該覆蓋層可防止金屬氧化物再形成。
該覆蓋層可以任何方式施加。例如,可使用物理蒸氣沈積(PVD)以便藉冷凝一蒸發形態之覆蓋材料而沈積。物理蒸氣沈積使用物理方法,例如電漿濺鍍轟擊或高溫真空蒸發,以便沈積材料。在濺鍍沈積中,覆蓋層由一來源被濺鍍,或被噴射且由該基材向外沈積。在蒸發沈積中,覆蓋層在一真空中被蒸發,這使該等蒸氣粒子可直接移動至該基材上。該等蒸氣粒子接著被冷凝且由該基材向外沈積。在施加該覆蓋層後,該覆蓋層可保護該基材不受氧化且該基材可暴露於大氣中。在最後焊接製程中,該覆蓋層可在該接合線加入該焊料中。在某些實施例中,可調整該焊料之組成以便補償由該金層添加至該焊料之金。
在步驟226,光阻及多餘金被移除。在步驟228,以O2清潔該表面。在步驟230,該基材與另一基材對準。在步驟234,接合該等基材。接著該方法結束。
第4圖顯示可減少一基材上金屬氧化物再形成之一電漿/接合系統50之一電漿/接合室30的一例。在該例中,電漿/接合系統50包含具有用於電漿氣體之一氣體輸入60的一電漿/接合室30,用於產生電漿之複數個電極62,在室30中產生一真空之一真空泵64,支撐複數個晶圓之一支架66,及接合複數個晶圓之一接合板68。
第5圖顯示可減少一基材上金屬氧化物再形成之一電漿/接合系統52之兩室34與38之一例。在該例中,電漿/接合系統52包含一電漿室34,一加載互鎖模組36,及一接合室38。電漿室34具有用於電漿氣體之氣體輸入60,用以產生電漿之複數個電極62,及支持複數個晶圓之支架66。加載互鎖模組36包含一閥。接合室38具有接合複數個晶圓之複數個接合板68及在該等室34與38中產生一真空之真空泵64。真空泵64可被放置在系統52之任何適當位置,例如在電漿室34或加載互鎖模組36。
在不偏離本發明之範疇的情形下,可對在此揭露之系統及裝置進行修改,添加,或省略。該等系統及裝置之組件可以整合或分開。此外,該等系統及裝置之操作可藉更多、更少、或其他組件來實施。此外,該等系統及裝置之操作可使用包含軟體,硬體,及/或其他邏輯系統之任何邏輯系統來實施。如在這文件中所使用之“各”表示一組之各構件或一組之一支組之各元件。
在不偏離本發明之範疇的情形下,可對在此揭露之方法進行修改,添加,或省略。該等方法可包括更多、更少、或其他步驟。此外,複數個步驟可以任何適當順序實施。
在此揭露之系統及裝置之一組件可包括一介面,邏輯系統,記憶體,及/或其他適當元件。一介面接收輸入、發送輸出,處理該輸入及/或輸出,及/或實施其他適當操作。一介面可包含硬體及/或軟體。
邏輯系統實施該組件之操作,例如,執行指令以便由輸入產生輸出。邏輯系統可包括硬體,軟體,及/或其他邏輯系統。邏輯可以在一或多個有形媒體中被編碼且可在由一電腦執行時實施複數個操作。某些邏輯系統,例如一處理器,可管理一組件之操作。一處理器之複數個例子包括一或多個電腦,一或多個微處理器,一或多個應用程式,及/或其他邏輯系統。
在特殊實施例中,該等實施例之操作可藉一或多個電腦可讀取媒體來實施,且該一或多個電腦可讀取媒體係以一電腦程式,軟體,電腦可執行之指令,及/或可藉一電腦執行之指令來編碼。在複數個特殊實施例中,該等實施例之操作可藉一或多個電腦可讀取媒體來實施,且該一或多個電腦可讀取媒體係以一電腦程式儲存、實施及/或編碼,及/或具有一儲存及/或一編碼之電腦程式。
一記憶體儲存資訊。一記憶體可包含一或多個非暫時的,有形的,電腦可讀取的,及/或電腦可執行的儲存媒體。記憶體之複數個例子包括電腦記憶體(例如,隨機存取記憶體(RAM)或唯讀記憶體(ROM)),大量儲存媒體(例如,一硬碟),可分離儲存媒體(例如,一光碟(CD)或一數位視訊光碟(DVD)),資料庫及/或網路儲存器(例如,一伺服器),及/或其他電腦可讀取媒體。
雖然本發明已藉某些實施例說明過了,但是所屬技術領域中具有通常知識者將可了解該等實施例之複數個改變及複數個置換。因此,該等實施例之上述說明不限制本發明。在不偏離如以下申請專利範圍所界定之本發明之精神及範疇的情形下,可有其他變化、取代、及改變。
10...系統
20...印刷系統
24...電漿/接合系統
26...沈積系統
30...電漿/接合室
34...電漿室
36...加載互鎖模組
38...接合室
40...室
50...電漿/接合系統
52...電漿/接合系統
60...氣體輸入
62...電極
64...真空泵
66...支架
68...接合板
210,214,218,219,220,224,226,228,230,234...步驟
第1圖顯示可至少減少一基材上金屬氧化物再形成之一系統的一例;
第2A至2C圖顯示可減少一基材上金屬氧化物再形成之一或多個室的複數個例子;
第3圖顯示可減少一基材上金屬氧化物再形成之一方法的一例;
第4圖顯示可減少一基材上金屬氧化物再形成之一室的一例;及
第5圖顯示可減少一基材上金屬氧化物再形成之兩室的一例。
10...系統
20...印刷系統
24...電漿/接合系統
26...沈積系統
Claims (39)
- 一種用於減少焊料上金屬氧化物形成之系統,包含:一第一室,該第一室係在真空下且組配成接收一加工用之第一基材,該第一室在其中容納:一印刷系統,其設置於該第一室內,該印刷系統組配成在該第一基材上沉積一圖案或形狀以指示焊料欲在何處被放置;及一沈積系統,其組配成由該基材向外沈積焊料至該圖案或形狀;及一電漿/接合室,其與該第一室呈可操作的交流,該電漿/接合室包含數個界定一內部空間的壁,該內部空間係實質地由該電漿/接合室的一外部環境封閉,其中該內部空間係建構且配置用於接收一第二基材以及用於接收欲被電漿清潔、覆蓋及接合至該第二基材的該第一基材;一電漿清潔系統,其設置且運作於該電漿/接合室的該內部空間內,該電漿清潔系統與一覆蓋系統及一接合系統呈可操作的交流,其係各自設置於且可操作於該電漿/接合室內,該電漿清潔系統包含一用於接收至少一電漿氣體的氣體輸入、至少一用於電漿產生的電極、以及一在該電漿/接合室中產生真空的真空泵,其中當該電漿清潔系統及該接合系統二者係可操作地耦合至且設置於該電漿/接合室的內部空間內時,該電漿清潔系統係組配成電漿清潔該第一基材,其中該電漿清潔系統係建構且配置用於接收該第一基材以利當該 第一基材被接收至該電漿接合室中時該第一基材在真空下的第一次電漿清潔,以及在該第一基材已具有一覆蓋層被施加至其之後用於接收該第一基材以利第二次清潔;一覆蓋層沉積系統,其設置且運作於該電漿/接合室的該內部空間內,該覆蓋層沉積系統與該電漿清潔系統呈可操作的交流且被建構及配置以在該第一基材已藉由該電漿清潔系統被加工之後沉積一抗氧化之物質的覆蓋層至該第一基材;及一接合系統,其設置且運作於該電漿/接合室的該內部空間內,其中該電漿清潔系統運作於同一個內部空間內,該接合系統係與該覆蓋層沉積系統呈可操作的交流且包含一支架以支撐至少一欲被接合之第一基材以及至少一可操作以接合該第一基材至該第二基材的接合板,其中在該第一基材已被覆蓋及第二次電漿清潔之後該接合系統係組配成接收該第一基材,以及當該第一及第二基材係設置在與該電漿系統同一個內部空間內,在該第一基材已被對準至該第二基材之後在真空條件下接合該第一基材至該第二基材。
- 如申請專利範圍第1項之系統,其中該真空泵係設置於該電漿/接合室之該數個壁的至少一者內,以致與該電漿/接合室的該內部空間呈可操作的交流,該真空泵組配成降低在該電漿/接合室的該內部空間內氧的濃度,在該電漿系統及該接合系統之至少一者的運作期間。
- 一種用於減少焊料上金屬氧化物形成之系統,包含:一電漿/接合室,其用於接收一欲被電漿清潔之第一基材,該第一基材包含形成於其中之一部分的焊料,以及用於接收一欲被接合至該第一基材的第二基材,該電漿/接合室具有數個界定一內部空間的壁,其中該電漿/接合室的該內部空間係實質地由該電漿/接合室的一外部環境封閉;一電漿清潔系統,其可操作地耦合至及設置於該電漿/接合室的該內部空間內,該電漿清潔系統包含一用於接收至少一電漿氣體的氣體輸入、至少一用於電漿產生的電極、以及一在該電漿/接合室中產生真空的真空泵,其中該電漿清潔系統係組配成電漿清潔該第一基材,以致至少從焊料的一部分移除金屬氧化物;一覆蓋層沉積系統,其設置且運作於該電漿/接合室的該內部空間內,該覆蓋層沉積系統與該電漿清潔系統呈可操作的交流且組配成在電漿清潔完成之後從該電漿清潔系統接收該第一基材、由該第一基材向外沉積一覆蓋層,以及當覆蓋完成時提供該第一基材至該接合系統,其中該覆蓋層沉積系統係在該電漿/接合室內組配以確保該覆蓋層係在該第一基材暴露於氧之前以及該基材的任何接合之前被施加;及一接合系統,其設置且運作於該電漿/接合室的該內部空間內,其中該電漿清潔系統及覆蓋層沉積系統運作於同一個內部空間內,該接合系統與該覆蓋層沉積系 統呈可操作的交流且包含一支架以支撐至少一欲被接合之第一基材以及至少一可操作以接合該第一基材至該第二基材的接合板;其中在該第一基材已被覆蓋且電漿清潔之後,該接合系統係組配成接收該第一基材,以及,當該第一及第二基材係設置在與該電漿系統同一個內部空間內,該接合系統係組配成在真空條件下接合該第一基材至該第二基材。
- 如申請專利範圍第3項之系統,其中在該覆蓋層的施加之後,該系統係組配成允許該第一基材能暴露於大氣中。
- 如申請專利範圍第3項之系統,其中該覆蓋沉積系統包含物理氣相沉積(PVD)、濺鍍沉積及蒸發沉積的至少一者。
- 如申請專利範圍第3項之系統,其中該覆蓋層包含一抗氧化的物質。
- 如申請專利範圍第3項之系統,進一步包含一與該電漿/接合室呈可操作的交流之沉積系統,該沉積系統組配成由該第一基材向外沉積焊料的第一部份。
- 如申請專利範圍第1項之系統,其中在該覆蓋層的施加之後以及在該接合系統接合該第一基材至該第二基材之前,該系統係組配成允許該第一基材能曝露於大氣中。
- 如申請專利範圍第3項之系統,其中該接合系統係組配成在一接合線將該覆蓋層併入焊料的至少一第二部分。
- 如申請專利範圍第3項之系統,其中該接合系統係組配成用於基材的晶圓-等級接合。
- 如申請專利範圍第1項之系統,其中該氣體輸入係可操作地耦合至且設置於該電漿/接合室之數個壁的第一個壁內,其中該氣體輸入係組配成從該電漿/接合室的外部供給電漿氣體至該電漿/接合室的該內部空間;且進一步包含:數個電極,其可操作地耦合至該電漿/接合室的該內部空間且組配成產生電漿。
- 如申請專利範圍第1項之系統,其中該電漿清潔系統與該接合系統在該電漿/接合室的該內部空間中的配置係組配成降低在該第一基材上的焊料暴露於氧。
- 如申請專利範圍第1項之系統,其中該泵係組配成降低在該內部區域內的壓力至小於20帕斯卡(Pa)。
- 如申請專利範圍第1項之系統,其中該泵係組配成推進一能夠將足夠的氧氣推出的非-氧氣體,以降低在該內部空間內氧的濃度至1每百萬份(ppm)或更少。
- 如申請專利範圍第1項之系統,其中該印刷系統係進一步組配成以圖案或形狀的方式沉積一光阻的層至該基材之上。
- 如申請專利範圍第1項之系統,其中該電漿清潔系統、覆蓋層沉積系統及接合系統係設置於該電漿/接合室的該內部空間的一未分割部分內,其中該第一基材保持在該電漿/接合室的該內部空間的該未分割部分內至少從 該第一基材第一次電漿清潔直到該第一基材至該第二基材之接合完成。
- 如申請專利範圍第1項之系統,其中該接合系統係建構及配置以施加壓力至該第一及第二基材之至少一者以將該第一及第二基材接合一起。
- 如申請專利範圍第3項之系統,進一步包含一與該電漿/接合室呈可操作的交流之第一室,該第一室係在真空下且組配成在該第一基材藉由該第二基材被加工之前接收該加工用之第一基材,該第一室包含:一印刷系統,其設置於該第一室內,該印刷系統組配成在該第一基材上沉積一圖案或形狀以指示焊料欲在何處被放置;及一沉積系統,其組配成由該基材向外沉積焊料的一部份至該圖案或形狀。
- 如申請專利範圍第3項之系統,其中該接合系統係建構及配置以施加壓力至該第一及第二基材之至少一者以將該第一及第二基材接合一起。
- 如申請專利範圍第3項之系統,其中該電漿/接合室係建構及配置以維持該第一基材在該電漿/接合室內,在真空條件下,至少從該第一基材被電漿清潔至該第一基材至該第二基材之接合完成。
- 一種用於減少焊料上金屬氧化物形成之方法,包含:接收一第一基材至一第一室中,該第一室具有一實質地由該第一室的一外部環境封閉的內部空間,其中該 第一基材包含形成於其中之一部份的焊料;及當該第一基材係設置於該第一室內時,進行下列所有動作;在實質真空的條件下第一次電漿清潔該第一基材;在該第一基材已被第一次電漿清潔之後,沉積一物質的覆蓋層至該第一基材;在該第一基材已具有一覆蓋層沉積至其之後,在實質真空的條件下第二次電漿清潔該第一基材;及接合該第一基材至一被接收至該第一室內之第二基材,該接合在實質真空的條件下發生,其中該接合在該第一基材已被第一次及第二次電漿清潔以及已具有該覆蓋層沉積至其之後發生。
- 如申請專利範圍第21項之方法,進一步包含:在將該第一及第二基材接合一起之前,對準該第一基材至該第二基材。
- 如申請專利範圍第21項之方法,進一步包含在該覆蓋層的施加至該第一基材之後以及在接合該第一基材至該第二基材之前,暴露該第一基材於該第一室的外部大氣中。
- 如申請專利範圍第23項之方法,其中該第一室的該外部大氣包含氧氣。
- 如申請專利範圍第21項之方法,其中該覆蓋層包含一抗氧化的物質。
- 如申請專利範圍第21項之方法,其中該覆蓋層包含金。
- 如申請專利範圍第21項之方法,其中沉積一覆蓋層包含使用物理氣相沉積(PVD)、濺鍍沉積及蒸發沉積的至少一者,以施加該覆蓋層至該第一基材。
- 如申請專利範圍第21項之方法,進一步包含:在第一次電漿清潔該第一基材之前,印刷一圖案或形狀至該第一基材,該圖案或形狀指示焊料欲在何處被放置。
- 如申請專利範圍第21項之方法,進一步包含:在第一次電漿清潔該第一基材之前,沉積焊料至形成於該第一基材上的圖案或形狀,該焊料係由該第一基材向外被沉積。
- 如申請專利範圍第21項之方法,進一步包含在第一次電漿清潔該第一基材之前,沉積一光阻的層至該第一基材上。
- 如申請專利範圍第21項之方法,進一步包含:在真空下接收該第一基材至一第二室中,該第二室與該第一室呈可操作的交流,其中在該第一基材被接受至該第一室中之前,該第一基材被接收至該第二室中;及當該第一基材係在真空下設置於該第二室內,印刷一圖案或形狀至該第一基材,該圖案或形狀指示焊料欲在何處被放置。
- 如申請專利範圍第31項之方法,進一步包含:當該第一基材係在真空下設置於該第二室內,沉積 焊料至該圖案或形狀。
- 如申請專利範圍第31項之方法,進一步包含當該第一基材係在真空下設置於該第二室內,沉積一光阻的層至該第一基材上。
- 如申請專利範圍第21項之方法,進一步包含:在一接合線將該覆蓋層併入焊料的至少一第二部分中。
- 如申請專利範圍第21項之方法,其中該第一及第二電漿清潔、沉積一覆蓋層以及該第一基材的接合至該第二基材係組配成在設置於該第一室內之空間的一未分割部分內發生,該空間之未分割部分係在真空下。
- 如申請專利範圍第21項之方法,其中:該第一及第二電漿清潔以及沉積一覆蓋層係組配成在設置於該第一室內之空間的一第一未分割部分內發生,其中該空間之第一未分割部分係在實質真空下;及該第一基材至該第二基材的接合係組配成在設置於該第一室內之空間的一第二未分割部分內發生,該空間之第二未分割部分係在真空下且係與該空間之第一未分割部分呈可操作的交流。
- 一種用於減少焊料上金屬氧化物形成之方法,包含:印刷一圖案或形狀至一第一基材上,該圖案或形狀指示焊料欲在何處被放置;沈積焊料至該形成於該第一基材上的圖案或形 狀,該焊料係由該第一基材向外被設置;接收該第一基材至一第一室中,該第一室具有一實質地由該第一室的一外部環境封閉的內部空間,其中該第一基材包含形成於其中之一部份的焊料;當該第一基材係設置於該第一室內,進行下列所有動作;在實質真空條件下第一次電漿清潔該第一基材;在該第一基材已被第一次電漿清潔之後,沈積一物質的覆蓋層至該第一基材;在該第一基材已具有一覆蓋層沉積至其之後,在實質真空條件下第二次電漿清潔該第一基材;接合該第一基材至一被接收至該第一室內之第二基材,該接合在實質真空條件下發生,其中該接合在該第一基材已被第一次及第二次電漿清潔以及已具有該覆蓋層沉積至其之後發生。
- 如申請專利範圍第37項之方法,其中該印刷一圖案以及該沉積該焊料之至少一者係在實質真空下進行。
- 一種用於減少焊料上金屬氧化物形成之方法,包含:在真空下接收一第一基材至一第一室中;當該第一基材係在真空下設置於該第一室內時,印刷一圖案或形狀至該第一基材上,該圖案或形狀指示焊料欲在何處被放置;沉積焊料至該形成於該第一基材上的圖案或形狀,該焊料係由該第一基材向外被沉積且當該第一基材 係在真空下設置於該第一室內被沉積;接收該第一基材至一與該第一室呈可操作的交流之第二室中,該第二室具有一實質地由該第二室的一外部環境封閉的內部空間;及當該第一基材係設置於該第二室內,進行下列所有動作:在實質真空條件下第一次電漿清潔該第一基材;在該第一基材已被第一次電漿清潔之後,沉積一物質的覆蓋層至該第一基材;在該第一基材已具有一覆蓋層沉積至其之後,在實質真空條件下第二次電漿清潔該第一基材;及接合該第一基材至一被接收至該第二室內之第二基材,該接合在實質真空條件下發生,其中該接合在該第一基材已被第一次及第二次電漿清潔以及已具有該覆蓋層沉積至其之後發生。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US41045410P | 2010-11-05 | 2010-11-05 | |
US13/231,749 US8844793B2 (en) | 2010-11-05 | 2011-09-13 | Reducing formation of oxide on solder |
Publications (2)
Publication Number | Publication Date |
---|---|
TW201227843A TW201227843A (en) | 2012-07-01 |
TWI541909B true TWI541909B (zh) | 2016-07-11 |
Family
ID=45855145
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW100135872A TWI541909B (zh) | 2010-11-05 | 2011-10-04 | 減少焊料上氧化物形成之技術 |
Country Status (6)
Country | Link |
---|---|
US (2) | US8844793B2 (zh) |
JP (1) | JP6157799B2 (zh) |
DE (1) | DE102011116233B4 (zh) |
FR (1) | FR2967297B1 (zh) |
IL (1) | IL215681A (zh) |
TW (1) | TWI541909B (zh) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5442394B2 (ja) * | 2009-10-29 | 2014-03-12 | ソニー株式会社 | 固体撮像装置とその製造方法、及び電子機器 |
US8844793B2 (en) | 2010-11-05 | 2014-09-30 | Raytheon Company | Reducing formation of oxide on solder |
JP2013074093A (ja) * | 2011-09-28 | 2013-04-22 | Renesas Electronics Corp | リフロー前処理装置およびリフロー前処理方法 |
AT517742A5 (de) * | 2012-05-30 | 2017-04-15 | Ev Group E Thallner Gmbh | Vorrichtung und Verfahren zum Bonden von Substraten |
WO2014115702A1 (ja) * | 2013-01-24 | 2014-07-31 | 株式会社日立国際電気 | 半導体装置の製造方法、基板処理装置および記録媒体 |
CN104425289B (zh) * | 2013-09-11 | 2017-12-15 | 先进科技新加坡有限公司 | 利用激发的混合气体的晶粒安装装置和方法 |
WO2015043624A1 (de) * | 2013-09-25 | 2015-04-02 | Ev Group E. Thallner Gmbh | Vorrichtung und verfahren zum bonden von substraten |
US9570321B1 (en) | 2015-10-20 | 2017-02-14 | Raytheon Company | Use of an external getter to reduce package pressure |
JP6673268B2 (ja) * | 2017-03-14 | 2020-03-25 | オムロン株式会社 | 管理装置、管理装置の制御方法、情報処理プログラム、および記録媒体 |
JP6538894B2 (ja) * | 2018-01-10 | 2019-07-03 | エーファウ・グループ・エー・タルナー・ゲーエムベーハー | 基板同士をボンディングする方法 |
Family Cites Families (55)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
SU1177097A1 (ru) * | 1982-12-24 | 1985-09-07 | Inst Elektroniki An Bssr | "cпocoб пaйkи иhteгpaльhыx mиkpocxem" |
JPS63293952A (ja) | 1987-05-27 | 1988-11-30 | Hitachi Ltd | 半導体素子接続端子形成方法 |
JPH02253626A (ja) * | 1989-03-27 | 1990-10-12 | Shimadzu Corp | 半導体チップの実装方法 |
DE4032328A1 (de) * | 1989-11-06 | 1991-09-19 | Wls Karl Heinz Grasmann Weichl | Verfahren und vorrichtung zur verarbeitung von zu verloetenden fuegepartnern |
DE4041270A1 (de) * | 1990-12-21 | 1992-06-25 | Grasmann Karl Heinz Wls | Verfahren und vorrichtung zur verarbeitung von elektronischen flachbaugruppen, insbesondere mit bauelementen bestueckten leiterplatten |
JP2827558B2 (ja) * | 1991-04-09 | 1998-11-25 | 松下電器産業株式会社 | ワイヤボンディング装置およびワイヤボンディング方法 |
US5223691A (en) * | 1991-06-03 | 1993-06-29 | Motorola, Inc. | Plasma based soldering method requiring no additional heat sources or flux |
DE4225378A1 (de) * | 1992-03-20 | 1993-09-23 | Linde Ag | Verfahren zum verloeten von leiterplatten unter niederdruck |
JP3206142B2 (ja) * | 1992-10-15 | 2001-09-04 | 松下電器産業株式会社 | ワイヤボンディング装置及びワイヤボンディング方法 |
US5403459A (en) * | 1993-05-17 | 1995-04-04 | Applied Materials, Inc. | Cleaning of a PVD chamber containing a collimator |
JP3189828B2 (ja) * | 1995-11-24 | 2001-07-16 | 松下電器産業株式会社 | 回路モジュールの製造方法 |
JP3201302B2 (ja) * | 1997-02-10 | 2001-08-20 | 松下電器産業株式会社 | 基板のプラズマクリーニング装置 |
US5843239A (en) * | 1997-03-03 | 1998-12-01 | Applied Materials, Inc. | Two-step process for cleaning a substrate processing chamber |
JPH11163036A (ja) | 1997-09-17 | 1999-06-18 | Tamura Seisakusho Co Ltd | バンプ形成方法、はんだ接合用前処理方法、はんだ接合方法、バンプ形成装置、はんだ接合用前処理装置およびはんだ接合装置 |
US20060258176A1 (en) * | 1998-02-05 | 2006-11-16 | Asm Japan K.K. | Method for forming insulation film |
US6230719B1 (en) * | 1998-02-27 | 2001-05-15 | Micron Technology, Inc. | Apparatus for removing contaminants on electronic devices |
US6742701B2 (en) | 1998-09-17 | 2004-06-01 | Kabushiki Kaisha Tamura Seisakusho | Bump forming method, presoldering treatment method, soldering method, bump forming apparatus, presoldering treatment device and soldering apparatus |
JP3400408B2 (ja) | 2000-04-25 | 2003-04-28 | 株式会社タムラ製作所 | フリップチップ実装方法 |
US20020011205A1 (en) * | 2000-05-02 | 2002-01-31 | Shunpei Yamazaki | Film-forming apparatus, method of cleaning the same, and method of manufacturing a light-emitting device |
JP3922870B2 (ja) | 2000-08-04 | 2007-05-30 | 東レエンジニアリング株式会社 | 実装方法 |
JP4016598B2 (ja) * | 2001-01-16 | 2007-12-05 | 株式会社日立製作所 | 半導体装置の製造方法 |
JP4027072B2 (ja) * | 2001-10-18 | 2007-12-26 | 松下電器産業株式会社 | 減圧プラズマ処理装置及びその方法 |
US6756560B2 (en) * | 2001-11-19 | 2004-06-29 | Geomat Insights, L.L.C. | Plasma enhanced circuit component attach method and device |
US6935553B2 (en) | 2002-04-16 | 2005-08-30 | Senju Metal Industry Co., Ltd. | Reflow soldering method |
JP4233802B2 (ja) * | 2002-04-26 | 2009-03-04 | 東レエンジニアリング株式会社 | 実装方法および実装装置 |
JP2003318220A (ja) | 2002-04-26 | 2003-11-07 | Toray Eng Co Ltd | 実装方法および実装装置 |
JP2004119430A (ja) * | 2002-09-24 | 2004-04-15 | Tadatomo Suga | 接合装置および方法 |
KR100521081B1 (ko) | 2002-10-12 | 2005-10-14 | 삼성전자주식회사 | 플립 칩의 제조 및 실장 방법 |
US7387738B2 (en) | 2003-04-28 | 2008-06-17 | Air Products And Chemicals, Inc. | Removal of surface oxides by electron attachment for wafer bumping applications |
JP3980539B2 (ja) * | 2003-08-29 | 2007-09-26 | 唯知 須賀 | 基板接合方法、照射方法、および基板接合装置 |
US7645681B2 (en) * | 2003-12-02 | 2010-01-12 | Bondtech, Inc. | Bonding method, device produced by this method, and bonding device |
JP4919604B2 (ja) * | 2004-02-16 | 2012-04-18 | ボンドテック株式会社 | 接合方法及び接合装置 |
US7611322B2 (en) * | 2004-11-18 | 2009-11-03 | Intevac, Inc. | Processing thin wafers |
JP2006222381A (ja) | 2005-02-14 | 2006-08-24 | Olympus Corp | 電子部品の実装方法及びその製造装置 |
JP4577130B2 (ja) | 2005-07-15 | 2010-11-10 | ソニー株式会社 | 半導体装置の製造方法 |
JP4742844B2 (ja) | 2005-12-15 | 2011-08-10 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
JP4671900B2 (ja) * | 2006-04-06 | 2011-04-20 | パナソニック株式会社 | 接合方法および接合装置 |
JP2006279062A (ja) | 2006-05-25 | 2006-10-12 | Nec Corp | 半導体素子および半導体装置 |
JP4783222B2 (ja) * | 2006-06-28 | 2011-09-28 | 株式会社ケミトロニクス | 接合装置 |
FR2911003B1 (fr) * | 2006-12-28 | 2009-10-02 | Cnes Epic | Procede et installation de mise a nu de la surface d'un circuit integre |
KR100936778B1 (ko) * | 2007-06-01 | 2010-01-14 | 주식회사 엘트린 | 웨이퍼 본딩방법 |
US20120132522A1 (en) * | 2007-07-19 | 2012-05-31 | Innovative Micro Technology | Deposition/bonding chamber for encapsulated microdevices and method of use |
CN101779273B (zh) | 2007-07-24 | 2012-10-10 | 住友化学株式会社 | 半导体器件,半导体器件制造方法,高载流子迁移率晶体管和发光器件 |
JP2009094115A (ja) * | 2007-10-04 | 2009-04-30 | Hitachi Kokusai Electric Inc | 半導体装置の製造方法 |
JP5181158B2 (ja) | 2007-10-24 | 2013-04-10 | ボンドテック株式会社 | 接合方法およびこの方法により作成されるデバイス並びに接合装置 |
JP4369507B2 (ja) * | 2007-12-07 | 2009-11-25 | 株式会社新川 | ボンディング装置及びボンディング方法 |
JP5297048B2 (ja) * | 2008-01-28 | 2013-09-25 | 三菱重工業株式会社 | プラズマ処理方法及びプラズマ処理装置 |
US8048723B2 (en) | 2008-12-05 | 2011-11-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Germanium FinFETs having dielectric punch-through stoppers |
US8622261B2 (en) * | 2008-08-14 | 2014-01-07 | Hitachi Metals, Ltd. | Molten metal supply cylinder, molten metal supply apparatus incorporating such a supply cylinder and molten metal supply method |
FR2961630B1 (fr) * | 2010-06-22 | 2013-03-29 | Soitec Silicon On Insulator Technologies | Appareil de fabrication de dispositifs semi-conducteurs |
JP2012009597A (ja) | 2010-06-24 | 2012-01-12 | Elpida Memory Inc | 半導体デバイスの製造方法および半導体デバイスの製造装置 |
US8844793B2 (en) | 2010-11-05 | 2014-09-30 | Raytheon Company | Reducing formation of oxide on solder |
CA2719927C (en) * | 2010-11-05 | 2014-04-29 | Ibm Canada Limited - Ibm Canada Limitee | Laser ashing of polyimide for semiconductor manufacturing |
US20120237693A1 (en) * | 2011-03-17 | 2012-09-20 | Applied Materials, Inc. | In-situ clean process for metal deposition chambers |
KR20140023807A (ko) * | 2012-08-17 | 2014-02-27 | 삼성전자주식회사 | 반도체 소자를 제조하는 설비 |
-
2011
- 2011-09-13 US US13/231,749 patent/US8844793B2/en active Active
- 2011-10-04 TW TW100135872A patent/TWI541909B/zh active
- 2011-10-10 IL IL215681A patent/IL215681A/en active IP Right Grant
- 2011-10-17 DE DE102011116233.3A patent/DE102011116233B4/de active Active
- 2011-10-31 JP JP2011238431A patent/JP6157799B2/ja active Active
- 2011-11-04 FR FR1159998A patent/FR2967297B1/fr active Active
-
2014
- 2014-08-26 US US14/468,660 patent/US9132496B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
IL215681A0 (en) | 2012-02-29 |
TW201227843A (en) | 2012-07-01 |
US20150076216A1 (en) | 2015-03-19 |
US8844793B2 (en) | 2014-09-30 |
DE102011116233A1 (de) | 2012-05-10 |
DE102011116233B4 (de) | 2022-12-08 |
JP2012104817A (ja) | 2012-05-31 |
JP6157799B2 (ja) | 2017-07-05 |
IL215681A (en) | 2016-07-31 |
FR2967297A1 (fr) | 2012-05-11 |
US20120111925A1 (en) | 2012-05-10 |
US9132496B2 (en) | 2015-09-15 |
FR2967297B1 (fr) | 2018-02-02 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI541909B (zh) | 減少焊料上氧化物形成之技術 | |
JP5431343B2 (ja) | ゲッタ層と調整サブ層とを備える構造および製造方法 | |
WO2018180655A1 (ja) | ドライエッチング方法、半導体素子の製造方法及びチャンバークリーニング方法 | |
JP2008078678A (ja) | プラズマ処理方法 | |
TWI446448B (zh) | 積體電路結構之製造方法 | |
JP6041709B2 (ja) | 金属層をエッチングする方法 | |
JP2006086500A (ja) | 半導体装置の製造方法 | |
TWI575598B (zh) | 晶圓製程期間以惰性氫氦混合物進行的原位腔室清潔 | |
TWI424137B (zh) | Vacuum pumping method | |
CN1607651A (zh) | 工艺腔的清洗方法 | |
JP4833088B2 (ja) | 高温リフロースパッタリング装置 | |
JP2008112854A (ja) | 半導体装置の製造方法 | |
US10675841B2 (en) | Thin diamond film bonding providing low vapor pressure at high temperature | |
JP6708824B2 (ja) | 半導体構造のプレクリーニング | |
JP4228424B2 (ja) | 半導体装置の製造方法 | |
JP4833014B2 (ja) | 高温リフロースパッタリング装置 | |
JP3125121B2 (ja) | 枚葉式ホットウォール処理装置のクリーニング方法 | |
JP2008240078A (ja) | 成膜処理装置のクリーニング方法 | |
JP2004288878A5 (zh) | ||
JP2009049131A (ja) | はんだバンプの形成方法 | |
KR100802307B1 (ko) | 금속막 식각 방법 | |
TWI462162B (zh) | 沈積含碳膜之裝置的清潔方法 | |
JP2923217B2 (ja) | 試料処理方法 | |
JP2004266066A (ja) | Cvd装置、半導体装置及びその製造方法 | |
JP2008182001A (ja) | 半導体装置の製造方法 |