TWI525818B - Semiconductor device and method for manufacturing semiconductor device - Google Patents

Semiconductor device and method for manufacturing semiconductor device Download PDF

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TWI525818B
TWI525818B TW100141658A TW100141658A TWI525818B TW I525818 B TWI525818 B TW I525818B TW 100141658 A TW100141658 A TW 100141658A TW 100141658 A TW100141658 A TW 100141658A TW I525818 B TWI525818 B TW I525818B
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oxide semiconductor
semiconductor film
crystal
film
oxide
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TW100141658A
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Chinese (zh)
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TW201236155A (en
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山崎舜平
高橋正弘
丸山哲紀
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半導體能源研究所股份有限公司
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Description

Semiconductor device and method of manufacturing the same [Related application]

This application is based on the Japanese Patent Application No. 2010-267901 filed on Sep. 30, 2010, and the Japanese Patent Application Serial No. 2010-267896, filed on November 30, 2010. By reference, this is here.

The present invention relates to a semiconductor device including a circuit including a semiconductor element such as a transistor, and a method of fabricating the same. For example, the present invention relates to a power device mounted on a power supply circuit; a semiconductor integrated circuit including a memory, a thyristor, a converter, an image sensor, or the like; and a typical liquid crystal display panel including illumination A light-emitting display device of the element or an optoelectronic device such as the above is mounted on the upper electronic device.

In this specification, a semiconductor device means all types of devices that can function by utilizing semiconductor characteristics, and the photovoltaic device, the light-emitting display device, the semiconductor circuit, and the electronic device are all semiconductor devices.

Amorphous germanium, polycrystalline germanium, or the like is used to fabricate a crystal formed on a glass substrate or the like, which is common in liquid crystal display devices. Although a crystal comprising an amorphous germanium has a low field effect mobility, it can be formed over a larger glass substrate. On the other hand, although a transistor including polycrystalline germanium has high field-effect mobility, it is not suitable to be formed over a large glass substrate.

Compared to a transistor including germanium, there has been a notice of a technique whereby an oxide semiconductor is used to fabricate a transistor, and is applied to an electronic device or an optical device. For example, Patent Document 1 and Patent Document 2 disclose a technique of manufacturing a transistor using an oxide based on zinc oxide or In-Ga-Zn-O as an oxide semiconductor, and using it as a pixel of a display device or the like. Switching components.

[reference] [Patent Literature]

[Patent Document 1] Japanese Laid-Open Patent Application No. 2007-123861

[Patent Document 2] Japanese Laid-Open Patent Application No. 2007-96055

The electrical characteristics of the transistor are easily affected by the interface conditions between the oxide semiconductor film serving as the active layer and the gate insulating film contacting the oxide semiconductor film. During or after the manufacture of the transistor, if the gate insulating film contacts the interface of the oxide semiconductor film, that is, the gate electrode side interface of the oxide semiconductor film is in an amorphous state, the structural conditions are easily accepted in the process. The temperature or the like changes, and the electrical characteristics of the transistor are likely to be unstable.

Further, the electrical characteristics of the transistor in which the oxide semiconductor film is used as a channel can be changed by irradiation with visible light or ultraviolet light.

In view of such a problem, an object of an embodiment of the present invention is to provide a semiconductor device including a transistor in which an interface condition between an oxide semiconductor film and a gate insulating film contacting the oxide semiconductor film is suitable and provided A method of manufacturing the semiconductor device. Further, it is an object of an embodiment of the present invention to manufacture a highly stable semiconductor device by imparting stable electrical characteristics to a transistor in which an oxide semiconductor film is used as a channel. Further, it is an object of an embodiment of the present invention to provide a process for a semiconductor device in which a highly reliable semiconductor device is mass-produced using a large substrate such as mother glass.

In an embodiment of the present invention, in order to make the interface condition between the oxide semiconductor film and the insulating film (gate insulating film) contacting the oxide semiconductor film, it is preferable to form at least in the vicinity of the interface of the oxide semiconductor film. Area of high crystallinity. According to this, a highly reliable semiconductor device having stable electrical characteristics can be manufactured.

Further, as one method of improving the crystallinity of the oxide semiconductor film, an oxide semiconductor film having a second crystal structure can be provided as a part of the oxide semiconductor film. The second crystal structure is a wurtzite crystal structure. The oxide semiconductor film which may have the second crystal structure may be easily crystallized by heat treatment, and has a high crystallinity compared to the oxide semiconductor film which may have the first crystal structure, and the first crystal structure is selected from the non-wurtzite structure, YbFe 2 O 4 structure, Yb 2 Fe 3 O 7 structure, and deformed structure of the foregoing structure.

Forming can be performed by heat-treating an oxide semiconductor film having a first crystal structure and by heat-treating an oxide semiconductor film having a second crystal structure, and then performing heat treatment; accordingly, by using a second crystal structure The oxide semiconductor film as a seed crystal is formed by crystal growth in an oxide semiconductor film having a first crystal structure by heat treatment, thereby forming an oxide semiconductor film having a first crystal structure.

The heat treatment is performed at a temperature higher than or equal to 150 ° C and lower than or equal to 650 ° C, preferably higher than or equal to 200 ° C and lower than or equal to 500 ° C.

Instead of performing the heat treatment for crystallization, the oxide semiconductor film can be formed by sputtering while heating.

In this manner, for example, a layer including at least one second oxide semiconductor film is disposed in an oxide semiconductor stack in which an oxide semiconductor film is stacked, and heat treatment is performed on the oxide semiconductor stack, whereby high can be obtained An oxide semiconductor film having crystallinity.

Further, the thickness of the second oxide semiconductor film is greater than or equal to a degree after the atomic layer and is less than or equal to 10 nm, preferably greater than or equal to 2 nm and less than or equal to 5 nm.

In the above structure, the oxide semiconductor film is a non-single crystal, not all of which are in an amorphous state, and at least includes a crystal having c-axis alignment.

One embodiment of the present invention is a method of fabricating a semiconductor device including a transistor. In the method, a first oxide semiconductor film is formed over an insulating surface, and then a second oxide semiconductor film is formed; thereafter, a first heat treatment is performed to form an oxide semiconductor film having a first crystal structure and having a first An oxide semiconductor film of a two crystal structure. Next, a third oxide semiconductor film is formed over the oxide semiconductor film having the second crystal structure, and then a second heat treatment is performed to form an oxide semiconductor film having a third crystal structure. The stack of the oxide semiconductor film having the first crystal structure, the oxide semiconductor film having the second crystal structure, and the oxide semiconductor film having the third crystal structure is a channel region of the transistor.

The crystal structure of the oxide semiconductor film having the first crystal structure and the oxide semiconductor film having the third crystal structure is each of a YbFe 2 O 4 structure, a Yb 2 Fe 3 O 7 structure, and a non-wurtzite structure. . The crystal structure of the oxide semiconductor film having the second crystal structure is a wurtzite structure.

The temperatures of the first heat treatment and the second heat treatment are each higher than or equal to 150 ° C and lower than or equal to 650 ° C, preferably higher than or equal to 200 ° C and lower than or equal to 500 ° C. Therefore, mother glass which is a large substrate can be used as the substrate.

Each of the oxide semiconductor film having the first crystal structure, the oxide semiconductor film having the second crystal structure, and the oxide semiconductor film having the third crystal structure is non-single crystal, not all in an amorphous state, and Includes crystal regions aligned with the c-axis. That is, each of the oxide semiconductor films has an amorphous region and a c-axis aligned crystal region.

An oxide semiconductor film having a second crystal structure having a wurtzite structure, which is easily crystallized by heat treatment and compared to an oxide semiconductor film having a first crystal structure and an oxide semiconductor film having a third crystal structure Has a high degree of crystallinity. Further, the oxide semiconductor film having the second crystal structure includes a hexagonal bond formed in a plane in the a-b plane. In addition, the layer including the hexagonal keys is stacked and bonded in the thickness direction (c-axis direction) to obtain c-axis alignment. Therefore, when crystal growth is caused in the first oxide semiconductor film and the third oxide semiconductor film by using the oxide semiconductor film having the second crystal structure which is a wurtzite structure as the seed crystal An oxide semiconductor film having a first crystal structure and an oxide semiconductor film having a third crystal structure such that a crystal axis thereof and an oxide semiconductor film having a second crystal structure which is a wurtzite structure are formed The crystal axes are substantially aligned. As in the case of the oxide semiconductor film having the second crystal structure, the oxide semiconductor film having the first crystal structure and the oxide semiconductor film having the third crystal structure each include six in one plane in the ab plane Corner key. In addition, the layer including the hexagonal keys is stacked and bonded in the thickness direction (c-axis direction) to obtain c-axis alignment.

A transistor can be fabricated by forming a gate insulating film over the above-described oxide semiconductor stack and forming a gate electrode over the gate insulating film. As a result, the oxide semiconductor stack has high crystallinity and uniformity at the interface with the gate insulating film, and thus has stable electrical characteristics; accordingly, a highly reliable transistor can be obtained.

A transistor can be fabricated by forming a gate insulating film over the gate electrode and forming the above-described oxide semiconductor stack over the gate insulating film. As a result, the oxide semiconductor stack has high crystallinity and uniformity at the interface with the gate insulating film, and thus has stable electrical characteristics; accordingly, a highly reliable transistor can be obtained.

A stack of oxide semiconductor films each including a c-axis alignment region having a hexagonal bond in the ab plane serves as a channel region of the transistor, whereby a transistor can be fabricated in which light is irradiated or performed on the transistor The threshold voltage change between before and after the bias temperature stress (BT) test is small and has stable electrical characteristics.

According to an embodiment of the present invention, a transistor in which an interface condition between an oxide semiconductor film and a gate insulating film contacting the oxide semiconductor film is suitable can be manufactured. In addition, semiconductor devices having stable electrical characteristics can be fabricated. In addition, mass production of highly reliable semiconductor devices can be achieved by using large substrates such as mother glass.

Embodiments of the present invention will be described in detail with reference to the accompanying drawings. It is to be understood that the invention is not to be construed as being limited by the scope of the present invention. Therefore, the invention should not be construed as being limited to the description in the following examples. It is noted that in the structures of the present invention described hereinafter, the same components or components having similar functions are denoted by the same reference numerals in the different drawings, and the description thereof will not be repeated.

It is noted that in each of the figures described in this specification, the size, layer thickness, or area of each member is enlarged in some cases for clarity. Therefore, embodiments of the invention are not limited to this ratio.

It is noted that terms such as "first", "second", and "third" in this specification are used to avoid confusion between components, and these terms are not numerically limiting components. Therefore, for example, the term "first" may be replaced by the terms "second", "third", or the like as appropriate.

(Example 1)

In this embodiment, a transistor in which an oxide semiconductor film over an insulating surface is used as a channel and a method of manufacturing the same will be described with reference to FIGS. 1A and 1B and FIGS. 2A to 2C. 1B is a cross-sectional view showing the structure of a transistor as an embodiment of a structure of a semiconductor device, and corresponds to a cross-sectional view taken along a dotted line A-B in FIG. 1A (which is a top view). Note that in the first FIG. 1A, the substrate 101, the oxide insulating film 102, the gate insulating film 107, and the insulating film 109 are not shown. 2A to 2C are cross-sectional views showing the process of the transistor shown in Fig. 1B.

The transistor shown in FIG. 1B includes an oxide insulating film 102 formed over the substrate 101; an oxide semiconductor stack 105 formed over the oxide insulating film 102, formed over the oxide semiconductor stack 105 and functioning as a source a pair of electrodes 106 of an electrode and a drain electrode; a gate insulating film 107 formed over the oxide insulating film 102, the oxide semiconductor stack 105, and the pair of electrodes 106; and a stacked oxide semiconductor stack 105 and a gate therebetween The gate electrode 108 of the pole insulating film 107. Further, an insulating film 109 covering the gate insulating film 107 and the gate electrode 108 may be provided.

The oxide semiconductor stack 105 is characterized by being stacked with an oxide semiconductor film 105a having a first crystal structure, which contacts the oxide insulating film 102, and an oxide semiconductor film 105b having a second crystal structure, the contact having the first crystal structure The oxide semiconductor film 105a.

Further, the oxide semiconductor stack 105 is characterized in that crystal growth occurs in the oxide semiconductor film 105a having the first crystal structure using the oxide semiconductor film 105b having the second crystal structure as a seed crystal.

The oxide semiconductor film 105b having the second crystal structure includes triangular and/or hexagonal crystals.

In other words, both the oxide semiconductor film having the second crystal structure and the oxide semiconductor film having the first crystal structure include triangular and/or hexagonal crystals; therefore, a hexagonal lattice image can be observed from the c-axis direction.

It is noted that each of the oxide semiconductor film 105a having the first crystal structure and the oxide semiconductor film 105b having the second crystal structure is non-single crystal, not all in an amorphous state, and includes a c-axis aligned crystal region.

Next, a method of manufacturing the transistor in Fig. 1B will be described with reference to Figs. 2A to 2C.

As shown in FIG. 2A, after the oxide insulating film 102 is formed over the substrate 101, the first oxide semiconductor film 103a is formed over the oxide insulating film 102, and the second oxide is formed over the first oxide semiconductor film 103a. The semiconductor film 103b.

The substrate 101 must have at least a heat resistance high enough to withstand the subsequent heat treatment. In the case of using a glass substrate as the substrate 101, it is preferred to use a substrate having a strain point higher than or equal to 730 °C. As a material of the glass substrate, for example, an aluminosilicate glass, an aluminoborosilicate glass, or a bismuth borate glass is used. It is noted that a glass substrate containing BaO and B 2 O 3 is preferably used, wherein the amount of BaO is larger than the amount of B 2 O 3 . For mass production, it is preferred to use the eighth generation (2160 mm × 2460 mm), the ninth generation (2400 mm × 2800 mm or 2450 mm × 3050 mm), the tenth generation (2950 mm × 3400 mm), or the like. As the substrate 101. When the processing temperature is high and the processing time is long, the mother glass shrinks significantly. Therefore, in the case where the mother glass is used to perform mass production, the preferred heating temperature in the process is lower than or equal to 600 ° C, and more preferably lower than or equal to 450 ° C.

Instead of the glass substrate, a substrate formed of an insulator such as a ceramic substrate, a quartz substrate, or a sapphire substrate may be used. Alternatively, crystallized glass or the like can be used. Alternatively, a substrate obtained by forming an insulating film over a surface of a semiconductor substrate such as a germanium wafer or a surface of a conductive substrate made of a metal material may be used.

Note that in the case where a glass substrate including an impurity such as an alkaline earth metal is used as the substrate 101, a nitride insulating film such as tantalum nitride or aluminum nitride may be formed between the substrate 101 and the oxide insulating film 102 to prevent alkaline earth The entry of metal. A nitride insulating film can be formed by a CVD method, a sputtering method, or the like. Since the alkaline earth metal such as lithium, sodium or potassium is an impurity of the oxide semiconductor film to be formed later, the content of the alkaline earth metal is preferably small.

The oxide insulating film 102 is formed using an oxide insulating film from which a part of the contained oxygen is released by heating. The oxide insulating film which releases a part of oxygen contained therein by heating is preferably an oxide insulating film containing oxygen in an amount exceeding the amount of oxygen in the chemical composition. Oxygen is diffused into the first oxide semiconductor film 103a and the second oxide semiconductor film 103b by heating by releasing a part of the oxide oxide film contained therein by heat. Typical examples of the oxide insulating film 102 include cerium oxide, cerium oxynitride, cerium oxynitride, aluminum oxide, aluminum oxynitride, gallium oxide, cerium oxide, and cerium oxide.

An oxide insulating film containing oxygen in an amount exceeding the amount of oxygen in its chemical composition releases a part of oxygen by heating. In the thermal desorption spectrum (TDS) analysis, the amount of oxygen released at this time and converted into oxygen atoms is greater than or equal to 1.0 × 10 18 atoms / cm 3 ; preferably greater than or equal to 1.0 × 10 20 atoms / cm 3 ; More preferably, it is greater than or equal to 3.0 × 10 20 atoms/cm 3 .

Here, a method of measuring the amount of released oxygen converted into an oxygen atom using TDS analysis will be described.

The amount of released gas in the TDS analysis is proportional to the integrated value of the spectrum. Therefore, the amount of released gas can be calculated from the ratio of the integrated value of the spectrum of the oxide insulating film to the reference value of the standard sample. The reference value of the standard sample refers to the ratio of the density of a predetermined atom contained in the sample to the integrated value of the spectrum.

For example, the molecular weight of oxygen released from the oxide insulating film can be found by the TDS analysis result of the tantalum wafer containing hydrogen at a predetermined density (which is a standard sampling) and the TDS analysis result of the oxide insulating film according to Numerical Expression 1. (N(O 2 )). Here, all spectra having a mass number of 32 obtained by TDS analysis are assumed to originate from oxygen molecules. Assuming the presence of CH 3 OH unlikely hypothesis under consideration does not provide for the CH 3 OH into a gas having a mass number of 32. Further, an oxygen molecule including an oxygen atom having a mass number of 17 or 18, which is an isotope of an oxygen atom, is not taken into consideration because the proportion of such a molecule is small in the natural world.

N(O 2 )=N(H 2 )/S(H 2 )×S(O 2 )×α (numerical expression 1)

N(H 2 ) is a value obtained by converting the number of hydrogen molecules released from a standard sample into a density. S(H 2 ) is the integrated value of the spectrum when sampled by the TDS analysis standard. Here, the reference value of the standard sample is set to N(H 2 )/S(H 2 ). S(O 2 ) is an integrated value of the spectrum when the oxide insulating film is analyzed by TDS. α is a coefficient that affects the intensity of the spectrum in the TDS analysis. The details of Numerical Expression 1 can be referred to Japanese Patent Laid-Open Publication No. H6-275697. It is noted that the thermal desorption spectrum device produced by ESCo Ltd., EMD-WA1000S/W is used to measure the release from the oxide insulating film using a germanium wafer containing hydrogen atoms at 1 × 10 16 atoms/cm 3 as a standard sample. The amount of oxygen produced.

Further, in the TDS analysis, a part of the amount of oxygen is detected as an oxygen atom. The ratio between the oxygen molecule and the oxygen atom can be calculated from the ionization rate of the oxygen molecule. It is noted that since the above α includes the ionization rate of the oxygen molecules, the amount of oxygen atoms released can also be estimated by the evaluation of the amount of oxygen molecules released.

Note that N(O 2 ) is the amount of oxygen molecules released. For the oxide insulating film, the amount of oxygen released in the case of conversion into an oxygen atom is twice the amount of oxygen atoms released.

The thickness of the oxide insulating film 102 is greater than or equal to 50 nm, preferably greater than or equal to 200 nm and less than or equal to 500 nm. By using the thick oxide insulating film 102, the amount of oxygen released from the oxide insulating film 102 can be increased, and the defect of the interface between the oxide insulating film 102 and the subsequently formed oxide semiconductor film can be reduced.

The oxide insulating film 102 is formed by a sputtering method, a CVD method, or the like. Preferably, a portion of the oxygen-containing oxide insulating film is released therefrom by heat treatment by sputtering.

When a portion of the oxygen-containing oxide insulating film is released therefrom by heat treatment by sputtering, the amount of oxygen in the deposited gas is preferably large, and a mixed gas of oxygen, oxygen, and a rare gas can be used. , or the like. Typically, the concentration of oxygen in the deposition gas is preferably greater than or equal to 6% and less than or equal to 100%.

The first oxide semiconductor film 103a is formed using an oxide semiconductor film which can include a triangular and/or hexagonal crystal and has a first crystal structure by heating.

As the first oxide semiconductor film 103a, a four-component metal oxide such as an In-Sn-Ga-Zn-O film can be used; such as an In-Ga-Zn-O film, an In-Sn-Zn-O film, In- Three-component metal oxide of Al-Zn-O film, Sn-Ga-Zn-O film, Al-Ga-Zn-O film, or Sn-Al-Zn-O film; such as In-Zn-O film, Sn a two-component metal oxide of a -Zn-O film, an Al-Zn-O film, or an In-Ga-O film; or the like. Further, SiO 2 may be included in the above oxide semiconductor. In this specification, for example, an In-Ga-Zn-O film means an oxide film containing indium (In), gallium (Ga), and zinc (Zn).

An oxide semiconductor film of any crystal structure including a triangular and/or hexagonal crystal and having a deformed structure having a non-wurtzite structure, a YbFe 2 O 4 structure, a Yb 2 Fe 3 O 7 structure, and the foregoing structure can be used by heating The first oxide semiconductor film 103a is formed.

As an example of the oxide semiconductor film having the first crystal structure, the In-Ga-Zn-O film which is a three-component metal oxide includes triangular and/or hexagonal non-wurtzite crystals. Further, examples of the In-Ga-Zn-O film which is a three-component metal oxide include InGaZnO 4 having a YbFe 2 O 4 structure and In 2 Ga 2 ZnO 7 having a Yb 2 Fe 3 O 7 structure, and In-Ga The -Zn-O film may have any of the above-described structurally deformed structures (M. Nakamura, N. Kimizuka, and T. Mohri, "The Phase Relations in the In 2 O 3 -Ga 2 ZnO 4 -ZnO System at 1350 °C", J. Solid State Chem. , 1991, Vol. 93, pp. 298-315). It is noted that the layer containing Yb is labeled with layer A and the layer containing Fe is indicated by layer B. The YbFe 2 O 4 structure is a repeating structure of ABB|ABB|ABB. As an example of the deformed structure of the YbFe 2 O 4 structure, a repeating structure of ABBB|ABBB can be proposed. Further, the Yb 2 Fe 3 O 7 structure is a repeating structure of ABB|AB|ABB|AB. As an example of the deformed structure of the Yb 2 Fe 3 O 7 structure, a repeating structure of ABBB|ABB|ABBB|ABB|ABBB|ABB can be proposed.

Note that the above-described metal oxide containing nitrogen at a concentration higher than or equal to 1 × 10 17 /cm 3 and lower than or equal to 5 × 10 19 /cm 3 can be used as the first oxide semiconductor film 103a.

Note that the metal oxide which can form the first oxide semiconductor film 103a has an energy gap of 2 eV or more; preferably 2.5 eV or more; more preferably 3 eV or more. In this manner, the off-state current of the transistor can be reduced by using an oxide semiconductor having a wide energy gap.

The second oxide semiconductor film 103b is formed by heating an oxide semiconductor film having a second crystal structure. The oxide semiconductor film which may have the second crystal structure is easily crystallized by heat treatment, and has high crystallinity as compared with the oxide semiconductor film which may have a triangular and/or hexagonal first crystal structure.

The second oxide semiconductor film 103b can be formed using zinc oxide, an oxynitride semiconductor, or the like. The oxynitride semiconductor can be obtained by adding nitrogen to any metal oxide listed for the first oxide semiconductor film 103a at a concentration higher than or equal to 5 × 10 19 /cm 3 and lower than 7 at. %.

The second oxide semiconductor film 103b is used as a seed crystal for crystal growth of the first oxide semiconductor film 103a. Therefore, the second oxide semiconductor film 103b may have a thickness capable of allowing crystal growth, typically greater than or equal to the thickness of one atomic layer and less than or equal to 10 nm, preferably greater than or equal to 2 nm and less than or equal to 5 nm. When the second oxide semiconductor film 103b is thin, the flux in the deposition process and the heat treatment can be improved.

Each of the first oxide semiconductor film 103a and the second oxide semiconductor film 103b can be formed by a sputtering method, a coating method, a printing method, a pulsed laser evaporation method, or the like. When the first oxide semiconductor film 103a and the second oxide semiconductor film 103b are formed by sputtering, one of an AC sputtering device, a DC sputtering device, and an RF sputtering device is used.

When the second oxide semiconductor film 103b is formed by a sputtering method using an oxynitride semiconductor, the kind of the gas introduced into the sputtering apparatus can be changed, that is, by forming the first oxide semiconductor film 103a. Nitrogen is then introduced to deposit the NOx semiconductor. In other words, the first oxide semiconductor film 103a and the second oxide semiconductor film 103b can be formed successively, which is highly productive.

Next, the first heat treatment is performed. The temperature of the first heat treatment is higher than or equal to 150 ° C and lower than or equal to 650 ° C, preferably higher than or equal to 200 ° C and lower than or equal to 500 ° C. Further, the heating time of the first heat treatment is longer than or equal to 1 minute and shorter than or equal to 24 hours. After gradually increasing the temperature of the first heat treatment, the temperature can be made constant. When the rate of temperature increase from a temperature higher than or equal to 500 ° C is higher than or equal to 0.5 ° C / h and lower than or equal to 3 ° C / h, crystal growth of the second oxide semiconductor film 103b is gradually performed; Further increase the crystallinity.

It is preferably in a surrounding environment of a rare gas (typically argon), an environment surrounding oxygen, a surrounding environment of nitrogen, a surrounding environment of dry air, a mixed environment of rare gas (typically argon) and oxygen, or a mixed environment of rare gas and nitrogen. Perform the first heat treatment. In particular, it is preferred to use a high purity gas surrounding environment in which the concentration of impurities such as hydrogen is reduced to about parts per million (ppm) or parts per billion (ppb).

The heat treatment apparatus for the first heat treatment is not limited to a specific apparatus, and a device for heating an object to be processed through heat radiation or heat conduction from a heating element such as a resistive heating element may be provided as the apparatus. For example, an electric furnace, or a rapid thermal annealing (RTA) device such as a gas rapid thermal annealing (GRTA) device or a lamp rapid thermal annealing (LRTA) device can be used. The LRTA device is a device that heats an object to be treated with radiation (electromagnetic waves) of light emitted from a lamp such as a halogen lamp, a metal halide, a xenon arc lamp, a carbon arc lamp, a high pressure sodium lamp, or a high pressure mercury lamp. The GRTA device is a device that uses a heat treatment of a high temperature gas.

The first heat treatment allows crystal growth to start from the surface of the second oxide semiconductor film 103b toward the first oxide semiconductor film 103a. Since the second oxide semiconductor film 103b is easily crystallized, the entire second oxide semiconductor film 103b is crystallized into the oxide semiconductor film 104b having the second crystal structure. Further, since crystal growth proceeds from the surface of the second oxide semiconductor film 103b toward the first oxide semiconductor film 103a, a crystal region in which c-axis is aligned is formed. That is, the oxide semiconductor film 104b having the second crystal structure includes a key which forms a hexagonal shape in an upper plane of the a-b plane. In addition, the layer including the hexagonal keys is stacked and bonded in the thickness direction (c-axis direction) to obtain c-axis alignment.

When the first heat treatment is continued, the oxide semiconductor film 104b having the second crystal structure is seeded, and the crystal growth of the first oxide semiconductor film 103a is oxidized from the interface with the oxide semiconductor film 104b having the second crystal structure. The insulating film 102 continues. The oxide semiconductor film 104b having the second crystal structure is aligned in the c-axis direction, and the crystal in the first oxide semiconductor film 103a can be grown by using the oxide semiconductor film 104b having the second crystal structure as a seed crystal. It becomes substantially aligned with the crystal axis of the oxide semiconductor film 104b having the second crystal structure. That is, the crystals in the first oxide semiconductor film 103a can be grown while being aligned with the c-axis. That is, the oxide semiconductor film 104a having the first crystal structure includes a key which forms a hexagonal shape in an upper plane of the a-b plane. In addition, the layer including the hexagonal keys is stacked and bonded in the thickness direction (c-axis direction) to obtain c-axis alignment. Through the above steps, the oxide semiconductor film 104a having the c-axis aligned first crystal structure can be formed (see FIG. 2B).

In the case where the crystal growth by the first heat treatment is performed vertically from the surface of the second oxide semiconductor film 103b, the c-axis of the oxide semiconductor film 104a having the first crystal structure and the oxide semiconductor film 104b having the second crystal structure The surface is substantially vertical.

In addition, hydrogen contained in the first oxide semiconductor film 103a and the second oxide semiconductor film 103b (that is, dehydrogenation or dehydration occurs) is transmitted through the first heat treatment and is contained in the oxide insulating film 102. A part of oxygen diffuses into a region of the first oxide semiconductor film 103a, the second oxide semiconductor film 103b, and the oxide insulating film 102 (which is in the vicinity of the interface with the first oxide semiconductor film 103a). By this step, oxygen defects included in the first oxide semiconductor film 103a and the second oxide semiconductor film 103b can be reduced; further, oxygen is diffused to the oxide insulating film 102 in the vicinity of the first oxide semiconductor film 103a. The region allows the reduction of the interface at the interface between the oxide insulating film 102 and the first oxide semiconductor film 103a. As a result, the oxide semiconductor film 104a having the first crystal structure and the oxide semiconductor film 104b having the second crystal structure in which the hydrogen concentration and the oxygen deficiency have been reduced can be formed.

The leak rate of the processing chamber of the sputtering apparatus is set to 1 × 10 -10 Pa ‧ m 3 /s or lower by forming the first oxide semiconductor film 103a and the second oxide semiconductor film 103b by sputtering. It is possible to suppress impurities such as an alkali metal or hydrogen from entering the first oxide semiconductor film 103a and the second oxide semiconductor film 103b during the formation of the sputtering method. In addition, the use of a trapping vacuum pump (e.g., a cryopump) as an evacuation system can reduce backflow of impurities such as alkali metals or hydrogen from the evacuation system.

Further, the first oxide semiconductor film 103a and the second oxide semiconductor film 103b may be formed in a state of heating a gas (such as nitrogen, oxygen, or argon) introduced into the processing chamber of the sputtering apparatus. Therefore, the hydrogen content in the first oxide semiconductor film 103a and the second oxide semiconductor film 103b can be reduced.

Further, before the first oxide semiconductor film 103a and the second oxide semiconductor film 103b are formed by a sputtering method, a pre-heat treatment is performed to remove moisture or hydrogen contained in the surface or inside the sputtering apparatus or the target. Therefore, the hydrogen content in the first oxide semiconductor film 103a and the second oxide semiconductor film 103b can be reduced.

Through the above steps, the oxide semiconductor film 104a having the first crystal structure and the oxide semiconductor film 104b having the second crystal structure can be formed. If hydrogen is contained in an oxide semiconductor, a part thereof acts as a donor to generate electrons as a carrier. In addition, oxygen defects in the oxide semiconductor also act as a donor to generate electrons as carriers. Therefore, when the hydrogen concentration and the oxygen deficiency are reduced in the oxide semiconductor film 104a having the first crystal structure and the oxide semiconductor film 104b having the second crystal structure, the carrier concentration in the oxide semiconductor can be reduced and can be suppressed The negative displacement of the threshold voltage of the transistor to be fabricated.

<hexagonal crystal structure>

Here, the hexagonal crystal structure will be described below.

First, the second crystal structure in which the c-axis is aligned will be described with reference to FIGS. 3A and 3B. For the second crystal structure in which the c-axis is aligned, FIG. 3A shows the structure in the a-b plane seen from the c-axis direction, and FIG. 3B shows the structure in which the c-axis direction is the vertical direction.

Examples of crystals having a second crystal structure include zinc oxide, indium nitride, and gallium nitride. Further, the nitrogen-containing oxide semiconductor, that is, the oxynitride semiconductor, may be a film having a second crystal structure with c-axis alignment in some cases.

Specifically, In-Ga-Zn-containing nitrogen at a concentration higher than or equal to 5 × 10 19 /cm 3 , preferably higher than or equal to 1 × 10 20 /cm 3 and lower than 20 at.% The O film becomes a film having a second crystal structure in which c-axis is aligned, and has an In-O crystal plane (a crystal plane containing indium and oxygen) and another In-O crystal plane (a crystal plane containing indium and oxygen) There is one layer of Ga and Zn between them.

Next, a hexagonal first crystal structure in which c-axis is aligned will be described.

For example, an In-Ga-Zn-O film containing nitrogen at a concentration higher than or equal to 1 × 10 17 /cm 3 and lower than 5 × 10 19 /cm 3 becomes a hexagonal first crystal having c-axis alignment Membrane of structure. The In-Ga-Zn-O film having a hexagonal first crystal structure with c-axis alignment has an In-O crystal plane (crystal plane containing indium and oxygen) in the ab plane and is contained between the In-O crystal planes Two layers of Ga and Zn. Note that for the two layers containing Ga and Zn, the positions of Ga and Zn are not limited as long as at least one of Ga and Zn is included in each layer.

Both the second crystal structure and the first crystal structure are hexagonal crystal structures in which atoms are arranged in a hexagonal shape in the a-b plane. Further, the hexagonal first crystal structure contacts the second crystal structure, and the hexagonal first crystal structure is aligned with the second crystal structure.

Figures 4A through 4C show the manner in which the c-axis aligned hexagonal second crystal structure is aligned on a first crystal structure with c-axis alignment of the same lattice constant. Figure 4A shows a c-axis aligned hexagonal second crystal structure 2000, and Figure 4B shows a c-axis aligned first crystal structure 2001. In addition, FIG. 4C is a schematic view showing a manner in which the hexagonal second crystal structure 2000 contacts the first crystal structure 2001 and the hexagonal first crystal structure 2001 is aligned with the second crystal structure 2000.

In this manner, the hexagonal first crystal structure 2001 contacts the second crystal structure 2000 and the hexagonal first crystal structure 2001 is aligned with the second crystal structure 2000. That is, a layer including a second crystal structure 2000 having a c-axis alignment (which has high crystallinity and easily crystallized) is formed as a seed layer, and an oxide semiconductor film contacting the seed layer is formed, thereby including The second crystal structure 2000 in the crystal layer promotes crystallization of the oxide semiconductor film.

<seed layer>

Next, the seed layer will be described. The seed layer includes a c-axis aligned second crystal structure. In particular, a seed layer is formed using a material which has high crystallinity and is easily crystallized as compared with the oxide semiconductor film.

A second crystal structure that can be applied to the c-axis alignment of the seed layer will be described below.

As an example of a compound having a second crystal structure aligned with c-axis and which can be used as a seed layer, zinc oxide, indium nitride, and gallium nitride can be proposed. A nitrogen oxide semiconductor containing a concentration higher than or equal to 5 × 10 19 /cm 3 (preferably higher than or equal to 1 × 10 20 /cm 3 and lower than 7 at. %) may be in some cases A film comprising a second crystal structure aligned with the c-axis.

In the case where a nitrogen-containing oxide semiconductor is used as the seed layer, nitrogen is intentionally included to make the nitrogen concentration higher than or equal to 5 × 10 19 /cm 3 , preferably higher than or equal to 1 × 10 20 /cm 3 and low. At 7 at.%. The oxide semiconductor film deliberately containing nitrogen in this range has a smaller energy gap than the oxide semiconductor film intentionally containing no nitrogen, and thus the carrier is more likely to flow therein.

It is noted that a diffraction image in which bright spots alternately appear can be observed in the observed image of the second crystal structure aligned with the c-axis, which is obtained using a high angle annular dark field (HAADF)-STEM.

Figure 5A shows a HAADF-STEM observation image obtained by calculation of a second crystal structure based on c-axis alignment.

Fig. 5B shows a HAADF-STEM observation image of an In-Ga-Zn-O film formed using a deposition gas containing only nitrogen.

From the HAADF-STEM images observed in Figures 5A and 5B, it was confirmed that the c-axis aligned second crystal structure has a two-period layer structure.

It was noted that a nitrogen-containing In-Ga-Zn-O film was formed over the quartz substrate by sputtering to a thickness of 300 nm. Performing deposition under the following conditions: using a target containing In, Ga, and Zn at 1:1:1 [atomic ratio]; the distance between the substrate and the target is 60 mm; using a DC power supply; power is 0.5 kW And the pressure is 0.4 Pa. Further, the substrate temperature during deposition was 400 ° C, and only nitrogen was introduced as a sputtering gas into the deposition chamber at a flow rate of 40 sccm.

<Oxide semiconductor film>

Next, an oxide semiconductor film will be described. The oxide semiconductor film is non-single crystal and not all in an amorphous state. The oxide semiconductor film includes at least a c-axis aligned with the hexagonal first crystal structure and crystals anisotropically grown from the seed layer. Since the oxide semiconductor film is not all in an amorphous state, the formation of an amorphous portion (which is unstable in characteristics) is suppressed.

The c-axis having an anisotropy phenomenon applicable to the oxide semiconductor film will be described as being aligned with the first crystal structure.

As an example of the hexagonal first crystal structure, a YbFe 2 O 4 structure, a Yb 2 Fe 3 O 7 structure, and a deformed structure of the foregoing structure can be proposed. For example, In-Ga-Zn-O which is a three-component metal oxide has a hexagonal first crystal structure and can be used for an oxide semiconductor film. It is noted that the In-Ga-Zn-O film which can be used as the oxide semiconductor film may contain nitrogen at a concentration higher than or equal to 1 × 10 17 /cm 3 and lower than or equal to 5 × 10 19 /cm 3 .

Examples of the In-Ga-Zn-O which is a three-component metal oxide include InGaZnO 4 having a YbFe 2 O 4 structure and In 2 Ga 2 ZnO 7 having a Yb 2 Fe 3 O 7 structure, and In-Ga-Zn- O may have any of the above-described structurally deformed structures, which are disclosed in the following documents: M. Nakamura, N. Kimizuka, and T. Mohri, "The Phase Relations in the In 2 O 3 -Ga 2 ZnO 4 -ZnO System at 1350 ° C", J. Solid State Chem ., 1991, Vol. 93, pp. 298-315.

Further, as the oxide semiconductor film, a four-component metal oxide such as an In-Sn-Ga-Zn-O film; such as an In-Ga-Zn-O film, an In-Sn-Zn-O film, In-Al, or the like can be used. a three-component metal oxide of a -Zn-O film, a Sn-Ga-Zn-O film, an Al-Ga-Zn-O film, or a Sn-Al-Zn-O film; such as an In-Zn-O film, Sn- a two-component metal oxide of a Zn-O film, an Al-Zn-O film, or an In-Ga-O film; or the like. Further, ruthenium may be contained in the above oxide semiconductor film. In this specification, for example, an In-Ga-Zn-O film means an oxide film containing indium (In), gallium (Ga), and zinc (Zn).

The crystal in the oxide semiconductor film is anisotropically grown from the seed layer. According to this, the highly crystalline region of the semiconductor film having the heterostructure can contact the insulating surface, and the interface state due to the dangling bonds can be reduced, so that a semiconductor film having a heterostructure and a desired interface condition can be provided.

It is noted that a diffraction pattern of a bright spot appears every three points in the observed image of the c-axis aligned hexagonal first crystal structure, which is obtained by high angle annular dark field (HAADF)-STEM.

Figure 6A shows a HAADF-STEM observation image obtained by calculation of a hexagonal first crystal structure based on c-axis alignment.

Fig. 6B shows the HAADF-STEM observation image of the In-Ga-Zn-O film.

From the HAADF-STEM observation images in Figs. 6A and 6B, it was confirmed that a hexagonal first crystal structure having a bright spot at every three points and having c-axis alignment has a nine-period layer structure.

It was noted that an In-Ga-Zn-O film was formed over the quartz substrate by sputtering to a thickness of 300 nm. Performing deposition under the following conditions: using a target containing In, Ga, and Zn at 1:1:1 [atomic ratio]; the distance between the substrate and the target is 60 mm; using a DC power supply; power is 0.5 kW And the pressure is 0.4 Pa. Further, the substrate temperature during the deposition was 400 ° C, and only oxygen was introduced as a sputtering gas into the deposition chamber at a flow rate of 40 sccm.

Next, a mask is formed over the oxide semiconductor film 104b having the second crystal structure, and then the oxide semiconductor film 104a having the first crystal structure and the oxide semiconductor film having the second crystal structure are selectively etched using the mask. 104b to form an oxide semiconductor film 105a having a first crystal structure and an oxide semiconductor film 105b having a second crystal structure. It is noted that the oxide semiconductor film 105a having the first crystal structure and the oxide semiconductor film 105b having the second crystal structure are collectively referred to as the oxide semiconductor stack 105. After that, remove the mask.

A mask for etching the oxide semiconductor film 104a having the first crystal structure and the oxide semiconductor film 104b having the second crystal structure may be suitably formed by a photolithography process or by an inkjet method, a printing method, or the like. . In addition, the oxide semiconductor film 104a having the first crystal structure and the oxide semiconductor film 104b having the second crystal structure may be appropriately etched by wet etching or dry etching.

Next, the pair of electrodes 106 contacting the oxide semiconductor stack 105 are formed. Next, a gate insulating film 107 is formed over the oxide insulating film 102, the oxide semiconductor stack 105, and the pair of electrodes 106. Thereafter, a gate electrode 108 is formed over the gate insulating film 107. An insulating film 109 can be formed over the gate insulating film 107 and the gate electrode 108 (see FIG. 2C).

The pair of electrodes 106 function as a source electrode and a drain electrode.

A metal element selected from the group consisting of aluminum, chromium, copper, ruthenium, titanium, molybdenum, and tungsten; an alloy containing any of these metal elements as a component; an alloy containing a combination of these metal elements; or the like to form the pair of electrodes 106. Further, one or more metal elements selected from the group consisting of manganese, magnesium, zirconium, and hafnium may be used. In addition, the pair of electrodes 106 may have a single layer structure or a stacked structure having two or more layers. For example, a single layer structure of a bismuth-containing aluminum film, a two-layer structure in which a titanium film is stacked over an aluminum film, a two-layer structure in which a titanium film is stacked over titanium nitride, in which a tungsten film is stacked over titanium nitride, may be proposed. The two-layer structure, a two-layer structure in which a tungsten film is stacked over tantalum nitride, or a three-layer structure in which a titanium film, an aluminum film, and a titanium film are stacked in this order. Alternatively, a film, an alloy film, or a nitride film containing aluminum and one or more elements selected from the group consisting of titanium, tantalum, tungsten, molybdenum, chromium, niobium, and tantalum may be used. In the case where copper is used as the material of the pair of electrodes 106, a copper-magnesium-aluminum alloy layer contacting the oxide semiconductor stack 105 may be provided, and a copper layer contacting the copper-magnesium-aluminum alloy layer may be stacked.

For example, indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium oxide added thereto The pair of electrodes 106 are formed of a light-transmissive conductive material of tin. A stacked layer structure formed using the above-described light-transmitting conductive material and the above metal elements may also be employed.

The pair of electrodes 106 can be formed by a printing method or an inkjet method. Alternatively, after the conductive film is formed by a sputtering method, a CVD method, an evaporation method, or the like, a mask is formed over the conductive film and the conductive film is etched, and the pair of electrodes 106 are thereby formed. The mask formed over the conductive film can be suitably formed by a printing method, an inkjet method, or a photolithography method.

It is noted that the oxide semiconductor stack 105 and the pair of electrodes 106 can be formed in the following manner. After the conductive film is formed over the oxide semiconductor film 104b having the second crystal structure, a multi-tone mask is used to form a mask of the uneven shape. The mask is used to etch the oxide semiconductor film 104a having the first crystal structure, the oxide semiconductor film 104b having the second crystal structure, and the conductive film. Next, the mask of the uneven shape is separated by ashing. The separated mask is used to selectively etch the conductive film. In this procedure, the number of masks and the number of steps in the lithography procedure can be reduced.

Any of a ruthenium oxide film, a yttrium oxynitride film, a tantalum nitride film, a hafnium oxynitride film, an aluminum oxide film, an aluminum oxynitride film, and a gallium oxide film can be used to form a single layer structure or a stacked layer structure. Gate insulating film 107. A portion of the preferred gate insulating film 107 contacting the oxide semiconductor stack 105 contains oxygen. It is more preferable to form the gate insulating film 107 by using an oxide insulating film from which oxygen is contained by heating, which is similar to the oxide insulating film 102. Oxygen is diffused to the oxide semiconductor stack 105 using a hafnium oxide film; therefore, desirable characteristics can be obtained.

When a high-k material film (such as HfSiO x ), a niobium tantalate film (HfSi x O y N z ) to which nitrogen is added, and a hafnium aluminate film to which nitrogen is added (HfAl x O y N) When the gate insulating film 107 is formed by z ), a hafnium oxide film, or a hafnium oxide film), the gate leakage current can be reduced. In addition, a stacked structure in which a high-k material film and one or more of a ruthenium oxide, hafnium oxynitride, hafnium nitride, hafnium oxynitride, aluminum oxide, aluminum oxynitride, and gallium oxide are stacked may be used. . The thickness of the gate insulating film 107 is preferably greater than or equal to 1 nm and less than or equal to 300 nm, more preferably greater than or equal to 5 nm and less than or equal to 50 nm.

The gate insulating film 107 can be formed by a sputtering method, a CVD method, or the like.

Before the formation of the gate insulating film 107, the surface of the oxide semiconductor stack 105 may be exposed to a plasma of an oxidizing gas such as oxygen, ozone, or dinitrogen monoxide to be oxidized, thereby reducing oxygen defects.

A metal element selected from the group consisting of aluminum, chromium, copper, ruthenium, titanium, molybdenum, and tungsten; an alloy containing any of these metal elements as a component; an alloy containing a combination of these metal elements; and the like to form the gate electrode 108 . Further, one or more metal elements selected from the group consisting of manganese, magnesium, zirconium, and hafnium may be used. In addition, the gate electrode 108 may have a single layer structure or a stacked structure having two or more layers. For example, a single layer structure of a bismuth-containing aluminum film, a two-layer structure in which a titanium film is stacked over an aluminum film, a two-layer structure in which a titanium film is stacked over titanium nitride, in which a tungsten film is stacked over titanium nitride, may be proposed. The two-layer structure, a two-layer structure in which a tungsten film is stacked over tantalum nitride, or a three-layer structure in which a titanium film, an aluminum film, and a titanium film are stacked in this order. Alternatively, a film, an alloy film, or a nitride film containing aluminum and one or more elements selected from the group consisting of titanium, tantalum, tungsten, molybdenum, chromium, niobium, and tantalum may be used.

For example, indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium oxide added thereto The light-transmissive conductive material of tin forms the gate electrode 108. A stacked layer structure formed using the above-described light-transmitting conductive material and the above metal elements may also be employed.

As a material layer for contacting the gate insulating film, a nitrogen-containing In-Ga-Zn-O film, a nitrogen-containing In-Sn-O film, a nitrogen-containing In-Ga-O film, and a nitrogen-containing In-Zn-O A film, a nitrogen-containing Sn-O film, a nitrogen-containing In-O film, or a metal nitride film such as InN or ZnN is preferably disposed between the gate electrode 108 and the gate insulating film. These films each have a working function of 5 eV or higher, preferably 5.5 eV or higher; therefore, the threshold voltage of the electrical characteristics of the transistor can be positive. According to this, a so-called normally-off type switching element can be realized. For example, in the case of using a nitrogen-containing In-Ga-Zn-O film, an In-Ga-Zn-O film having a nitrogen concentration at least higher than that of the oxide semiconductor stack 105 is used; specifically, the use has 7 An In-Ga-Zn-O film having a nitrogen concentration of at.% or higher.

The gate electrode 108 can be formed by a printing method or an inkjet method. Alternatively, after the conductive film is formed by a sputtering method, a CVD method, an evaporation method, or the like, a mask is formed over the conductive film and the conductive film is etched, and thereby the gate electrode 108 is formed. The mask formed over the conductive film can be suitably formed by a printing method, an inkjet method, or a photolithography method.

The insulating film 109 can be appropriately formed for any of the insulating films exemplified for the gate insulating film 107. When a tantalum nitride film is formed as the insulating film 109 by sputtering, moisture and an alkali metal can be prevented from entering from the outside, and thus the amount of impurities included in the oxide semiconductor stack 105 can be reduced.

It is noted that after forming the gate insulating film 107 or forming the insulating film 109, it may contain little hydrogen and moisture (in terms of moisture, for example, the dew point is lower than or equal to -40 ° C, preferably lower than or equal to -60 ° C) of the surrounding environment (such as nitrogen surrounding environment, oxygen surrounding environment, or dry air surrounding environment) to perform heat treatment (temperature range: higher than or equal to 150 ° C and lower than or equal to 650 ° C, preferably higher than or equal to 200 ° C and less than or equal to 500 ° C).

Through the above steps, a transistor can be fabricated, the channel of which includes an oxide semiconductor stack including a crystal having a hexagonal bond in the a-b plane and a c-axis alignment triangle and/or hexagonal structure.

The oxide semiconductor stack described in this embodiment has high crystallinity and uniformity in the vicinity of the interface with the gate insulating film and thus has stable electrical characteristics; accordingly, a highly reliable transistor can be obtained. An oxide semiconductor stack including a crystal having a hexagonal bond in the ab plane and a c-axis alignment triangle and/or a hexagonal structure is used for a channel region of the transistor, whereby a light irradiation or a transistor can be manufactured A transistor that performs a small amount of change in threshold voltage between before or after the bias-temperature stress (BT) test and has stable electrical characteristics.

(Example 2)

In this embodiment, the structure of the transistor different from that of Embodiment 1 and the method of manufacturing the same will be described with reference to FIGS. 7A and 7B and FIGS. 8A to 8C. This embodiment is different from Embodiment 1 in that a pair of electrodes are provided between the oxide insulating film and the oxide semiconductor stack. Note that Fig. 7B corresponds to a cross-sectional view taken along the dotted line C-D in the point 7A (upper view). In the FIG. 7A, the substrate 101, the oxide insulating film 102, the gate insulating film 117, and the insulating film 119 are not shown. 8A to 8C are cross-sectional views showing the process of the transistor shown in Fig. 7B.

The transistor shown in FIG. 7B includes an oxide insulating film 102 formed over the substrate 101; a pair of electrodes 116 formed over the oxide insulating film 102 and functioning as a source electrode and a drain electrode; An insulating film 102 and an oxide semiconductor stack 115 of the pair of electrodes 116 functioning as a source electrode and a drain electrode; a gate insulating formed over the oxide insulating film 102, the pair of electrodes 116, and the oxide semiconductor stack 115 The film 117; and the gate electrode 115 are overlapped and the gate electrode 118 therebetween is sandwiched by the gate insulating film 117. Further, an insulating film 119 covering the gate insulating film 117 and the gate electrode 118 may be provided. Further, one of the pair of electrodes 116 contacting the wiring 120 in the opening of the insulating film 119 may be disposed.

The oxide semiconductor stack 115 is characterized by being stacked with an oxide semiconductor film 115a having a first crystal structure, which contacts the oxide insulating film 102 and the pair of electrodes 116, and an oxide semiconductor film 115b having a second crystal structure, which is in contact An oxide semiconductor film 115a having a first crystal structure.

Further, the oxide semiconductor stack 115 is characterized in that crystal growth occurs in the oxide semiconductor film 115a having the first crystal structure using the oxide semiconductor film 115b having the second crystal structure as a seed crystal.

As in Embodiment 1, the oxide semiconductor film having the second crystal structure and the oxide semiconductor film having the first crystal structure include triangular and/or hexagonal crystals; therefore, hexagonal crystals can be observed from the c-axis direction Image.

It is noted that each of the oxide semiconductor film 115a having the first crystal structure and the oxide semiconductor film 115b having the second crystal structure is non-single crystal, not all in an amorphous state, and includes a c-axis aligned crystal.

Next, a method of manufacturing the transistor in Fig. 7B will be described with reference to Figs. 8A to 8C.

As shown in FIG. 8A, as in Embodiment 1, the oxide insulating film 102 is formed over the substrate 101. Next, the pair of electrodes 116 are formed over the oxide insulating film 102. Then, a first oxide semiconductor film 113a and a second oxide semiconductor film 113b are formed over the counter electrode 116 and the oxide insulating film 102.

The pair of electrodes 116 can be suitably formed by using materials and forming methods similar to those of the pair of electrodes 106 described in Embodiment 1.

The first oxide semiconductor film 113a and the second oxide can be appropriately formed by using materials and forming methods similar to those of the first oxide semiconductor film 103a and the second oxide semiconductor film 103b described in Embodiment 1. The semiconductor film 113b.

Next, the first heat treatment was performed in a manner similar to those in Example 1. The first heat treatment allows crystal growth to start from the surface of the second oxide semiconductor film 113b toward the first oxide semiconductor film 113a, so that the second oxide semiconductor film 113b becomes the oxide semiconductor film 114b having the second crystal structure. The oxide semiconductor film 114b having the second crystal structure includes a c-axis alignment crystal.

When the first heat treatment is continued, the oxide semiconductor film 114b having the second crystal structure is seeded, and the crystal growth of the first oxide semiconductor film 113a is oxidized from the interface with the oxide semiconductor film 114b having the second crystal structure. The material insulating film 102 is continued to form an oxide semiconductor film 114a having a first crystal structure. The oxide semiconductor film 114a having the first crystal structure includes a c-axis alignment crystal (see Fig. 8B).

Through the above steps, the oxide semiconductor film 114a having the first crystal structure and the oxide semiconductor film 114b having the second crystal structure can be formed.

Next, a mask is formed over the oxide semiconductor film 114b having the second crystal structure, and then the mask is used to selectively etch the oxide semiconductor film 114a having the first crystal structure and the oxide semiconductor having the second crystal structure. The film 114b is formed to form an oxide semiconductor film 115a having a first crystal structure and an oxide semiconductor film 115b having a second crystal structure. It is noted that the oxide semiconductor film 115a of the first crystal structure and the oxide semiconductor film 115b having the second crystal structure are collectively referred to as an oxide semiconductor stack 115. After that, remove the mask.

Next, a gate insulating film 117 is formed over the oxide insulating film 102, the pair of electrodes 116, and the oxide semiconductor stack 115. Next, a gate electrode 118 is formed over the gate insulating film 117.

Thereafter, an insulating film 119 is formed over the gate insulating film 117 and the gate electrode 118. Next, after a mask is formed over the insulating film 119, the gate insulating film 117 and the insulating film 119 are partially etched to form an opening. Next, wirings 120 connected to the pair of electrodes 116 via the openings may be formed (see FIG. 8C).

The gate insulating film 117 can be suitably formed by using a material and a forming method similar to those of the gate insulating film 107 described in Embodiment 1.

The gate electrode 118 can be suitably formed by using materials and forming methods similar to those of the gate electrode 108 described in Embodiment 1.

The insulating film 119 can be suitably formed by using a material similar to those of the insulating film 109 described in Embodiment 1 and a forming method.

The wiring 120 can be appropriately formed by using materials and forming methods similar to those of the pair of electrodes 116.

Through the above steps, a transistor can be fabricated, the channel region of which includes an oxide semiconductor stack including a crystal having a hexagonal bond in the a-b plane and a c-axis alignment triangle and/or hexagonal structure.

The oxide semiconductor stack described in this embodiment has high crystallinity and uniformity in the vicinity of the interface with the gate insulating film and thus has stable electrical characteristics; accordingly, a highly reliable transistor can be obtained. An oxide semiconductor stack including a crystal having a hexagonal bond in the ab plane and a c-axis alignment triangle and/or a hexagonal structure is used for a channel region of the transistor, whereby a light irradiation or a transistor can be manufactured A transistor that performs a small amount of change in threshold voltage between before or after the bias-temperature stress (BT) test and has stable electrical characteristics.

It is noted that this embodiment can be combined as appropriate with any of the other embodiments.

(Example 3)

In this embodiment, a transistor in which an oxide semiconductor film is used as a channel and a method of manufacturing the same will be described with reference to FIGS. 9A and 9B and FIGS. 10A to 10E. Fig. 9B is a cross-sectional view showing the structure of a transistor of one embodiment of the structure of the semiconductor device, and corresponds to a cross-sectional view taken along a dotted line A-B in the drawing of Fig. 9A (upper view). Note that in the FIG. 9A, the substrate 101, the oxide insulating film 102, the gate insulating film 107, and the insulating film 109 are not shown. 10A to 10E are cross-sectional views showing the process of the transistor shown in Fig. 9B.

The transistor shown in FIG. 9B includes an oxide insulating film 102 formed over the substrate 101; an oxide semiconductor stack 105 formed over the oxide insulating film 102, formed over the oxide semiconductor stack 105, and functioning as a source a pair of electrodes 106 of an electrode and a drain electrode; a gate insulating film 107 formed over the oxide insulating film 102, the oxide semiconductor stack 105, and the pair of electrodes 106; and an overlapping oxide semiconductor stack 105 insulated by a gate The film 107 is interposed between the gate electrodes 108 therebetween. Further, an insulating film 109 covering the gate insulating film 107 and the gate electrode 108 may be provided.

The oxide semiconductor stack 105 is characterized by being stacked with an oxide semiconductor film 105a having a first crystal structure, which contacts the oxide insulating film 102, and an oxide semiconductor film 105b having a second crystal structure, the contact having the first crystal structure The oxide semiconductor film 105a; and the oxide semiconductor film 105c having the third crystal structure are in contact with the oxide semiconductor film 105b and the gate insulating film 107 having the second crystal structure.

That is, the oxide semiconductor film 105a having the first crystal structure and the oxide semiconductor film 105c having the third crystal structure are disposed below and above the oxide semiconductor film 105b having the second crystal structure.

Further, the oxide semiconductor stack 105 is characterized in that an oxide semiconductor film 105a having a second crystal structure is used as a seed crystal, and an oxide semiconductor film 105a having a first crystal structure and an oxide semiconductor film 105c having a third crystal structure are used. Crystal growth occurs in the middle.

The crystal structure of the oxide semiconductor film 105a having the first crystal structure and the oxide semiconductor film 105c having the third crystal structure are each a triangular and/or hexagonal crystal structure and a YbFe 2 O 4 structure, a Yb 2 Fe 3 O 7 structure. And any of the non-wurtzite structures. It is noted that the non-fibrous structure is a crystal structure that is not a triangular and/or hexagonal wurtzite type.

Further, the crystal structure of the oxide semiconductor film 105b having the second crystal structure is a wurtzite structure which is one of a triangular and/or hexagonal crystal structure.

In other words, since the oxide semiconductor film having the first crystal structure, the oxide semiconductor film having the second crystal structure, and the oxide semiconductor film having the third crystal structure all include triangular and/or hexagonal crystals, A hexagonal lattice image is observed in the c-axis direction.

It is noted that each of the oxide semiconductor film 105a having the first crystal structure, the oxide semiconductor film 105b having the second crystal structure, and the oxide semiconductor film 105c having the third crystal structure is non-single crystal, not all in the non- In the crystalline state, and including the c-axis aligned with the crystal region. That is, each of the oxide semiconductor films has an amorphous region and a c-axis aligned crystal region.

Next, a method of manufacturing the transistor in Fig. 9B will be described with reference to Figs. 10A to 10E.

As shown in FIG. 10A, in a manner similar to those in Embodiment 1, after the oxide insulating film 102 is formed over the substrate 101, the first oxide semiconductor film 103a is formed over the oxide insulating film 102, and The second oxide semiconductor film 103b is formed over the first oxide semiconductor film 103a.

The oxide insulating film 102 is formed using an oxide insulating film from which a part of the contained oxygen is released by heating. The oxide insulating film which releases a part of oxygen contained therein by heating is preferably an oxide insulating film containing oxygen in an amount exceeding the amount of oxygen in the chemical composition. Oxygen is diffused into the first oxide semiconductor film 103a and the second oxide semiconductor film 103b by heating by releasing a part of the oxide oxide film contained therein by heat. Typical examples of the oxide insulating film 102 include cerium oxide, cerium oxynitride, cerium oxynitride, aluminum oxide, aluminum oxynitride, gallium oxide, cerium oxide, and cerium oxide.

The thickness of the oxide insulating film 102 is greater than or equal to 50 nm, preferably greater than or equal to 200 nm and less than or equal to 500 nm. By using the thick oxide insulating film 102, the amount of oxygen released from the oxide insulating film 102 can be increased, and the defect of the interface between the oxide insulating film 102 and the subsequently formed oxide semiconductor film can be reduced.

The oxide insulating film 102 is formed by a sputtering method, a CVD method, or the like. Preferably, a portion of the oxygen-containing oxide insulating film is released therefrom by heat treatment by sputtering.

When a portion of the oxygen-containing oxide insulating film is released therefrom by heat treatment by sputtering, the amount of oxygen in the deposited gas is preferably large, and a mixed gas of oxygen, oxygen, and a rare gas can be used. , or the like. Typically, the concentration of oxygen in the deposition gas is preferably greater than or equal to 6% and less than or equal to 100%.

An oxide insulating film using any crystal structure which can include a triangular and/or hexagonal crystal and has a non-wurtzite structure, a YbFe 2 O 4 structure, a Yb 2 Fe 3 O 7 structure, and a deformed structure of the foregoing structure by heating The first oxide semiconductor film 103a is formed.

As an example of the oxide semiconductor film having the first crystal structure, the In-Ga-Zn-O film which is a three-component metal oxide includes triangular and/or hexagonal non-wurtzite crystals. Further, examples of the In-Ga-Zn-O film which is a three-component metal oxide include InGaZnO 4 having a YbFe 2 O 4 structure and In 2 Ga 2 ZnO 7 having a Yb 2 Fe 3 O 7 structure, and In-Ga The -Zn-O film may have any of the above-described structurally deformed structures (M. Nakamura, N. Kimizuka, and T. Mohri, "The Phase Relations in the In 2 O 3 -Ga 2 ZnO 4 -ZnO System at 1350 °C", J. Solid State Chem ., 1991, Vol. 93, pp. 298-315).

As the first oxide semiconductor film 103a, a four-component metal oxide such as an In-Sn-Ga-Zn-O film can be used; such as an In-Ga-Zn-O film, an In-Sn-Zn-O film, In- Three-component metal oxide of Al-Zn-O film, Sn-Ga-Zn-O film, Al-Ga-Zn-O film, or Sn-Al-Zn-O film; such as In-Zn-O film, Sn a two-component metal oxide of a -Zn-O film, an Al-Zn-O film, or an In-Ga-O film; or the like. Further, SiO 2 may be included in the above oxide semiconductor. In this specification, for example, an In-Ga-Zn-O film means an oxide film containing indium (In), gallium (Ga), and zinc (Zn). Note that the above-described metal oxide containing nitrogen at a concentration higher than or equal to 1 × 10 17 /cm 3 and lower than or equal to 5 × 10 19 /cm 3 can be used as the first oxide semiconductor film 103a.

Note that the metal oxide which can form the first oxide semiconductor film 103a has an energy gap of 2 eV or more; preferably 2.5 eV or more; more preferably 3 eV or more. In this manner, the off-state current of the transistor can be reduced by using an oxide semiconductor having a wide energy gap.

The second oxide semiconductor film 103b is formed using an oxide semiconductor film having a wurtzite crystal structure permeable to heating. The oxide semiconductor film which may have a wurtzite crystal structure is easily crystallized by heat treatment, and has high crystallinity as compared with an oxide semiconductor film which may have a triangular and/or hexagonal crystal structure.

The second oxide semiconductor film 103b can be formed using zinc oxide, an oxynitride semiconductor, or the like. Nitrogen may be added to the first oxide semiconductor film 103a at a concentration higher than or equal to 5 × 10 19 /cm 3 , preferably higher than or equal to 1 × 10 20 /cm 3 and lower than 7 at. %. Any metal oxide is listed to obtain an oxynitride semiconductor.

The second oxide semiconductor film 103b is used as a seed crystal for crystal growth of the first oxide semiconductor film 103a and the third oxide semiconductor film 103c to be formed later. Therefore, the second oxide semiconductor film 103b may have a thickness capable of allowing crystal growth, typically greater than or equal to the thickness of one atomic layer and less than or equal to 10 nm, preferably greater than or equal to 2 nm and less than or equal to 5 nm. When the second oxide semiconductor film 103b is thin, the flux in the deposition process and the heat treatment can be improved.

Each of the first oxide semiconductor film 103a and the second oxide semiconductor film 103b can be formed by a sputtering method, a coating method, a printing method, a pulsed laser evaporation method, or the like. When the first oxide semiconductor film 103a and the second oxide semiconductor film 103b are formed by sputtering, one of an AC sputtering device, a DC sputtering device, and an RF sputtering device is used.

When the second oxide semiconductor film 103b is formed by a sputtering method using an oxynitride semiconductor, the kind of the gas introduced into the sputtering apparatus can be changed, that is, by forming the first oxide semiconductor film 103a. Nitrogen is then introduced to deposit the NOx semiconductor. In other words, the first oxide semiconductor film 103a and the second oxide semiconductor film 103b can be formed successively, which is highly productive.

Next, the first heat treatment was performed in a manner similar to those in Example 1.

The first heat treatment allows crystal growth to start from the surface of the second oxide semiconductor film 103b toward the first oxide semiconductor film 103a. Since the second oxide semiconductor film 103b is easily crystallized, the entire second oxide semiconductor film 103b is crystallized into the oxide semiconductor film 104b having the second crystal structure which is a wurtzite crystal structure. Further, since crystal growth proceeds from the surface of the second oxide semiconductor film 103b toward the first oxide semiconductor film 103a, a crystal region in which c-axis is aligned is formed. That is, the oxide semiconductor film 104b having the second crystal structure includes a key which forms a hexagonal shape in an upper plane of the a-b plane. In addition, the layer including the hexagonal keys is stacked and bonded in the thickness direction (c-axis direction) to obtain c-axis alignment.

When the first heat treatment is continued, the oxide semiconductor film 104b having the second crystal structure is seeded, and the crystal growth of the first oxide semiconductor film 103a is oxidized from the interface with the oxide semiconductor film 104b having the second crystal structure. The insulating film 102 continues. The oxide semiconductor film 104b having the second crystal structure is aligned in the c-axis direction, and the crystal in the first oxide semiconductor film 103a can be grown by using the oxide semiconductor film 104b having the second crystal structure as a seed crystal. It becomes substantially aligned with the crystal axis of the oxide semiconductor film 104b having the second crystal structure. That is, the crystals in the first oxide semiconductor film 103a can be grown while being aligned with the c-axis. That is, the oxide semiconductor film 104a having the first crystal structure includes a key which forms a hexagonal shape in an upper plane of the a-b plane. In addition, the layer including the hexagonal keys is stacked and bonded in the thickness direction (c-axis direction) to obtain c-axis alignment. Through the above steps, the oxide semiconductor film 104a having the c-axis aligned first crystal structure can be formed (see FIG. 10B).

In the case where the crystal growth by the first heat treatment is performed vertically from the surface of the second oxide semiconductor film 103b, the c-axis of the oxide semiconductor film 104a having the first crystal structure and the oxide semiconductor film 104b having the second crystal structure The surface is substantially vertical.

In addition, hydrogen contained in the first oxide semiconductor film 103a and the second oxide semiconductor film 103b (that is, dehydrogenation or dehydration occurs) is transmitted through the first heat treatment and is contained in the oxide insulating film 102. A part of oxygen diffuses into a region of the first oxide semiconductor film 103a, the second oxide semiconductor film 103b, and the oxide insulating film 102 (which is in the vicinity of the interface with the first oxide semiconductor film 103a). By this step, oxygen defects included in the first oxide semiconductor film 103a and the second oxide semiconductor film 103b can be reduced; further, oxygen is diffused to the oxide insulating film 102 in the vicinity of the first oxide semiconductor film 103a. The region allows the reduction of the interface at the interface between the oxide insulating film 102 and the first oxide semiconductor film 103a. As a result, the oxide semiconductor film 104a having the first crystal structure and the oxide semiconductor film 104b having the second crystal structure in which the hydrogen concentration and the oxygen deficiency have been reduced can be formed.

Next, as shown in FIG. 10C, a third oxide semiconductor film 103c is formed over the oxide semiconductor film 104b having the second crystal structure. The third oxide semiconductor film 103c can be formed by using a material similar to those of the first oxide semiconductor film 103a and a forming method. The thickness of the third oxide semiconductor film 103c can be appropriately determined by the practitioner according to the device to be manufactured. For example, the total thickness of the first oxide semiconductor film 103a, the second oxide semiconductor film 103b, and the third oxide semiconductor film 103c may be greater than or equal to 10 nm and less than or equal to 200 nm.

The leak rate of the processing chamber of the sputtering apparatus is set by forming one or more of the first oxide semiconductor film 103a, the second oxide semiconductor film 103b, and the third oxide semiconductor film 103c by sputtering. When it is 1 × 10 -10 Pa ‧ m 3 /s or lower, impurities such as alkali metal or hydrogen can be prevented from entering the first oxide semiconductor film 103a and the second oxide semiconductor film 103b during the formation of the sputtering method, And among the third oxide semiconductor film 103c. In addition, the use of a trapping vacuum pump (e.g., a cryopump) as an evacuation system can reduce backflow of impurities such as alkali metals or hydrogen from the evacuation system.

Further, the first oxide semiconductor film 103a, the second oxide semiconductor film 103b, and the third oxide semiconductor may be formed in a state of heating a gas (such as nitrogen, oxygen, or argon) introduced into the processing chamber of the sputtering apparatus. One or more of the films 103c. Therefore, the hydrogen content in one or more of the first oxide semiconductor film 103a, the second oxide semiconductor film 103b, and the third oxide semiconductor film 103c can be reduced.

Further, before the one or more of the first oxide semiconductor film 103a, the second oxide semiconductor film 103b, and the third oxide semiconductor film 103c are formed by sputtering, the pre-heat treatment is performed to remove the sputtering. Moisture or hydrogen contained on the surface or inside of the equipment or target. Therefore, the hydrogen content in one or more of the first oxide semiconductor film 103a, the second oxide semiconductor film 103b, and the third oxide semiconductor film 103c can be reduced.

Next, the second heat treatment is performed. The temperature of the second heat treatment is higher than or equal to 150 ° C and lower than or equal to 650 ° C, preferably higher than or equal to 200 ° C and lower than or equal to 500 ° C. Further, the heating time of the second heat treatment is longer than or equal to one minute and shorter than or equal to 24 hours.

The second heat treatment may be performed in an environment similar to the one of the first heat treatment. In addition, a heating device similar to the one of the first heat treatment may be suitably used for the second heat treatment.

The second heat treatment allows crystal growth to start from the oxide semiconductor film 104b having the second crystal structure, which is a wurtzite structure, toward the third oxide semiconductor film 103c. The crystal in the oxide semiconductor film 104b having the second crystal structure is c-axis aligned; therefore, the crystal in the third oxide semiconductor film 103c is used as a seed crystal by using the oxide semiconductor film 104b having the second crystal structure. It can be grown so as to be substantially aligned with the crystal axis of the oxide semiconductor film 104b having the second crystal structure as in the case of the first oxide semiconductor film 103a. That is, the crystal in the third oxide semiconductor film 103c can be grown while being aligned with the c-axis. That is, the oxide semiconductor film 104c having the third crystal structure includes a key which forms a hexagonal shape in an upper plane of the a-b plane. In addition, the layer including the hexagonal keys is stacked and bonded in the thickness direction (c-axis direction) to obtain c-axis alignment. Through the above steps, the oxide semiconductor film 104c having the c-axis aligned third crystal structure can be formed. Further, since crystal growth is performed using the oxide semiconductor film 104b having the second crystal structure, the growth of the third oxide semiconductor film 103c is enhanced, so that the surface of the oxide semiconductor film 104c having the third crystal structure has high uniformity and high Crystallinity (see Figure 10D).

In the case where the second heat treatment crystal growth is performed vertically from the surface of the oxide semiconductor film 104b having the second crystal structure, the c-axis of the oxide semiconductor film 104c having the third crystal structure and the oxide having the second crystal structure The surface of the semiconductor film 104b is substantially vertical.

Further, by passing through the second heat treatment, as in the case of the first heat treatment, hydrogen contained in the third oxide semiconductor film 103c is released (that is, dehydrogenation or dehydration occurs). As a result, the oxide semiconductor film 104c having the third crystal structure in which the hydrogen concentration is reduced can be formed.

Through the above steps, the oxide semiconductor film 104a having the first crystal structure, the oxide semiconductor film 104b having the second crystal structure, and the oxide semiconductor film 104c having the third crystal structure can be formed; note that the first to third The crystal structure is a triangular and/or hexagonal crystal structure. The hydrogen concentration and oxygen deficiency in the oxide semiconductor film 104a having the first crystal structure, the oxide semiconductor film 104b having the second crystal structure, and the oxide semiconductor film 104c having the third crystal structure can be reduced. If hydrogen is contained in an oxide semiconductor, a part thereof acts as a donor to generate electrons as a carrier. In addition, oxygen defects in the oxide semiconductor also act as a donor to generate electrons as carriers. Therefore, when the hydrogen concentration and the oxygen defect are reduced in the oxide semiconductor film 104a having the first crystal structure, the oxide semiconductor film 104b having the second crystal structure, and the oxide semiconductor film 104c having the third crystal structure, The concentration of the carrier in the oxide semiconductor is reduced, and the negative displacement of the threshold voltage of the subsequently fabricated transistor can be suppressed. For these reasons, the concentration of hydrogen and the number of oxygen defects in the oxide semiconductor film 104a having the first crystal structure, the oxide semiconductor film 104b having the second crystal structure, and the oxide semiconductor film 104c having the third crystal structure This reduction results in a negative displacement of the threshold voltage of the subsequently fabricated transistor.

Next, in a manner similar to Embodiment 1, a mask is formed over the oxide semiconductor film 104c having the third crystal structure, and then the mask is used to selectively etch the oxide semiconductor film 104a having the first crystal structure, An oxide semiconductor film 104b having a second crystal structure, and an oxide semiconductor film 104c having a third crystal structure to form an oxide semiconductor film 105a having a first crystal structure, and an oxide semiconductor film 105b having a second crystal structure And an oxide semiconductor film 105c having a third crystal structure. It is noted that the oxide semiconductor film 105a of the first crystal structure, the oxide semiconductor film 105b having the second crystal structure, and the oxide semiconductor film 105c having the third crystal structure are collectively referred to as the oxide semiconductor stack 105. After that, remove the mask.

Next, the pair of electrodes 106 contacting the oxide semiconductor stack 105 are formed. Next, a gate insulating film 107 is formed over the oxide insulating film 102, the oxide semiconductor stack 105, and the pair of electrodes 106. Thereafter, a gate electrode 108 is formed over the gate insulating film 107. An insulating film 109 can be formed over the gate insulating film 107 and the gate electrode 108 (see FIG. 10E).

The pair of electrodes 106 can be suitably formed by using materials and forming methods similar to those of the pair of electrodes 106 described in Embodiment 1.

It is noted that the oxide semiconductor stack 105 and the pair of electrodes 106 can be formed in the following manner. After the conductive film is formed over the oxide semiconductor film 104c having the third crystal structure, a multi-tone mask is used to form a mask of the uneven shape. The mask is used to etch the oxide semiconductor film 104a having the first crystal structure, the oxide semiconductor film 104b having the second crystal structure, the oxide semiconductor film 104c having the third crystal structure, and the conductive film. Next, the mask of the uneven shape is separated by ashing. The separated mask is used to selectively etch the conductive film. In this procedure, the number of masks and the number of steps in the lithography procedure can be reduced.

The gate insulating film 107 can be suitably formed by using materials and forming methods similar to those of the gate insulating film 107 described in Embodiment 1.

Before the formation of the gate insulating film 107, the surface of the oxide semiconductor stack 105 may be exposed to a plasma of an oxidizing gas such as oxygen, ozone, or dinitrogen monoxide to be oxidized, thereby reducing oxygen defects.

The gate electrode 108 can be suitably formed by using materials and forming methods similar to those of the gate electrode 108 described in Embodiment 1.

It is noted that after forming the gate insulating film 107 or forming the insulating film 109, it may contain little hydrogen and moisture (in terms of moisture, for example, the dew point is lower than or equal to -40 ° C, preferably lower than or equal to -60 ° C) of the surrounding environment (such as nitrogen surrounding environment, oxygen surrounding environment, or dry air surrounding environment) to perform heat treatment (temperature range: higher than or equal to 150 ° C and lower than or equal to 650 ° C, preferably higher than or equal to 200 ° C and less than or equal to 500 ° C).

Through the above steps, a transistor can be fabricated, the channel of which includes an oxide semiconductor stack including a crystal having a hexagonal bond in the a-b plane and a c-axis alignment triangle and/or hexagonal structure.

The oxide semiconductor stack described in this embodiment has high crystallinity and uniformity in the vicinity of the interface with the gate insulating film and thus has stable electrical characteristics; accordingly, a highly reliable transistor can be obtained. An oxide semiconductor stack including a crystal region having a hexagonal bond in the ab plane and a c-axis alignment triangle and/or a hexagonal structure is used for a channel region of the transistor, whereby light irradiation or electricity can be manufactured therein. The crystal performs a transistor with a small amount of change in threshold voltage between before or after the bias-temperature stress (BT) test and has stable electrical characteristics.

It is noted that the oxynitride semiconductor has a smaller energy gap than the oxide semiconductor, and thus the carrier easily flows therein. Therefore, by reducing the thickness of the oxide semiconductor film 105c having the third crystal structure in the transistor, a buried channel transistor in which the oxide semiconductor film 105b having the second crystal structure serves as a channel is obtained. As a result, a transistor which has desirable electrical characteristics without the influence of the interface condition between the gate insulating film 107 and the oxide semiconductor film 105c having the third crystal structure can be manufactured.

(Example 4)

In this embodiment, the structure of the transistor different from that of Embodiment 3 and the method of manufacturing the same will be described with reference to FIGS. 11A and 11B and FIGS. 12A to 12D. This embodiment is different from Embodiment 3 in that a pair of electrodes are provided between the oxide insulating film and the oxide semiconductor stack. Note that Fig. 11B corresponds to a cross-sectional view taken along the dotted line C-D of the point 11A (which is a top view). In FIG. 11A, the substrate 101, the oxide insulating film 102, the gate insulating film 117, and the insulating film 119 are not shown. 12A to 12D are cross-sectional views showing the process of the transistor shown in Fig. 11B.

The transistor shown in FIG. 11B includes an oxide insulating film 102 formed over the substrate 101; a pair of electrodes 116 formed over the oxide insulating film 102 and functioning as a source electrode and a drain electrode; covering oxide An insulating film 102 and an oxide semiconductor stack 115 of the pair of electrodes 116 functioning as a source electrode and a drain electrode; a gate insulating formed over the oxide insulating film 102, the pair of electrodes 116, and the oxide semiconductor stack 115 The film 117; and the gate electrode 115 are overlapped and the gate electrode 118 therebetween is sandwiched by the gate insulating film 117. Further, an insulating film 119 covering the gate insulating film 117 and the gate electrode 118 may be provided. Further, one of the pair of electrodes 116 contacting the wiring 120 in the opening of the insulating film 119 may be disposed.

The oxide semiconductor stack 115 is characterized by being stacked with an oxide semiconductor film 115a having a first crystal structure, which contacts the oxide insulating film 102 and the pair of electrodes 116, and an oxide semiconductor film 115b having a second crystal structure, the contacts having The oxide semiconductor film 115a of the first crystal structure; and the oxide semiconductor film 115c having the third crystal structure, which is in contact with the oxide semiconductor film 115b and the gate insulating film 117 having the second crystal structure.

That is, the oxide semiconductor film 115a having the first crystal structure and the oxide semiconductor film 115c having the third crystal structure are disposed below and above the oxide semiconductor film 115b having the second crystal structure.

Further, the oxide semiconductor stack 115 is characterized in that an oxide semiconductor film 115b having a second crystal structure is used as a seed crystal, and an oxide semiconductor film 115a having a first crystal structure and an oxide semiconductor film 115c having a third crystal structure are used. Crystal growth occurs in the middle.

The crystal structure of the oxide semiconductor film 115a having the first crystal structure and the oxide semiconductor film 115c having the third crystal structure are each a triangular and/or hexagonal crystal structure and a YbFe 2 O 4 structure, a Yb 2 Fe 3 O 7 structure. And any of the non-wurtzite structures. It is noted that the non-fibrous structure is a crystal structure that is not a triangular and/or hexagonal wurtzite type.

Further, the oxide semiconductor film 115b having the second crystal structure is a wurtzite structure which is one of a triangular and/or hexagonal crystal structure.

As in the third embodiment, the oxide semiconductor film 115a having the first crystal structure, the oxide semiconductor film 115b having the second crystal structure, and the oxide semiconductor film 115c having the third crystal structure all include the triangle and / or hexagonal crystal, hexagonal lattice image can be observed from the c-axis direction.

It is noted that each of the oxide semiconductor film 115a having the first crystal structure, the oxide semiconductor film 115b having the second crystal structure, and the oxide semiconductor film 115c having the third crystal structure is non-single crystal, not all in the non- In the crystalline state, and including the c-axis aligned with the crystal region. That is, each of the oxide semiconductor films has an amorphous region and a c-axis aligned crystal region.

Next, a method of manufacturing the transistor in Fig. 11B will be described with reference to Figs. 12A to 12D.

As shown in FIG. 12A, as in Embodiment 1, the oxide insulating film 102 is formed over the substrate 101. Next, the pair of electrodes 116 are formed over the oxide insulating film 102. Then, a first oxide semiconductor film 113a and a second oxide semiconductor film 113b are formed over the counter electrode 116 and the oxide insulating film 102.

The pair of electrodes 116 can be suitably formed by using materials and forming methods similar to those of the pair of electrodes 106 described in Embodiment 1.

The first oxide semiconductor film 113a and the second oxide can be appropriately formed by using materials and forming methods similar to those of the first oxide semiconductor film 103a and the second oxide semiconductor film 103b described in Embodiment 1. The semiconductor film 113b.

Next, the first heat treatment was performed in a manner similar to those in Example 1. The first heat treatment allows crystal growth to start from the surface of the second oxide semiconductor film 113b toward the first oxide semiconductor film 113a, so that the second oxide semiconductor film 113b has a second crystal structure which is a wurtzite crystal structure. The oxide semiconductor film 114b. The oxide semiconductor film 114b having the second crystal structure includes a c-axis alignment crystal.

When the first heat treatment is continued, the oxide semiconductor film 114b having the second crystal structure is seeded, and the crystal growth of the first oxide semiconductor film 113a is oxidized from the interface with the oxide semiconductor film 114b having the second crystal structure. The material insulating film 102 is continued to form an oxide semiconductor film 114a having a first crystal structure. The oxide semiconductor film 114a having the first crystal structure includes a c-axis aligned crystal region.

Next, a third oxide semiconductor film 113c is formed over the oxide semiconductor film 114b having the second crystal structure (see FIG. 12B). The third oxide semiconductor film 113c can be appropriately formed by using a material similar to those of the third oxide semiconductor film 103c in Embodiment 3 and a forming method.

Next, the second heat treatment was performed in a similar manner to those in Example 3. The second heat treatment allows crystal growth to start from the surface of the oxide semiconductor film 114b having the second crystal structure which is the wurtzite structure toward the third oxide semiconductor film 113c, so that the third oxide semiconductor film 113c becomes the first The oxide semiconductor film 114c of a triple crystal structure. The oxide semiconductor film 114c having the third crystal structure includes a c-axis aligned crystal region (see Fig. 12C).

Through the above steps, the oxide semiconductor film 114a having the first crystal structure, the oxide semiconductor film 114b having the second crystal structure, and the oxide semiconductor film 114c having the third crystal structure can be formed; note that the first to third The crystal structure is a triangular and/or hexagonal crystal structure.

Next, a mask is formed over the oxide semiconductor film 114c having the third crystal structure, and then the mask is used to selectively etch the oxide semiconductor film 114a having the first crystal structure and the oxide semiconductor having the second crystal structure a film 114b and an oxide semiconductor film 114c having a third crystal structure to form an oxide semiconductor film 115a having a first crystal structure, an oxide semiconductor film 115b having a second crystal structure, and an oxidation having a third crystal structure The semiconductor film 115c. It is noted that the oxide semiconductor film 115a having the first crystal structure, the oxide semiconductor film 115b having the second crystal structure, and the oxide semiconductor film 115c having the third crystal structure are collectively referred to as the oxide semiconductor stack 115. After that, remove the mask.

Next, a gate insulating film 117 is formed over the oxide insulating film 102, the pair of electrodes 116, and the oxide semiconductor stack 115. Next, a gate electrode 118 is formed over the gate insulating film 117.

Thereafter, an insulating film 119 is formed over the gate insulating film 117 and the gate electrode 118. Next, after a mask is formed over the insulating film 119, the gate insulating film 117 and the insulating film 119 are partially etched to form an opening. Next, wirings 120 connected to the pair of electrodes 116 via the openings may be formed (see FIG. 12D).

The gate insulating film 117 can be suitably formed by using a material and a forming method similar to those of the gate insulating film 107 described in Embodiment 1.

The gate electrode 118 can be suitably formed by using materials and forming methods similar to those of the gate electrode 108 described in Embodiment 1.

The insulating film 119 can be suitably formed by using a material similar to those of the insulating film 109 described in Embodiment 1 and a forming method.

The wiring 120 can be appropriately formed by using materials and forming methods similar to those of the pair of electrodes 116.

Through the above steps, a transistor can be fabricated, the channel region of which includes an oxide semiconductor stack including a crystal region having a hexagonal bond in the a-b plane and a c-axis alignment triangle and/or hexagonal structure.

The oxide semiconductor stack described in this embodiment has high crystallinity and uniformity in the vicinity of the interface with the gate insulating film and thus has stable electrical characteristics; accordingly, a highly reliable transistor can be obtained. An oxide semiconductor stack including a crystal region having a hexagonal bond in the ab plane and a c-axis alignment triangle and/or a hexagonal structure is used for a channel region of the transistor, whereby light irradiation or electricity can be manufactured therein. The crystal performs a transistor with a small amount of change in threshold voltage between before or after the bias-temperature stress (BT) test and has stable electrical characteristics.

It is noted that this embodiment can be combined as appropriate with any of the other embodiments.

(Example 5)

In this embodiment, the structure of the transistor different from the crystal structures in Embodiments 1 to 4 and the method of manufacturing the same will be described with reference to Figs. 13A and 13B and Figs. 14A to 14D. This embodiment is different from Embodiments 1 to 4 in that a gate electrode is provided between the oxide insulating film and the gate insulating film. That is, although the top gate transistor is described in Embodiments 1 to 4, the bottom gate transistor will be described in this embodiment. Note that Fig. 13B corresponds to a cross-sectional view taken along the dotted line E-F in the 13A diagram (which is a top view). In FIG. 13A, the substrate 101, the oxide insulating film 102, the gate insulating film 127, and the insulating film 129 are not shown. 14A to 14D are cross-sectional views showing the process of the transistor shown in Fig. 13B.

The transistor shown in FIG. 13B includes an oxide insulating film 102 formed over the substrate 101; a gate electrode 128 formed on the oxide insulating film 102; and a gate covering the oxide insulating film 102 and the gate electrode 128 An insulating film 127; an oxide semiconductor stack 125 covering the gate electrode 128 and having the gate insulating film 127 disposed therebetween; and a contact electrode semiconductor 125 and serving as a source electrode and a drain electrode 126. Further, an insulating film 129 covering the gate insulating film 127, the oxide semiconductor stack 125, and the pair of electrodes 126 may be provided.

The oxide semiconductor stack 125 is characterized by being stacked with an oxide semiconductor film 125b having a first crystal structure, a gate insulating film 127, and an oxide semiconductor film 125c having a second crystal structure having a first crystal structure in contact The oxide semiconductor film 125b.

Further, the oxide semiconductor stack 125 is characterized in that crystal growth occurs in the oxide semiconductor film 125c having the second crystal structure using the oxide semiconductor film 125b having the first crystal structure as a seed crystal.

The oxide semiconductor film 125b having the first crystal structure has a wurtzite crystal structure which is one of a triangular and/or hexagonal crystal structure.

The oxide semiconductor film 125c having the second crystal structure includes a triangular and/or hexagonal crystal structure and has any crystal structure of a YbFe 2 O 4 structure, a Yb 2 Fe 3 O 7 structure, and a non-wurtzite structure.

Since the oxide semiconductor film having the first crystal structure and the oxide semiconductor film having the second crystal structure both include triangular and/or hexagonal crystals, a hexagonal lattice image can be observed from the c-axis direction.

Each of the oxide semiconductor film 125b having the first crystal structure and the oxide semiconductor film 125c having the second crystal structure is non-single crystal, not all in an amorphous state, and includes a c-axis aligned crystal region. That is, each of the oxide semiconductor films has an amorphous region and a c-axis aligned crystal region.

It is noted that the oxide semiconductor stack 125 has a two-layer structure, and here includes an oxide semiconductor film 125b having a first crystal structure and an oxide semiconductor film 125c having a second crystal structure; however, as in Embodiments 3 and 4 A three-layer oxide semiconductor stack is formed.

Next, a method of manufacturing the transistor in Fig. 13B will be described with reference to Figs. 14A to 14D.

As shown in FIG. 14A, as in Embodiment 1, the oxide insulating film 102 is formed over the substrate 101. Next, a gate electrode 128 is formed over the oxide insulating film 102. Then, a gate insulating film 127 is formed over the oxide insulating film 102 and the gate electrode 128. Thereafter, a first oxide semiconductor film 123b is formed over the gate insulating film 127.

The gate electrode 128 and the gate insulating film 127 can be appropriately formed by using materials and forming methods similar to those of the gate electrode 108 and the gate insulating film 107 described in the first embodiment.

The first oxide semiconductor film 123b can be appropriately formed by using a material similar to those of the second oxide semiconductor film 103b described in Embodiment 1 and a forming method.

Next, the first heat treatment was performed in a manner similar to those in Example 1. The first heat treatment allows crystal growth to start from the surface of the first oxide semiconductor film 123b toward the gate insulating film 127 to form the oxide semiconductor film 124b having the first crystal structure. The oxide semiconductor film 124b having the first crystal structure includes a c-axis aligned crystal region.

Next, a second oxide semiconductor film 123c is formed over the oxide semiconductor film 124b having the first crystal structure (see FIG. 14B). The second oxide semiconductor film 123c can be suitably formed by using a material similar to those of the third oxide semiconductor film 103c described in Embodiment 3 and a forming method.

Next, in a manner similar to that in Embodiment 3, the second heat treatment was performed. This heat treatment allows crystal growth to start from the interface with the oxide semiconductor film 124b having the first crystal structure toward the second oxide semiconductor film 123c, so that the second oxide semiconductor film 123c becomes an oxide semiconductor film having the second crystal structure. 124c. The oxide semiconductor film 124c having the second crystal structure includes a c-axis aligned crystal region (see Fig. 14C).

Through the above steps, the oxide semiconductor film 124b having the first crystal structure and the oxide semiconductor film 124c having the second crystal structure can be formed.

Next, a mask is formed over the oxide semiconductor film 124c having the second crystal structure, and then the mask is used to selectively etch the oxide semiconductor film 124b having the first crystal structure and the oxide semiconductor having the second crystal structure. The film 124c is formed to form an oxide semiconductor film 125b having a first crystal structure and an oxide semiconductor film 125c having a second crystal structure. It is noted that the oxide semiconductor film 125b having the first crystal structure and the oxide semiconductor film 125c having the second crystal structure are collectively referred to as the oxide semiconductor stack 115. After that, remove the mask.

Next, the pair of electrodes 126 are formed in a similar manner to those in Embodiment 1.

Next, an insulating film 129 is formed over the gate insulating film 127, the pair of electrodes 126, and the oxide semiconductor stack 125 (see FIG. 14D).

The insulating film 129 can be suitably formed by using a material similar to those of the insulating film 109 described in Embodiment 1 and a forming method.

Through the above steps, a transistor can be fabricated, the channel region of which includes an oxide semiconductor stack including a crystal region having a hexagonal bond in the a-b plane and a c-axis alignment triangle and/or hexagonal structure.

It is noted that the channel etched transistor is described in this embodiment; however, this embodiment can be applied to a channel protection transistor.

The oxide semiconductor stack has high crystallinity and uniformity in the vicinity of the interface with the gate insulating film and thus has stable electrical characteristics; accordingly, a highly reliable transistor can be obtained. An oxide semiconductor stack including a crystal having a hexagonal bond in the ab plane and a c-axis alignment triangle and/or a hexagonal structure is used for a channel region of the transistor, whereby a light irradiation or a transistor can be manufactured A transistor that performs a small amount of change in threshold voltage between before or after the bias-temperature stress (BT) test and has stable electrical characteristics.

It is noted that the oxynitride semiconductor has a smaller energy gap than the oxide semiconductor, and thus the carrier easily flows therein. Therefore, by using the oxynitride semiconductor film to form the oxide semiconductor film 125b having the first crystal structure, which contacts the gate insulating film 127, a transistor having desired electrical characteristics can be manufactured.

It is noted that this embodiment can be combined as appropriate with any of the other embodiments.

(Example 6)

In this embodiment, the structure of the crystal crystals different from those of the crystal structures of Embodiments 1 to 5 and the method of manufacturing the same will be described with reference to Figs. 15A and 15B and Figs. 16A to 16D. In this embodiment, the bottom gate transistor will be described. This transistor is different from the one in Embodiment 5 in that a pair of electrodes are provided between the oxide insulating film and the oxide semiconductor film. Note that Fig. 15B corresponds to a cross-sectional view of a dotted line G-H along a point 15A (which is a top view). In FIG. 15A, the substrate 101, the oxide insulating film 102, the gate insulating film 137, and the insulating film 139 are not shown. 16A to 16D are cross-sectional views showing the process of the transistor shown in Fig. 15B.

The transistor shown in FIG. 15B includes an oxide insulating film 102 formed over the substrate 101; a gate electrode 138 formed on the oxide insulating film 102; and a gate covering the oxide insulating film 102 and the gate electrode 138 An insulating film 137; a counter electrode 136 serving as a source electrode and a drain electrode; and an oxide semiconductor stack 135 contacting the gate insulating film 137 and the pair of electrodes 136. Further, an insulating film 139 covering the gate insulating film 137, the oxide semiconductor stack 135, and the pair of electrodes 136 may be provided.

The oxide semiconductor stack 135 is characterized by being stacked with an oxide semiconductor film 135b having a first crystal structure, which contacts a gate insulating film 137, and an oxide semiconductor film 135c having a second crystal structure having a first crystal structure in contact The oxide semiconductor film 135b.

Further, the oxide semiconductor stack 135 is characterized in that crystal growth occurs in the oxide semiconductor film 135c having the second crystal structure using the oxide semiconductor film 135b having the first crystal structure as a seed crystal.

The oxide semiconductor film 135b having the first crystal structure has a wurtzite crystal structure which is one of a triangular and/or hexagonal crystal structure.

The oxide semiconductor film 135c having the second crystal structure includes a triangular and/or hexagonal crystal structure and has any crystal structure of a YbFe 2 O 4 structure, a Yb 2 Fe 3 O 7 structure, and a non-wurtzite structure.

Since the oxide semiconductor film having the first crystal structure and the oxide semiconductor film having the second crystal structure both include triangular and/or hexagonal crystals, a hexagonal lattice image can be observed from the c-axis direction.

Each of the oxide semiconductor film 135b having the first crystal structure and the oxide semiconductor film 135c having the second crystal structure is non-single crystal, not all in an amorphous state, and includes a c-axis aligned crystal region. That is, each of the oxide semiconductor films has an amorphous region and a c-axis aligned crystal region.

It is noted that the oxide semiconductor stack 135 has a two-layer structure including an oxide semiconductor film 135b having a first crystal structure and an oxide semiconductor film 135c having a second crystal structure; however, as in Embodiments 3 and 4 A three-layer oxide semiconductor stack is formed.

Next, a method of manufacturing the transistor in Fig. 15B will be described with reference to Figs. 16A to 16D.

As shown in FIG. 16A, as in Embodiment 1, the oxide insulating film 102 is formed over the substrate 101. Next, a gate electrode 138 is formed over the oxide insulating film 102. Then, a gate insulating film 137 is formed over the oxide insulating film 102 and the gate electrode 138. Thereafter, the pair of electrodes 136 are formed over the gate insulating film 137. Next, a first oxide semiconductor film 133b is formed over the gate insulating film 137 and the pair of electrodes 136.

The gate electrode 138 and the gate electrode can be appropriately formed by using materials and forming methods similar to those of the gate electrode 108, the gate insulating film 107, and the second oxide semiconductor film 103b described in Embodiment 3. The insulating film 137 and the first oxide semiconductor film 133b.

Next, the first heat treatment was performed in a manner similar to those in Example 1. The first heat treatment allows crystal growth to start from the surface of the first oxide semiconductor film 133b toward the gate insulating film 137, so that the first oxide semiconductor film 133b becomes the oxide semiconductor film 134b having the first crystal structure. The oxide semiconductor film 134b having the first crystal structure includes a c-axis aligned crystal region.

Next, a second oxide semiconductor film 133c is formed over the oxide semiconductor film 134b having the first crystal structure (see FIG. 16B). The second oxide semiconductor film 133c can be suitably formed by using a material similar to those of the third oxide semiconductor film 103c described in Embodiment 3 and a forming method.

Next, in a manner similar to that in Embodiment 3, the second heat treatment was performed. This heat treatment allows crystal growth to start from the interface with the oxide semiconductor film 134b having the first crystal structure toward the second oxide semiconductor film 133c, so that the second oxide semiconductor film 133c becomes an oxide semiconductor film having the second crystal structure. 134c. The oxide semiconductor film 134c having the second crystal structure includes a c-axis aligned crystal region (see Fig. 16C).

Through the above steps, the oxide semiconductor film 134b having the first crystal structure and the oxide semiconductor film 134c having the second crystal structure can be formed.

Next, a mask is formed over the oxide semiconductor film 134c having the second crystal structure, and then the mask is used to selectively etch the oxide semiconductor film 134b having the first crystal structure and the oxide semiconductor having the second crystal structure. The film 134c is formed to form an oxide semiconductor film 135b having a first crystal structure and an oxide semiconductor film 135c having a second crystal structure. It is noted that the oxide semiconductor film 135b of the first crystal structure and the oxide semiconductor film 135c having the second crystal structure are collectively referred to as an oxide semiconductor stack 135. After that, remove the mask.

Next, an insulating film 139 is formed over the oxide insulating film 102, the pair of electrodes 136, and the oxide semiconductor stack 135 (see FIG. 16D).

The insulating film 139 can be suitably formed by using a material similar to those of the insulating film 109 described in Embodiment 3 and a forming method.

Through the above steps, a transistor can be fabricated, the channel region of which includes an oxide semiconductor stack including a crystal having a hexagonal bond in the a-b plane and a c-axis alignment triangle and/or hexagonal structure.

It is noted that the channel etched transistor is described in this embodiment; however, this embodiment can be applied to a channel protection transistor.

The oxide semiconductor stack has high crystallinity and uniformity in the vicinity of the interface with the gate insulating film and thus has stable electrical characteristics; accordingly, a highly reliable transistor can be obtained. An oxide semiconductor stack including a crystal region having a hexagonal bond in the ab plane and a c-axis alignment triangle and/or a hexagonal structure is used for a channel region of the transistor, whereby light irradiation or electricity can be manufactured therein. The crystal performs a transistor with a small amount of change in threshold voltage between before or after the bias-temperature stress (BT) test and has stable electrical characteristics.

It is noted that this embodiment can be combined as appropriate with any of the other embodiments.

(Example 7)

In this embodiment, the case where the transistor described in any of Embodiments 1 to 6 has a plurality of gate electrodes will be described. Although the transistor described in Embodiment 5 is used in this embodiment, this embodiment can be suitably applied to the transistors described in Embodiments 1 to 4 and Embodiment 6.

In a manner similar to that in Embodiment 5, as shown in FIG. 17, an oxide insulating film 102 is formed over the substrate 101, and a first gate electrode 148a and a first electrode are formed over the oxide insulating film 102. Gate insulating film 147a. Next, an oxide semiconductor stack 125 in which an oxide semiconductor film 125b having a first crystal structure and an oxide semiconductor film 125c having a second crystal structure are stacked is formed over the first gate insulating film 147a, the pair of electrodes 126, And a second gate insulating film 147b.

Next, a second gate electrode 148b is formed in a region where the oxide semiconductor stack 125 is overlaid over the second gate insulating film 147b. An insulating film 129 can be formed as a protective film over the second gate insulating film 147b and the second gate electrode 148b.

The first gate electrode 148a and the second gate electrode 148b may be formed in a manner similar to the gate electrode 108 described in Embodiment 1.

The first gate insulating film 147a and the second gate insulating film 147b can be appropriately formed in a material and a forming method similar to those of the gate insulating film 107 in the first embodiment.

The first gate electrode 148a and the second gate electrode 148b can be connected. In this case, the first gate electrode 148a and the second gate electrode 148b have the same potential and form a channel region on the first gate electrode 148a side and the second gate electrode 148b side of the oxide semiconductor stack 125, Thereby, the on-state current and the field effect mobility of the transistor can be increased.

Alternatively, the first gate electrode 148a and the second gate electrode 148b may not be connected and supply different potentials. In this case, the threshold voltage of the transistor can be controlled.

In this embodiment, the pair of electrodes 126 are formed between the oxide semiconductor stack 125 and the second gate insulating film 147b, but the pair of electrodes 126 may be formed on the first gate insulating film 147a and the oxide semiconductor stack 125. between.

Through the above steps, a transistor having a plurality of gate electrodes can be fabricated.

(Example 8)

In this embodiment, an embodiment will be described below in which a display device is manufactured which includes at least a portion of a driver circuit disposed above a substrate and a transistor disposed in the pixel portion.

A transistor disposed in the pixel portion is formed according to any of Embodiments 1 to 7. Further, the transistor described in any of Embodiments 1 to 7 is an n-channel transistor, and thus can be formed over the same substrate as the transistor of the pixel portion, and an n-channel transistor can be used among a plurality of driver circuits. Formed as part of a driver circuit.

Figure 18A illustrates an embodiment of a block diagram of an active matrix display device. Above the substrate 5300 in the display device, a pixel portion 5301, a first scanning line driver circuit 5302, a second scanning line driver circuit 5303, and a signal line driver circuit 5304 are disposed. In the pixel portion 5301, a plurality of signal lines extending from the signal line driver circuit 5304 are disposed, and a plurality of scanning lines extending from the first scanning line driver circuit 5302 and the second scanning line driver circuit 5303 are disposed. It is noted that pixels including display elements are arranged in a matrix form in individual regions in which the scan lines and the signal lines cross each other. Further, the substrate 5300 in the display device is connected to a timing control circuit (also referred to as a controller or controller IC) via a connection point such as a flexible printed circuit (FPC).

In FIG. 18A, the first scan line driver circuit 5302, the second scan line driver circuit 5303, and the signal line driver circuit 5304 are formed over the same substrate 5300 as the pixel portion 5301. Accordingly, the number of components of the driver circuit or the like provided outside is reduced, so that cost reduction can be achieved. Further, if the driver circuit is disposed outside the substrate 5300, it is necessary to extend the wiring and the number of wiring connections may increase. However, if a driver circuit is provided over the substrate 5300, the number of wiring connections can be reduced. Accordingly, improvement in reliability and productivity can be achieved.

Fig. 18B is a diagram showing an example of the circuit configuration of the pixel unit. Here, the pixel structure of the VA liquid crystal display panel is displayed.

In this pixel structure, a plurality of pixel electrodes are included in one pixel, and one transistor is connected to each of the pixel electrodes. The transistors are driven by different gate signals. That is, the signals supplied to the individual pixel electrodes in the multi-domain pixels are independently controlled.

The gate wiring 602 of the transistor 628 and the gate wiring 603 of the transistor 629 are separated, so that different gate signals can be supplied thereto. Conversely, the source or drain electrode 616 functioning as a data line is commonly used by transistors 628 and 629. For each of the transistors 628 and 629, any of the transistors described in Embodiments 1 to 7 can be suitably used.

The first pixel electrode and the second pixel electrode have different shapes and are separated by a crack. A second pixel electrode is disposed to surround the outer side of the first pixel electrode that is dispersed in a V shape. The timing of the voltage application between the first and second pixel electrodes is varied by transistors 628 and 629 to control the alignment of the liquid crystal. The transistor 628 is connected to the gate wiring 602, and the transistor 629 is connected to the gate wiring 603. When different gate signals are applied to the gate wiring 602 and the gate wiring 603, the operation timing of the transistor 628 and the transistor 629 can be changed.

Further, a storage capacitor is formed using a capacitor wiring 690, a gate insulating film serving as a dielectric, and a capacitor electrode electrically connected to the first pixel electrode or the second pixel electrode.

The first pixel electrode, the liquid crystal layer, and the opposite electrode overlap each other to form the first liquid crystal element 651. The second pixel electrode, the liquid crystal layer, and the opposite electrode overlap each other to form a second liquid crystal element 652. The pixel structure is a multi-domain structure in which the first liquid crystal element 651 and the second liquid crystal element 652 are disposed in one pixel.

It is noted that the pixel structure is not limited to those shown in Fig. 18B. For example, a switch, resistor, capacitor, transistor, sensor, or logic circuit can be added to the pixel shown in Figure 18B.

In this embodiment, an embodiment of the VA liquid crystal display panel is shown; however, one embodiment of the present invention is not particularly limited thereto and can be applied to liquid crystal display devices of various modes. For example, as one method of improving viewing angle characteristics, one embodiment of the present invention can be applied to a transverse electric field mode (also referred to as an IPS mode) in which an electric field in a horizontal direction to a main surface of a substrate is applied to a liquid crystal layer.

For example, a liquid crystal exhibiting a blue phase (the alignment film is not required for this IPS liquid crystal display panel) is preferably used. The blue phase is one of the liquid crystal phases which is generated just before the temperature of the cholesteric liquid crystal increases as the cholesterol phase changes to the isotropic phase. Since the blue phase is produced only in a narrow temperature range, the liquid crystal layer mixed with the chiral agent is used for the liquid crystal layer of the liquid crystal element to improve the temperature range. A liquid crystal composition including a liquid crystal and a chiral agent exhibiting a blue phase has a short response time of 1 millisecond or less and is optically isotropic, which makes the alignment process unnecessary and the viewing angle dependency becomes small.

In addition, in order to improve the moving image characteristics of the liquid crystal display device, a driving technique (for example, a field sequential method) may be employed in which a plurality of light emitting diodes (LEDs) or a plurality of EL light sources are used as a backlight to form a surface light source, and the surface light source Each light source is independently driven in a pulsed manner during a frame period. As the surface light source, three or more LEDs or one LED that emits white light can be used. In the case of using three or more light sources (for example, red (R), green (G), blue (B) light sources) emitting different colors as the surface light source, color display can be performed without a color filter. Further, in the case of using an LED that emits white light as a surface light source, the color filter performs a color display. Since the complex LEDs can be independently controlled, the timing of the liquid crystal layer can be optically modulated to synchronize the illumination timing of the LEDs. The LEDs can be partially turned off, and thus the power consumption is reduced especially in the case of displaying a large area image in which the black display area occupies one screen.

Figure 18C shows an embodiment of the circuit configuration of the pixel portion. Here, the pixel structure of the display panel using the organic EL element is displayed.

In the organic EL element, by applying a voltage to the light-emitting element, electrons and holes are respectively injected from a pair of electrodes into a layer containing a light-emitting organic compound, and thus current flows. The carriers (electrons and holes) recombine and thus excite the luminescent organic compound. The luminescent organic compound returns from the excited state to the ground state, thereby emitting light. Due to this mechanism, this light-emitting element is called a current-excited light-emitting element.

Figure 18C illustrates an embodiment of a pixel structure to which a grayscale drive can be applied, as an embodiment of a semiconductor device.

The structure and operation of a pixel to which a grayscale driving to a digital time can be applied will be described. In this embodiment, an embodiment is described in which one pixel includes two n-channel transistors using an oxide semiconductor film in the channel region.

The pixel 6400 includes a switching transistor 6401, a driving transistor 6402, a light emitting element 6404, and a capacitor 6403. The gate electrode of the switching transistor 6401 is connected to the scan line 6406. The first electrode (one of the source electrode and the drain electrode) of the switching transistor 6401 is connected to the signal line 6405. The second electrode (the other of the source electrode and the drain electrode) of the switching transistor 6401 is connected to the gate electrode of the driving transistor 6402. The gate electrode of the driving transistor 6402 is connected to the power source line 6407 through the capacitor 6403. The first electrode of the driving transistor 6402 is connected to the power source line 6407. The second electrode of the driving transistor 6402 is connected to the first electrode (pixel electrode) of the light emitting element 6404. The second electrode of the light emitting element 6404 corresponds to the common electrode 6408. The common electrode 6408 is electrically connected to a common potential line disposed above the same substrate.

The second electrode (common electrode 6408) of the light-emitting element 6404 is set to a low power supply potential. Note that the low power supply potential is at a potential, which is set to the high power supply potential set to the power supply line 6407, and satisfies the low power supply potential <high power supply potential. As the low power supply potential, for example, GND or 0 V can be employed. A potential difference between the high power supply potential and the low power supply potential is applied to the light emitting element 6404, and a current is supplied to the light emitting element 6404 to cause the light emitting element 6404 to emit light. Here, in order to cause the light-emitting element 6404 to emit light, each potential is set such that the potential difference between the high power supply potential and the low power supply potential is higher than or equal to the forward threshold voltage of the light-emitting element 6404.

Note that the gate capacitance of the driving transistor 6402 can be used as a replacement for the capacitor 6403, so the capacitor 6403 can be omitted. A gate capacitance of the driving transistor 6402 may be formed between the channel formation region and the gate electrode.

In the case of the voltage input voltage driving method, a video signal is input to the gate electrode of the driving transistor 6402 so that the driving transistor 6402 is sufficiently turned on or sufficiently turned off. That is, the driving transistor 6402 operates in the linear region, and thus, a voltage higher than the voltage of the power source line 6407 is applied to the gate electrode of the driving transistor 6402. It is noted that a voltage higher than or equal to (the voltage of the power supply line + the Vth of the driving transistor 6402) is applied to the signal line 6405.

In the case of performing the analog gray scale method instead of the digital time gray scale method, the same pixel structure as in the 18Cth picture can be used by changing the signal input.

In the case of performing the analog gray scale driving, a voltage higher than or equal to the sum of the forward voltage of the light-emitting element 6404 and the Vth of the driving transistor 6402 is applied to the gate electrode of the driving transistor 6402. The forward voltage of the light-emitting element 6404 represents the voltage at which the desired brightness is obtained and includes at least a forward threshold voltage. Current can be supplied to the light-emitting element 6404 by inputting a video signal that causes the drive transistor 6402 to operate in a saturated region. In order for the driving transistor 6402 to operate in the saturation region, the potential of the power supply line 6407 is set to be higher than the gate potential of the driving transistor 6402. When an analog video signal is used, current can be fed to the light-emitting element 6404 according to the video signal and the analog gray scale drive is performed.

It is noted that the pixel structure is not limited to that shown in Fig. 18C. For example, a switch, resistor, capacitor, transistor, sensor, or logic circuit can be added to the pixel shown in Figure 18C.

Next, the structure of the light-emitting element will be described with reference to the cross-sectional structure of the pixel, which is shown in Figs. 19A to 19C. Here, the cross-sectional structure of the pixel will be described by taking a case where the light-emitting element driving transistor is an n-channel transistor. The light-emitting element drive transistors 7011, 7021, and 7001 for the semiconductor device shown in Figs. 19A to 19C can be fabricated in a manner similar to that of any of the transistors described in Embodiments 1 to 7.

At least one of the first electrode and the second electrode of the light emitting element is formed using a conductive film that transmits visible light, and light emission is extracted from the light emitting element. When attention is focused on extracting the direction of light emission, the following structure may be proposed: a top emission structure in which a light emission is extracted from a side of a substrate on which a light-emitting element is formed without passing through a substrate on which a light-emitting element and a transistor are formed. a bottom emission structure in which light is emitted from a substrate on which a light-emitting element is not formed, and a double-emission structure in which a substrate from which a light-emitting element is formed and a substrate through which a substrate is transmitted Both sides extract light emission. The pixel configuration shown in Fig. 18C can be applied to a light-emitting element having any of these emission structures.

A light-emitting element having a bottom emission structure will be described with reference to Fig. 19A. The light-emitting element having the bottom emission structure emits light in the direction indicated by the arrow in Fig. 19A.

In Fig. 19A, an embodiment in which the n-channel transistor described in Embodiment 1 is used as the light-emitting element driving transistor 7011 is shown; however, an embodiment of the present invention is not particularly limited thereto.

In FIG. 19A, the EL layer 7014 and the second electrode 7015 are sequentially stacked above the first electrode 7017 having a light transmitting property, and the first electrode is connected to the source electrode or the drain electrode of the light emitting element driving transistor 7011. .

The first electrode 7017 is formed using a conductive film that transmits visible light. For the conductive film that transmits visible light, for example, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium tin oxide (hereinafter referred to as ITO) ), indium zinc oxide, or indium tin oxide to which cerium oxide is added. Further, a metal film having a thickness large enough to transmit light (preferably about 5 nm to 30 nm) can also be used. For example, an aluminum film having a thickness of 20 nm may be stacked over a conductive film having a light transmitting property.

As the second electrode 7015, a material that effectively reflects light emitted from the EL layer 7014 is preferably used, in which case the light extraction efficiency can be improved. It is noted that the second electrode 7015 may have a stacked layer structure. For example, a conductive film that transmits visible light (which is formed on the side contacting the EL layer 7014) and a light blocking film 7016 may be stacked. As the light-blocking film, a metal film or the like which efficiently reflects light emitted from the EL layer 7014 is preferably used, for example, a resin to which a black coloring matter is added or the like.

It is noted that one of the first electrode 7017 and the second electrode 7015 functions as an anode, and the other acts as a cathode. It is preferable to use a substance having a high work function as an electrode acting as an anode, and a substance having a low work function as an electrode functioning as a cathode.

As a material having a high work function, for example, ZrN, Ti, W, Ni, Pt, Cr, ITO, or In-Zn-O can be used. As a material having a low work function, an alkali metal such as Li or Cs, an alkaline earth metal such as Mg, Ca, or Sr, an alloy containing any of these (such as Mg:Ag or Al:Li), such as Yb or Er may be used. Rare earth metals, or the like.

Note that when the power consumption is relatively high, it is preferable that the first electrode 7017 functions as a cathode and the second electrode 7015 functions as an anode because an increase in voltage of the driver circuit portion can be suppressed and power consumption can be reduced.

The EL layer 7014 includes at least one light emitting layer and may be a single layer or a stack of a plurality of layers. As a structure in which a plurality of layers are stacked, a structure in which an anode, a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer are stacked in this order can be provided. It is noted that all of these layers must be provided in the EL layer 7014, and each of these layers may be doubled or more. Further, in addition to the charge generating layer, another member such as an electron relay layer may be appropriately added as an intermediate layer.

The light emitting element 7012 is provided with a partition wall 7019 covering one edge of the first electrode 7017. As the partition wall 7019, an inorganic insulating film or an organic polyoxyalkylene film can be applied in addition to an organic resin film such as polyimide, acrylic, polyamide, epoxy resin or the like. It is particularly preferable to form the partition wall 7019 using a photosensitive resin material so that one side surface of the partition wall 7019 is formed as an inclined surface having a continuous curvature. In the case where a photosensitive resin material is used as the partition wall 7019, the step of forming a resist mask may be omitted. Further, the partition wall 7019 may be formed using an inorganic insulating film. When an inorganic insulating film is used as the partition wall 7019, the amount of moisture included in the partition wall can be reduced.

It is noted that the color filter layer 7033 is disposed between the light-emitting element 7012 and the substrate 7010 (see FIG. 19A). A structure that emits white light is used as the light-emitting element 7012, whereby light emitted from the light-emitting element 7012 passes through the color filter layer 7033 and then passes through the insulating film 7032, the gate insulating film 7031, the oxide insulating film 7030, and the substrate 7010. Was launched to the outside.

A plurality of color filter layers 7033 can be formed. For example, a red color filter layer, a blue color filter layer, and a green color filter layer may be provided in individual pixels. It is noted that the color filter layer 7033 is formed by a droplet discharge method such as an inkjet method, a printing method, an etching method using a photolithography technique, or the like.

The color filter layer 7033 is covered with a jacket layer 7034 and a protective insulating film 7035 is further formed thereon. It is noted that a jacket layer 7034 having a small thickness is illustrated in Fig. 19A; the jacket layer 7034 is formed using a resin material such as an acrylic resin and has a function of reducing the unevenness caused by the color filter layer 7033.

Contact holes formed in the insulating film 7032, the color filter layer 7033, the overcoat layer 7034, and the protective insulating film 7035 and reaching the gate electrode are in a position overlapping the partition wall 7019.

Next, a light-emitting element having a dual emission structure will be described with reference to Fig. 19B. A light-emitting element having a dual emission structure emits light in a direction indicated by an arrow in Fig. 19B.

In Fig. 19B, an embodiment in which the n-channel transistor described in Embodiment 1 is used as the light-emitting element driving transistor 7021 is shown; however, an embodiment of the present invention is not particularly limited thereto.

In FIG. 19B, the EL layer 7024 and the second electrode 7025 are stacked in this order over the first electrode 7027 having a light transmitting property, and the first electrode is connected to the source electrode or the drain electrode of the light emitting element driving transistor 7021. .

Each of the first electrode 7027 and the second electrode 7025 is formed using a conductive film that transmits visible light. As the conductive film that transmits visible light, a material which can be used as the first electrode 7017 in Fig. 19A can be used. Therefore, please refer to the description of the first electrode 7017 for details.

It is noted that one of the first electrode 7027 and the second electrode 7025 functions as an anode, and the other acts as a cathode. It is preferable to use a substance having a high work function as an electrode acting as an anode, and a substance having a low work function as an electrode functioning as a cathode.

The EL layer 7024 can be a single layer or a stack of multiple layers. For the EL layer 7024, the structure and material which can be used as the EL layer 7014 in Fig. 19A can be used. Therefore, please refer to the description of EL layer 7014 for details.

The light emitting element 7022 is provided with a partition wall 7029 covering one edge of the first electrode 7027. For the partition wall 7029, the structure and material that can be used as the partition wall 7019 in Fig. 19A can be used. Therefore, please refer to the description of partition 7019 for details.

Further, in the element structure shown in Fig. 19B, as shown by the arrow, light is emitted from the light-emitting element 7022 to both the second electrode 7025 side and the first electrode 7027, and is emitted to the side of the first electrode 7027. The light passes through the insulating film 7042, the gate insulating film 7041, the oxide insulating film 7040, and the substrate 7020 to be emitted to the outside.

In the configuration of FIG. 19B, in order to perform full color display, the light-emitting element 7022, one of the light-emitting elements adjacent to the light-emitting element 7022, and the other of the light-emitting elements are, for example, a green light-emitting element and a red light-emitting element, respectively. And blue light-emitting elements. Alternatively, four kinds of light-emitting elements (including white light-emitting elements other than the three light-emitting elements) may be used to manufacture a light-emitting display device capable of full-color display.

Next, a light-emitting element having a top emission structure will be described with reference to Fig. 19C. The light-emitting element having the top emission structure emits light in the direction indicated by the arrow in Fig. 19C.

In Fig. 19C, an embodiment in which the n-channel transistor described in Embodiment 1 is used as the light-emitting element driving transistor 7001 is shown; however, an embodiment of the present invention is not particularly limited thereto.

In FIG. 19C, the EL layer 7004 and the second electrode 7005 are stacked in this order over the first electrode 7003 having a light transmitting property, and the first electrode is connected to the source electrode or the drain electrode of the light emitting element driving transistor 7001. .

As the first electrode 7003, a material that effectively reflects light emitted from the EL layer 7004 is preferably used, in which case the light extraction efficiency can be improved. It is noted that the first electrode 7003 may have a stacked layer structure. For example, a conductive film that transmits visible light, which is formed on the side contacting the EL layer 7004, may be stacked over the light blocking film. As the light-blocking film, a metal film or the like which effectively reflects light emitted from the EL layer is preferably used, for example, a resin to which a black coloring matter is added or the like.

The second electrode 7005 is formed using a conductive film that transmits visible light. As the conductive film that transmits visible light, a material which can be used as the first electrode 7017 in Fig. 19A can be used. Therefore, please refer to the description of the first electrode 7017 for details.

It is noted that one of the first electrode 7003 and the second electrode 7005 functions as an anode, and the other acts as a cathode. It is preferable to use a substance having a high work function as an electrode acting as an anode, and a substance having a low work function as an electrode functioning as a cathode.

The EL layer 7004 can be a single layer or a stack of multiple layers. For the EL layer 7004, the structure and material which can be used as the EL layer 7014 in Fig. 19A can be used. Therefore, please refer to the description of EL layer 7014 for details.

The light emitting element 7002 is provided with a partition wall 7009 covering one edge of the first electrode 7003. For the partition wall 7009, the structure and material that can be used as the partition wall 7019 in Fig. 19A can be used. Therefore, please refer to the description of partition 7019 for details.

In FIG. 19C, the source electrode or the drain electrode of the light-emitting element driving transistor 7001 is electrically connected to the first electrode 7003 through a contact hole provided in the gate insulating film 7051, the protective insulating film 7052, and the insulating film 7055. The planarization insulating film 7053 may be formed using a resin such as polyimide, acrylic, benzocyclobutene, polyamine, or epoxy. In addition to such a resin material, a low dielectric constant (low-k material), a siloxane-based resin, or the like can be used. It is noted that the planarization insulating film 7053 can be formed by stacking a plurality of insulating films formed using these materials. The method of forming the planarization insulating film 7053 is not particularly limited, and may be performed by sputtering, SOG method, spin coating, dip coating, spray coating, droplet discharge method (such as inkjet method, screen printing, or flat sheet) depending on the material. The planarization insulating film 7053 is formed by printing, or the like.

In the configuration of FIG. 19C, in order to perform full color display, the light-emitting element 7002, one of the light-emitting elements adjacent to the light-emitting element 7002, and the other of the light-emitting elements are, for example, a green light-emitting element and a red light-emitting element, respectively. And blue light-emitting elements. Alternatively, four kinds of light-emitting elements (including white light-emitting elements other than the three light-emitting elements) may be used to manufacture a light-emitting display device capable of full-color display.

In the structure of Fig. 19C, the light-emitting display device capable of full-color display can be manufactured in such a manner that all of the plurality of light-emitting elements arranged are white light-emitting elements and a color filter or the like is disposed above the light-emitting element 7002. Substrate. A full color display can be performed when a material that exhibits a single color such as white is formed and combined with a color filter or a color conversion layer.

Needless to say, the display of monochromatic light emission can also be performed. For example, white light emission may be used to form the light emitting device, or monochromatic light emission may be used to form the area color light emitting device.

An optical film such as a polarizing film including a circular polarizing plate may be provided if necessary.

It is noted that an example is described in which a transistor (light-emitting element driving transistor) that controls driving of a light-emitting element is electrically connected to the light-emitting element; however, a structure may be employed in which a current-controlled electro-crystal system is connected to a light-emitting element driving transistor Between the light emitting element.

The semiconductor device described in this embodiment is not limited to the structure shown in the drawings 19A to 19C and can be modified in various ways in accordance with the spirit of the technology of the present invention.

(Example 9)

The semiconductor device disclosed in this specification can be applied to various electronic devices (including game machines). Examples of electronic devices are televisions (also known as television or television receivers), computers or the like, cameras such as digital cameras or digital video cameras, digital photo frames, mobile phones (also known as cellular phones or mobile phones). Telephone device), portable game machine, portable information terminal, audio reproduction device, and large-sized game machine (such as Pachinko machine). Embodiments of electronic devices each including the semiconductor device described in any of the above embodiments will be described.

FIG. 20A illustrates a portable information terminal device including a main body 3001, a housing 3002, display portions 3003a and 3003b, and the like. The display unit 3003b is a panel having a touch input function. By touching the keyboard button 3004 displayed on the display portion 3003b, the screen can be operated and characters can be input. Needless to say, the display portion 3003a may be a panel having a touch input function. The liquid crystal panel or the organic light-emitting panel described in Embodiment 8 is manufactured using the transistor described in any of Embodiments 1 to 7 as a switching element, and is applied to the display portion 3003a or 3003b, thereby obtaining portable information. Terminal.

The portable information terminal device shown in FIG. 20A may have a function of displaying various information (such as still images, moving images, and text images); displaying calendar, date, time, and the like on the display portion; The function of operating or editing the information displayed on the display unit; the function of controlling the processing by various software (programs); and the like. Further, an external connection terminal such as a headphone terminal or a USB terminal, a storage medium insertion portion, and the like may be disposed on a back surface or a side surface of the housing.

The portable information terminal shown in Fig. 20A can wirelessly transmit and receive data. Through wireless communication, you can purchase and download the desired book materials or the like from the e-book server.

Further, one of the two display portions 3003a and 3003b of the portable information terminal shown in Fig. 20A can be detached as shown in Fig. 20B. The display portion 3003a can be a panel having a touch input function, which can contribute to further reduction in weight and convenience when carried, since the housing 3002 can be operated by one hand and supported by the other hand.

Further, the housing 3002 shown in Fig. 20B can be equipped with an antenna, a microphone function, or a wireless communication function for use as a mobile phone.

Figure 20C depicts an embodiment of a mobile telephone. The mobile phone 5005 shown in FIG. 20C is provided with a display portion 5001 incorporated in a casing, a display panel 5003 attached to the hinge 5002, an operation button 5004, a speaker, a microphone, and the like.

In the mobile phone 5005 shown in FIG. 20C, the display panel 5003 is slid to overlap the display portion 5001, and the display panel 5003 also functions as a cover having light transmitting properties. The display panel 5003 is a display panel including a light-emitting element having the dual-emission structure shown in FIG. 19B of Embodiment 8, in which light emission is extracted through a surface opposite to the substrate side and a surface on the substrate side.

Since the light-emitting element having the dual-emission structure is used as the display panel 5003, the display portion 5001 can be displayed under overlap; therefore, the display portion 5001 and the display panel 5003 can be displayed and the user can view the two displays. The display panel 5003 has a light transmitting property and can be seen to exceed the scene of the display panel. For example, when the map is displayed on the display unit 5001 and the position point of the user is displayed using the display panel 5003, the current position can be clearly recognized.

Further, in the case where the mobile phone 5005 is provided with an image sensor for use as a videophone, it is possible to talk with a plurality of people while displaying a plurality of faces; therefore, a video conference or the like can be performed. For example, when a face of a person or a face of a plurality of people is displayed on the display panel 5003 and the face of another person is further displayed on the display portion 5001, the user can perform a dialogue while looking at the faces of the two or more persons.

When the touch input button 5006 displayed on the display panel 5003 is touched with a finger or the like, information can be input into the mobile phone 5005. In addition, an operation such as making a call or writing can be performed by sliding the display panel 5003 and touching the operation button 5004 with a finger or the like.

Figure 20D depicts an embodiment of a television set 9600. In the television set 9600, the display portion 9603 is incorporated in the housing 9601. The display portion 9603 can display an image. Here, the casing 9601 is supported by a bracket 9605 provided with a CPU. When the transistor described in any of Embodiments 1 to 7 is applied to the display portion 9603, the television set 9600 can be obtained.

The television set 9600 can be operated by an operation switch of the cabinet 9601 or a separate remote controller. Further, the remote controller may be provided with a display portion to display the material output from the remote controller.

It is noted that the television set 9600 is provided with a receiver, a data machine, and the like. A general television broadcast can be received by using a receiver. Furthermore, when the television is wired or wirelessly connected to the communication network via the data machine, it can perform a single channel (from the transmitter to the receiver) or a dual channel (between the transmitter and the receiver, between the receivers, or Class) Information communication.

Further, the television set 9600 is provided with an external connection terminal 9604, a storage medium recording and reproducing unit 9602, and an external memory slot. The external connection terminal 9604 can be connected to various cables such as a USB cable, making it possible to communicate with a personal computer. The disc-type storage medium is inserted into the storage medium recording and reproducing unit 9602, and can perform data reading stored in the storage medium and data writing to the storage medium. Further, a pattern, a video, or the like stored as a material in the external memory 9606 inserted into the external memory slot can be displayed on the display portion 9603.

The methods, structures, and the like described in this embodiment can be combined as appropriate with any of the methods, structures, and the like described in the other embodiments.

101. . . Substrate

102. . . Oxide insulating film

103a. . . Oxide semiconductor film

103b. . . Oxide semiconductor film

103c. . . Oxide semiconductor film

104a. . . Oxide semiconductor film

104b. . . Oxide semiconductor film

104c. . . Oxide semiconductor film

105. . . Oxide semiconductor stack

105a. . . Oxide semiconductor film

105b. . . Oxide semiconductor film

105c. . . Oxide semiconductor film

106. . . electrode

107. . . Gate insulating film

108. . . Gate electrode

109. . . Insulating film

113a. . . Oxide semiconductor film

113b. . . Oxide semiconductor film

113c. . . Oxide semiconductor film

114a. . . Oxide semiconductor film

114b. . . Oxide semiconductor film

114c. . . Oxide semiconductor film

115. . . Oxide semiconductor stack

115a. . . Oxide semiconductor film

115b. . . Oxide semiconductor film

115c. . . Oxide semiconductor film

116. . . electrode

117. . . Gate insulating film

118. . . Gate electrode

119. . . Insulating film

120. . . wiring

123b. . . Oxide semiconductor film

123c. . . Oxide semiconductor film

124b. . . Oxide semiconductor film

124c. . . Oxide semiconductor film

125. . . Oxide semiconductor stack

125b. . . Oxide semiconductor film

125c. . . Oxide semiconductor film

126. . . electrode

127. . . Gate insulating film

128. . . Gate electrode

129. . . Insulating film

133b. . . Oxide semiconductor film

133c. . . Oxide semiconductor film

134b. . . Oxide semiconductor film

134c. . . Oxide semiconductor film

135. . . Oxide semiconductor stack

135b. . . Oxide semiconductor film

135c. . . Oxide semiconductor film

136. . . electrode

137. . . Gate insulating film

138. . . Gate electrode

139. . . Insulating film

147a. . . Gate insulating film

147b. . . Gate insulating film

148a. . . Gate electrode

148b. . . Gate electrode

602. . . Gate wiring

603. . . Gate wiring

616. . . Source or drain electrode

628. . . Transistor

629. . . Transistor

651. . . Liquid crystal element

652. . . Liquid crystal element

690. . . Capacitor wiring

2000. . . Crystal structure

2001. . . Crystal structure

3001. . . main body

3002. . . case

3003a. . . Display department

3003b. . . Display department

3004. . . Keyboard button

5001. . . Display department

5002. . . Hinge

5003. . . Display panel

5004. . . Operation button

5005. . . mobile phone

5006. . . Touch the input button

5300. . . Substrate

5301. . . Graphic department

5302. . . Scan line driver circuit

5303. . . Scan line driver circuit

5304. . . Signal line driver circuit

6400. . . Pixel

6401. . . Switching transistor

6402. . . Drive transistor

6403. . . Capacitor

6404. . . Light-emitting element

6405. . . Signal line

6406. . . Scanning line

6407. . . power cable

6408. . . Common electrode

7001. . . Light-emitting element driving transistor

7002. . . Light-emitting element

7003. . . electrode

7004. . . EL layer

7005. . . electrode

7009. . . partition

7010. . . Substrate

7011. . . Light-emitting element driving transistor

7012. . . Light-emitting element

7014. . . EL layer

7015. . . electrode

7016. . . membrane

7017. . . electrode

7019. . . partition

7020. . . Substrate

7021. . . Light-emitting element driving transistor

7022. . . Light-emitting element

7024. . . EL layer

7025. . . electrode

7027. . . electrode

7029. . . partition

7030. . . Oxide insulating film

7031. . . Gate insulating film

7032. . . Insulating film

7033. . . Color filter layer

7034. . . Jacket

7035. . . Protective insulating film

7040‧‧‧Oxide insulating film

7041‧‧‧gate insulating film

7042‧‧‧Insulation film

7043‧‧‧ color filter layer

7044‧‧‧ coat layer

7045‧‧‧Protective insulation film

7051‧‧‧gate insulating film

7052‧‧‧Protective insulation film

7053‧‧‧Flat insulating film

7055‧‧‧Insulation film

9600‧‧‧TV

9601‧‧‧shell

9602‧‧‧Storage Media Recording and Reproduction Department

9603‧‧‧Display Department

9604‧‧‧External connection terminal

9605‧‧‧ bracket

9606‧‧‧External memory

1A and 1B are respectively a top view and a cross-sectional view of a semiconductor device according to an embodiment of the present invention;

2A to 2C are cross-sectional views showing a method of fabricating a semiconductor device according to an embodiment of the present invention;

3A and 3B each show a crystal structure according to an embodiment of the present invention;

4A to 4C each show a crystal structure according to an embodiment of the present invention;

5A and 5B are each a HAADF-STEM image showing a crystal structure according to an embodiment;

6A and 6B are each a HAADF-STEM image showing a crystal structure according to an embodiment;

7A and 7B are respectively a top view and a cross-sectional view of a semiconductor device according to an embodiment of the present invention;

8A to 8C are cross-sectional views showing a method of fabricating a semiconductor device according to an embodiment of the present invention;

9A and 9B are respectively a top view and a cross-sectional view of a semiconductor device according to an embodiment of the present invention;

10A to 10E are cross-sectional views showing a method of fabricating a semiconductor device according to an embodiment of the present invention;

11A and 11B are respectively a top view and a cross-sectional view of a semiconductor device according to an embodiment of the present invention;

12A to 12D are cross-sectional views showing a method of fabricating a semiconductor device according to an embodiment of the present invention;

13A and 13B are respectively a top view and a cross-sectional view of a semiconductor device according to an embodiment of the present invention;

14A to 14D are cross-sectional views showing a method of fabricating a semiconductor device according to an embodiment of the present invention;

15A and 15B are respectively a top view and a cross-sectional view of a semiconductor device according to an embodiment of the present invention;

16A to 16D are cross-sectional views showing a method of fabricating a semiconductor device according to an embodiment of the present invention;

Figure 17 is a cross-sectional view showing a semiconductor device according to an embodiment of the present invention;

18A to 18C are block diagrams and circuit diagrams showing an embodiment of the present invention;

19A to 19C are each a cross-sectional view showing an embodiment of the present invention; and

20A to 20D each illustrate an embodiment of an electronic device.

101. . . Substrate

102. . . Oxide insulating film

105. . . Oxide semiconductor stack

105a. . . Oxide semiconductor film

105b. . . Oxide semiconductor film

106. . . electrode

107. . . Gate insulating film

108. . . Gate electrode

109. . . Insulating film

Claims (22)

  1. A semiconductor device comprising: a first insulating film; a second insulating film overlapping the first insulating film; a stack of semiconductor films sandwiched between the first insulating film and the second insulating film, the semiconductor film The stack includes: a first oxide semiconductor film; and a second oxide semiconductor film contacting the first oxide semiconductor film and interposed between the first oxide semiconductor film and the second insulating film; a third oxide semiconductor film between the second oxide semiconductor film and the second insulating film; and a conductive film overlapping the stack of the semiconductor film with the second insulating film interposed therebetween, wherein the second oxide The nitrogen concentration of the semiconductor film is higher than the nitrogen concentration of the first oxide semiconductor film, and the nitrogen concentration of the second oxide semiconductor film is higher than the nitrogen concentration of the third oxide semiconductor film.
  2. A semiconductor device comprising: a first insulating film; a second insulating film overlapping the first insulating film; a stack of semiconductor films sandwiched between the first insulating film and the second insulating film, the semiconductor film The stack includes: a first oxide semiconductor film; a second oxide semiconductor film on and in contact with the first oxide semiconductor film; on the second oxide semiconductor film and in contact therewith and sandwiched between the second oxide semiconductor film and the second insulating film a third oxide semiconductor film; and a conductive film overlapping the stack of the semiconductor film with the second insulating film interposed therebetween, wherein the second oxide semiconductor film has a higher nitrogen concentration than the first oxide The nitrogen concentration of the semiconductor film.
  3. A semiconductor device comprising: a first insulating film; a second insulating film overlapping the first insulating film; a stack of semiconductor films sandwiched between the first insulating film and the second insulating film, the semiconductor film The stack includes: a first oxide semiconductor film having a first crystal structure; and a second oxide semiconductor film having a second crystal structure that contacts the first oxide semiconductor film and is sandwiched between the first oxide semiconductor film Between the second insulating film; a third oxide semiconductor film having a third crystal structure interposed between the second oxide semiconductor film and the second insulating film; and overlapping with the stack of the semiconductor film a conductive film sandwiching the second insulating film, wherein the first crystal structure is a deformed structure of a non-wurtzite structure or a non-wurtzite structure, Wherein the third crystal structure is a deformed structure of a non-wurtzite structure or a non-wurtzite structure, and wherein the second crystal structure is a wurtzite structure.
  4. The application of the semiconductor device according to item 3 patentable scope, wherein the first crystal structure YbFe 2 O 4 structure, Yb 2 Fe 3 O 7 structure, YbFe 2 O 4 structure deformable structure, and Yb 2 Fe 3 O 7 One of the structural deformation structures.
  5. The semiconductor device according to claim 3, wherein the second oxide semiconductor film has a nitrogen concentration higher than a nitrogen concentration of the first oxide semiconductor film.
  6. The semiconductor device according to claim 3, wherein the first crystal structure is a YbFe 2 O 4 structure, a Yb 2 Fe 3 O 7 structure, a deformed structure of a YbFe 2 O 4 structure, and Yb 2 Fe 3 O 7 One of the deformed structures.
  7. The semiconductor device according to any one of claims 1 to 3, wherein the first oxide semiconductor film has a triangular or hexagonal structure film.
  8. The semiconductor device according to any one of claims 1 to 3, wherein the first oxide semiconductor film and the second oxide semiconductor film are non-single crystal and comprise an amorphous region and have c-axis alignment Crystallized area.
  9. The semiconductor device according to any one of claims 1 to 3, Wherein the first oxide semiconductor film contains zinc, indium, or gallium.
  10. The semiconductor device according to any one of claims 1 to 3, wherein the second oxide semiconductor film is a zinc oxide or oxynitride semiconductor.
  11. An electronic device comprising the semiconductor device according to any one of claims 1 to 3.
  12. A method of fabricating a semiconductor device, the method comprising the steps of: providing a substrate having an electrically insulating top surface; forming a first oxide semiconductor film over the substrate in a first ambient environment; having a higher than the first ambient environment Forming a second oxide semiconductor film in contact with the first oxide semiconductor film in the second surrounding environment of the concentration of nitrogen; performing heat treatment on the first oxide semiconductor film and the second oxide semiconductor film to cause the The first oxide semiconductor film is crystallized into a first crystal structure, and the second oxide semiconductor film is crystallized into a second crystal structure different from the first crystal structure; a second contact is formed on the second oxide semiconductor film a trioxide semiconductor film; and performing an additional heat treatment on the third oxide semiconductor film to crystallize the third oxide semiconductor film into a third crystal structure; wherein a nitrogen concentration of the second oxide semiconductor film is higher than the first Oxidation The nitrogen concentration of the semiconductor film, wherein the nitrogen concentration of the second oxide semiconductor film is higher than the nitrogen concentration of the third oxide semiconductor film.
  13. A method of fabricating a semiconductor device, the method comprising the steps of: providing a substrate having an electrically insulating top surface; forming a first oxide semiconductor film over the substrate in a first ambient environment; having a higher than the first ambient environment a second oxide semiconductor film in contact with the first oxide semiconductor film is formed on the first oxide semiconductor film in a second surrounding environment of a concentration of nitrogen; a third oxide semiconductor film in contact therewith is formed on the second oxide semiconductor film; The first oxide semiconductor film and the second oxide semiconductor film perform heat treatment to crystallize the first oxide semiconductor film into a first crystal structure, and the second oxide semiconductor film is crystallized to be different from the first crystal structure a second crystal structure; wherein a nitrogen concentration of the second oxide semiconductor film is higher than a nitrogen concentration of the first oxide semiconductor film.
  14. A method of fabricating a semiconductor device, the method comprising the steps of: providing a substrate having an electrically insulating top surface; forming a first oxide semiconductor film over the substrate in a first ambient environment; Forming a second oxide semiconductor film in contact with the first oxide semiconductor film in a second surrounding environment having a higher concentration of nitrogen than the first surrounding environment; the first oxide semiconductor film and the first The dioxide semiconductor film performs heat treatment to crystallize the first oxide semiconductor film into a first crystal structure, and the second oxide semiconductor film is crystallized into a second crystal structure; forming contact with the second oxide semiconductor film on the second oxide semiconductor film a third oxide semiconductor film; and performing an additional heat treatment on the third oxide semiconductor film to crystallize the third oxide semiconductor film into a third crystal structure, wherein the first crystal structure is a non-wurtzite structure or a deformed structure of the non-wurtzite structure, wherein the second crystal structure is a wurtzite structure, and wherein the third crystal structure is a deformed structure of a non-wurtzite structure or a non-wurtzite structure.
  15. The method of manufacturing a semiconductor device according to claim 14, wherein the first crystal structure is a YbFe 2 O 4 structure, a Yb 2 Fe 3 O 7 structure, a YbFe 2 O 4 structure deformed structure, and Yb 2 Fe One of the deformed structures of 3 O 7 .
  16. The method of manufacturing a semiconductor device according to claim 14, wherein the second oxide semiconductor film has a nitrogen concentration higher than a nitrogen concentration of the first oxide semiconductor film.
  17. The method of manufacturing a semiconductor device according to claim 14, wherein the third crystal structure is a YbFe 2 O 4 structure, a Yb 2 Fe 3 O 7 structure, a YbFe 2 O 4 structure deformed structure, and Yb 2 Fe One of the deformed structures of 3 O 7 .
  18. The method of manufacturing a semiconductor device according to any one of claims 12 to 14, wherein the first oxide semiconductor film has a triangular or hexagonal structure film.
  19. The method of manufacturing a semiconductor device according to any one of claims 12 to 14, wherein the first oxide semiconductor film and the second oxide semiconductor film are non-single crystal, and comprise an amorphous region and have c The crystallization area where the axes are aligned.
  20. The method of manufacturing a semiconductor device according to any one of claims 12 to 14, wherein the first oxide semiconductor film comprises zinc, indium, or gallium.
  21. The method of manufacturing a semiconductor device according to any one of claims 12 to 14, wherein the second oxide semiconductor film is a zinc oxide or oxynitride semiconductor.
  22. The method of manufacturing a semiconductor device according to any one of claims 12 to 14, wherein the first oxide semiconductor film and the second oxide semiconductor film are successively formed by sputtering; Wherein after the first oxide semiconductor film has been formed, nitrogen is introduced into the formation chamber to form the second oxide semiconductor film.
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