TWI454192B - 具有電子元件之印刷電路板的製造方法 - Google Patents
具有電子元件之印刷電路板的製造方法 Download PDFInfo
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- TWI454192B TWI454192B TW098100402A TW98100402A TWI454192B TW I454192 B TWI454192 B TW I454192B TW 098100402 A TW098100402 A TW 098100402A TW 98100402 A TW98100402 A TW 98100402A TW I454192 B TWI454192 B TW I454192B
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- insulating resin
- electronic component
- insulator
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- 238000004519 manufacturing process Methods 0.000 title claims description 16
- 229920005989 resin Polymers 0.000 claims description 49
- 239000011347 resin Substances 0.000 claims description 49
- 239000012212 insulator Substances 0.000 claims description 26
- 238000000034 method Methods 0.000 claims description 24
- 229920006395 saturated elastomer Polymers 0.000 claims description 4
- 239000003822 epoxy resin Substances 0.000 claims description 3
- 239000011521 glass Substances 0.000 claims description 3
- 238000010030 laminating Methods 0.000 claims description 3
- 229920000647 polyepoxide Polymers 0.000 claims description 3
- 239000010410 layer Substances 0.000 description 12
- 239000000945 filler Substances 0.000 description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 238000003475 lamination Methods 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
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- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 239000011889 copper foil Substances 0.000 description 2
- 238000005553 drilling Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000000149 penetrating effect Effects 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 1
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- 238000009413 insulation Methods 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
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- 229910052751 metal Inorganic materials 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 229920003217 poly(methylsilsesquioxane) Polymers 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
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- H—ELECTRICITY
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- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
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Description
本發明係關於具有電子元件於其中之印刷電路板的製造方法。
隨著電子元件變得更小與更密,接合這樣的電子元件到封裝件的技術已經進展且發展以應付更精細的圖案。打線接合的傳統接合方法的技術正被發展,以使電子元件被黏附到具有間距約40-50μm的焊墊。
即使目前發展出的安裝電子元件的技術係藉由傳統的雷射方法或使用凸塊之覆晶方法來應付精細圖案,設備及其方法會造成限制。
在基材(其中電子部件特別是藉由雷射方法被安裝在基材中)中實施精細間距的關鍵條件為獲得一中間層以及一絕緣距離,以將用於內連線之介層洞的尺寸減到最小,即將絕緣層的厚度減到最小。然而,藉由截至現今已知的技術來處理約100μm之間距可能的。
此外,當雷射束被用來將一電子元件連接到一基材時,層(其中該電子元件被安裝在該層中)中的上與下電路僅執行此層之上與下部的對準以及電氣連接的功能。因此,電路被包括在產品中作為一種裸電路。故,電路不適合用來製造更小且更密的產品。
本發明係提供一種具有電子元件於其中之印刷電路板的製造方法,藉由獲得一中間層以及將一介層洞的尺寸減到最小可以使其更小且更密,而在印刷電路板中具有電子元件時不需要多餘的電路構件。
本發明之一態樣的特徵在於一種具有一電子元件於其中之印刷電路板的製造方法。根據本發明之一實施例,該方法包含:設置一電子元件於一接合薄板之上側上,一電極形成在該電子元件之上側上;設置一絕緣體於該接合薄板之上側上,一相應於該電子元件之凹部係已形成在該絕緣體中;將一第一絕緣樹脂層壓在該絕緣體之上側上,從而覆蓋住該電子元件之上側;研磨該第一絕緣樹脂,從而暴露出該電極;以及形成一第一電路圖案於該研磨的第一絕緣樹脂上,該第一電路圖案係電氣連接到該暴露出的電極。
該方法可以更包含:形成一介層洞,該介層洞從該第一絕緣樹脂穿過該接合薄板;以及形成一第二電路圖案於該接合薄板之下側上。
該方法可以更包含:將一第二絕緣樹脂層壓在該接合薄板之下側上;形成一介層洞,該介層洞從該第一絕緣樹脂穿過該第二絕緣樹脂;以及形成一第二電路圖案於該第二絕緣樹脂之下側上。
該第一絕緣樹脂可以比該第二絕緣樹脂更厚。
該接合薄板可以由一玻璃纖維飽和之環氧樹脂所製成。其內已形成有凹部之該絕緣體可以處於一硬化狀態(C-階段)。
由於本發明具有各種變化與實施例,特定實施例將參照附圖來繪示且敘述。然而,這並不會將本發明限制在特定實施例,並且應被解讀成包括本發明之精神與範圍所涵蓋的所有變化、均等物與替代物。在以下的本發明敘述中,因已知技術的詳細敘述會使標的主體模糊,故在此將其省略。
諸如“第一”與“第二”之術語係用以描述各種構件,但該些構件不應被限制在該些術語。該些術語僅被用以區分各構件。
本文使用的術語僅用以描述特定實施例,且不會限制本發明。除非清楚指明,單數的表示法包括複數意義。在本文中,諸如“包含”或“包括”的表示法係用以指定一特徵、一數目、一步驟、一操作、一構件、一部分、或上述組合,且不應被解讀成排除任何一或多個其他特徵、數目、步驟、操作、構件、部分、或上述組合的存在或可能性。
以下,根據本發明之具有電子元件之印刷電路板的製造方法的實施例將藉由參照附圖來詳細地敘述。在參照附圖的敘述中,相同或對應的構件將使用相同的元件符號,並且將省略其重複的敘述。
第1圖為一流程圖,其顯示根據本發明第一實施例之具有電子元件之印刷電路板的製造方法。第2-10圖為示意圖,其顯示根據本發明第一實施例之具有電子元件之印刷電路板的製造方法。在第2-10圖中,所繪示之元件符號為:電子元件10a、10b與10c;電極11a、11b與11c;焊墊20;絕緣體30;凹部32;第一絕緣樹脂41;第二絕緣樹脂42;第一電路圖案51;第二電路圖案52;介層洞53;以及介層填料54。
首先,如第5圖所示,具有電極形成於其上側之電子元件係座落在接合薄板20的上側(S110)。座落在接合薄板20上之電子元件可以是一被動元件10a(其具有電極11a形成在其兩側,如第2圖所示)、一主動元件10b(其上形成有一由銅或金製成之桿狀電極11b,如第3圖所示)、以及一主動元件10c(其上形成有一由銅或金製成之柱狀電極11c,如第4圖所示)。此外,若電極被形成為其比電子元件之最外表面更高,可以使用任何種類的電子元件。
當一材料被硬化時其流動性適於固定電子部件的該材料(例如玻璃纖維飽和之環氧樹脂)得以被用作為接合薄板20,其中電子元件10a、10b與10c座落在該接合薄板20上。透過使用這樣的材料,避免在後續製程中電子元件10a、10b與10c之位置會改變是可行的,藉此獲得更高的可靠度。
接合薄板20的厚度可以為約20-40μm,或20μm或更小。
接著,如第6圖所示,絕緣體30座落在接合薄板20之上側,其中相應於電子元件10b的凹部32被形成在絕緣體30中(S120)。儘管絕緣體的厚度是根據電子元件10b的厚度來決定,若包括電極之電子元件的厚度為約50μm,則絕緣體30的厚度可以為約40μm。
在此,具有凹部32形成於其中的絕緣體30可以處於硬化狀態(即C-階段)。即使進行後續製程(諸如層壓(lamination)),此空隙可以藉由使用處於C-階段的絕緣體30來維持,因而更容易獲得高可靠度。
這樣的絕緣體30可以藉由處理一覆銅箔層壓板(copper-clad laminate;CCL)(未示出)之兩側上凹部32以及接著藉由蝕刻CCL之兩側上的整個銅箔來製造。絕緣體30也可以藉由在一絕緣材料(未示出)上形成凹部來製造,其中該絕緣材料在其上沒有形成金屬箔。
接著,如第7圖所示,第一絕緣樹脂41被層壓在絕緣體30之上側上從而覆蓋住電子元件10b之上側(S130),並且第二絕緣樹脂42被層壓在接合薄板20之下側上(S140)。第一絕緣樹脂41與第二絕緣樹脂42之層壓可以經由單個製程而同時地來執行或依序地來執行。
同時,考量到要以絕緣樹脂來填滿凹部32,第一絕緣樹脂41可以比第二絕緣樹脂42更厚。例如,被層壓在絕緣體30之上側上的第一絕緣樹脂41可以具有約40μm的厚度,並且被層壓在接合薄板20之下側上的第二絕緣樹脂42可以具有約20μm的厚度。
純的樹脂材料(其未以玻璃樹脂來飽和)可以被用作為第一絕緣樹脂41,以減少損壞電子元件10b之電極11b的可能性。視電極的形狀而定來使用典型的預浸材(prepreg)也是可行的。
然後,如第8圖所示,一穿過絕緣體的介層洞53被形成(S150)。介層洞53係被提供用以在介於第二電路圖案52與第一電路圖案51之間實施一中間層貫穿,其在下文將進一步描述。介層洞可以藉由雷射鑽孔或機械鑽孔的方式來形成。
之後,如第9圖所示,研磨第一絕緣樹脂41從而暴露出電極11b(S160)。可以藉由諸如電漿蝕刻或除污製程(desmear process)來研磨該第一絕緣樹脂41。
如第10圖所示,在暴露出電極11b之後,第一電路圖案51被形成在經研磨的第一絕緣樹脂41上,其中該第一電路圖案51係電氣地連接到暴露出的電極11b(S170)。第二電路圖案52被形成在第二絕緣樹脂42上(S180)。藉由在介層洞53(其已形成)內形成導電材料以及藉由形成第一電路圖案51和第二電路圖案52來形成一介層填料54也是可行的,其中該介層填料54係電氣連接第一電路圖案51和第二電路圖案52。
因此,根據本發明之此實施例,第一電路圖案51被形成在處於電極11b暴露出之狀態的第一絕緣樹脂41上,因而能容易地獲得高可靠度。此外,內層電路51與52直接地被形成在具有電子元件10b安裝於其中之內層中,因而可以製造具有兩層結構之薄印刷電路板。
以下,將描述一種根據本發明第二實施例之具有電子元件之印刷電路板的製造方法。
第11圖為一流程圖,其顯示根據本發明第二實施例之具有電子元件之印刷電路板的製造方法。第12-15圖為示意圖,其顯示根據本發明第二實施例之具有電子元件之印刷電路板的製造方法。在第12-15圖中,所繪示之元件符號為:電子元件10a、10b與10c;電極11a、11b與11c;焊墊20;絕緣體30;凹部32;第一絕緣樹脂41;第一電路圖案51;第二電路圖案52;介層洞53;以及介層填料54。
相較於前述實施例,本發明之此實施例的特徵在於省略第二絕緣樹脂42之層壓,並且第二電路圖案52直接地被形成在接合薄板20上。此意謂著由於接合薄板20也可以執行絕緣樹脂的功能,當考量厚度控制或可靠度的問題為目的時,不使用個別的第二絕緣樹脂42是可行的。故,在本發明之此實施例中,將省略與前述實施例相同的敘述的部分,並且僅描述差異。
首先,如同第一實施例,具有電極11b形成於其上側之電子元件係座落在接合薄板20的上側(S210)。絕緣體30座落在接合薄板20之上側,其中絕緣體30具有相應於電子元件10b的凹部32(S220)。第一絕緣樹脂41被層壓在絕緣體30之上側上從而覆蓋住電子元件1Ob之上側(S230)。經由此程序來層壓之第一絕緣樹脂41係顯示在第12圖。此程序可以被用來在典型電路板中實施一電路圖案。然而,在一些情況中,當層壓該第一絕緣樹脂41時,藉由將一銅箔層壓在接合薄板20之下側(其位在上側的對面)上以形成一電路是可行的。
然後,如第13圖所示,一穿過絕緣體的介層洞53被形成(S240)。如第14圖所示,研磨第一絕緣樹脂41從而暴露出電極11b(S250)。如先前實施例所述,可以藉由諸如電漿蝕刻或除污製程(desmear process)來研磨該第一絕緣樹脂41。
如第15圖所示,在暴露出電極11b之後,第一電路圖案51被形成在經研磨的第一絕緣樹脂41上,其中該第一電路圖案51係電氣地連接到暴露出的電極11b(S260)。第二電路圖案52被形成在接合薄板20之下側上(S270)。藉由在介層洞53(其已形成)內形成導電材料以及藉由形成第一電路圖案51和第二電路圖案52來形成一介層填料54也是可行的,其中該介層填料54係電氣連接第一電路圖案51和第二電路圖案52。
如同前述實施例呈現的結構,經由此實施例之製程製造的結構能容易地獲得高可靠度。此外,內層電路51與52直接地被形成在具有電子元件10b安裝於其中之內層中,因而製造具有兩層結構之薄印刷電路板是可行的。
儘管本發明之特定實施例已如上敘述,應瞭解在不脫離本發明之精神與範圍下,熟悉此技藝之人士可以構想出各種變化與變更的形式與細節,本發明之範圍係由隨附申請專利範圍來確定。
除了前述實施例以外之各種實施例被涵蓋在本發明之申請專利範圍內。
S110-S180...步驟
S210-S270...步驟
10a、10b、10c...電子元件
11a、11b、11c...電極
20...焊墊
30...絕緣體
32...凹部
41...第一絕緣樹脂
42...第二絕緣樹脂
51...第一電路圖案
52...第二電路圖案
53...介層洞
54...介層填料
第1圖為一流程圖,其顯示根據本發明第一實施例之具有電子元件之印刷電路板的製造方法。
第2-10圖為示意圖,其顯示根據本發明第一實施例之具有電子元件之印刷電路板的製造方法。
第11圖為一流程圖,其顯示根據本發明第二實施例之具有電子元件之印刷電路板的製造方法。
第12-15圖為示意圖,其顯示根據本發明第二實施例之具有電子元件之印刷電路板的製造方法。
S110-S180...步驟
Claims (4)
- 一種具有一電子元件之印刷電路板的製造方法,該方法包含下列步驟:設置一電子元件於一接合薄板之上側上,一電極形成在該電子元件之上側上;設置一絕緣體於該接合薄板之上側上,一相應於該電子元件之凹部係已形成在該絕緣體中;將一第一絕緣樹脂層壓在該絕緣體之上側上,從而覆蓋住該電子元件之上側;研磨該第一絕緣樹脂,從而暴露出該電極;形成一第一電路圖案於該研磨的第一絕緣樹脂上,該第一電路圖案係電氣連接到該暴露出的電極;以及形成一第二電路圖案於該接合薄板之下側上,而該方法進一步包含形成一介層洞,該介層洞從該第一絕緣樹脂穿過該接合薄板,以及其中該接合薄板係由一玻璃纖維飽和之環氧樹脂所製成。
- 如申請專利範圍第1項所述之方法,更包含:將一第二絕緣樹脂層壓在該接合薄板之下側上,其中該介層洞從該第一絕緣樹脂穿過該接合薄板以及該第二絕緣樹脂。
- 如申請專利範圍第2項所述之方法,其中該第一絕緣樹脂比該第二絕緣樹脂更厚。
- 如申請專利範圍第1項所述之方法,其中其內已形成有凹部之該絕緣體處於一硬化狀態(C-階段)。
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TWI288760B (en) * | 2000-12-08 | 2007-10-21 | Mitsui Mining & Smelting Co | Resin compound for fabricating interlayer dielectric of printed wiring board, resin sheet and resin applied-copper foil for forming insulating layer using the resin compound, and copper-clad laminate using them |
TWI279174B (en) * | 2003-09-24 | 2007-04-11 | Mitsui Mining & Smelting Co | Manufacturing method of PCB, and PCB obtained thereby |
Also Published As
Publication number | Publication date |
---|---|
KR100982795B1 (ko) | 2010-09-16 |
JP5219276B2 (ja) | 2013-06-26 |
US20100006203A1 (en) | 2010-01-14 |
JP2010021516A (ja) | 2010-01-28 |
US8206530B2 (en) | 2012-06-26 |
KR20100006685A (ko) | 2010-01-21 |
TW201004504A (en) | 2010-01-16 |
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