TWI221712B - Skew adjustment circuit, skew adjustment method, data synchronization circuit, and data synchronization method - Google Patents
Skew adjustment circuit, skew adjustment method, data synchronization circuit, and data synchronization method Download PDFInfo
- Publication number
- TWI221712B TWI221712B TW091110262A TW91110262A TWI221712B TW I221712 B TWI221712 B TW I221712B TW 091110262 A TW091110262 A TW 091110262A TW 91110262 A TW91110262 A TW 91110262A TW I221712 B TWI221712 B TW I221712B
- Authority
- TW
- Taiwan
- Prior art keywords
- data
- bit
- serial data
- mth
- signal
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals
- H04L7/0338—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals the correction of the phase error being performed by a feed forward loop
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/14—Channel dividing arrangements, i.e. in which a single bit stream is divided between several baseband channels and reassembled at the receiver
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/04—Speed or phase control by synchronisation signals
- H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal
- H04L7/046—Speed or phase control by synchronisation signals using special codes as synchronising signal using a dotting sequence
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Power Engineering (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Editing Of Facsimile Originals (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2001350453 | 2001-11-15 | ||
JP2002062313A JP3671920B2 (ja) | 2001-11-15 | 2002-03-07 | スキュー調整回路及びスキュー調整方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
TWI221712B true TWI221712B (en) | 2004-10-01 |
Family
ID=26624536
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW091110262A TWI221712B (en) | 2001-11-15 | 2002-05-16 | Skew adjustment circuit, skew adjustment method, data synchronization circuit, and data synchronization method |
Country Status (6)
Country | Link |
---|---|
US (1) | US7340655B2 (ko) |
EP (1) | EP1313257A1 (ko) |
JP (1) | JP3671920B2 (ko) |
KR (1) | KR100563160B1 (ko) |
CN (1) | CN1307504C (ko) |
TW (1) | TWI221712B (ko) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI404012B (zh) * | 2009-07-01 | 2013-08-01 | Mstar Semiconductor Inc | 顯示控制器及其影像信號傳送方法與系統 |
Families Citing this family (36)
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JP3854883B2 (ja) | 2002-03-22 | 2006-12-06 | 株式会社リコー | ビット同期回路及び半導体装置 |
TWI298223B (en) * | 2002-11-04 | 2008-06-21 | Mstar Semiconductor Inc | Data recovery circuit, phase detection circuit and method for detecting and correcting phase conditions |
US7198197B2 (en) * | 2002-11-05 | 2007-04-03 | Rambus, Inc. | Method and apparatus for data acquisition |
JP3807406B2 (ja) * | 2003-09-05 | 2006-08-09 | セイコーエプソン株式会社 | データ転送制御装置及び電子機器 |
JP3891185B2 (ja) | 2003-09-05 | 2007-03-14 | セイコーエプソン株式会社 | レシーバ回路、インターフェース回路、及び電子機器 |
US7171321B2 (en) | 2004-08-20 | 2007-01-30 | Rambus Inc. | Individual data line strobe-offset control in memory systems |
JP4533715B2 (ja) * | 2004-10-07 | 2010-09-01 | 川崎マイクロエレクトロニクス株式会社 | 位相比較器 |
US7543172B2 (en) | 2004-12-21 | 2009-06-02 | Rambus Inc. | Strobe masking in a signaling system having multiple clock domains |
CN101088244A (zh) | 2004-12-23 | 2007-12-12 | 皇家飞利浦电子股份有限公司 | 用于接收和/或用于解码数据信号的接口电路及方法 |
JP4498954B2 (ja) * | 2005-03-04 | 2010-07-07 | 日本電信電話株式会社 | 位相検出回路 |
US7688672B2 (en) * | 2005-03-14 | 2010-03-30 | Rambus Inc. | Self-timed interface for strobe-based systems |
US7436919B2 (en) | 2005-04-01 | 2008-10-14 | Freescale Semiconductor, Inc. | Methods and apparatus for bit synchronizing data transferred across a multi-pin asynchronous serial interface |
US7936793B2 (en) * | 2005-04-01 | 2011-05-03 | Freescale Semiconductor, Inc. | Methods and apparatus for synchronizing data transferred across a multi-pin asynchronous serial interface |
JP4920225B2 (ja) * | 2005-09-26 | 2012-04-18 | ローム株式会社 | データ再生回路、およびそれを搭載した電子機器 |
US8121237B2 (en) | 2006-03-16 | 2012-02-21 | Rambus Inc. | Signaling system with adaptive timing calibration |
JP5061498B2 (ja) | 2006-04-28 | 2012-10-31 | 富士通株式会社 | ジッタ補正方法及び回路 |
KR100780952B1 (ko) * | 2006-06-27 | 2007-12-03 | 삼성전자주식회사 | 디스큐 장치 및 방법, 그리고 이를 이용한 데이터 수신장치및 방법 |
US7450039B2 (en) | 2006-07-05 | 2008-11-11 | Silicon Library Inc. | Transmission device and electronic apparatus with self-diagnostic function, and self-diagnostic method for use therein |
US7587650B2 (en) * | 2006-12-08 | 2009-09-08 | Intel Corporation | Clock jitter detector |
US8237773B2 (en) * | 2007-04-20 | 2012-08-07 | Sony Corporation | Communication system and method, sending apparatus and method, receiving apparatus and method, and program |
WO2009069244A1 (ja) * | 2007-11-30 | 2009-06-04 | Panasonic Corporation | 送信方法および送信装置 |
US8139697B2 (en) * | 2008-01-29 | 2012-03-20 | United Microelectronics Corp. | Sampling method and data recovery circuit using the same |
US8219846B2 (en) * | 2008-05-20 | 2012-07-10 | Xilinx, Inc. | Circuit for and method of receiving video data |
US8094766B2 (en) * | 2008-07-02 | 2012-01-10 | Teradyne, Inc. | Tracker circuit and method for automated test equipment systems |
US8281065B2 (en) * | 2009-09-01 | 2012-10-02 | Apple Inc. | Systems and methods for determining the status of memory locations in a non-volatile memory |
WO2011043398A1 (ja) | 2009-10-09 | 2011-04-14 | 三菱電機株式会社 | 差動符号光送受信装置 |
KR101076109B1 (ko) | 2010-08-10 | 2011-10-21 | 세종대학교산학협력단 | 패턴 삽입을 이용한 수신 데이터의 스큐 보정 방법 및 그 장치 |
TWI423588B (zh) | 2010-12-23 | 2014-01-11 | Ind Tech Res Inst | 位準變遷判斷電路及其方法 |
TWI406504B (zh) * | 2010-12-30 | 2013-08-21 | Sunplus Technology Co Ltd | 利用過取樣的資料回復裝置及其方法 |
TWI487302B (zh) * | 2011-10-12 | 2015-06-01 | Raydium Semiconductor Corp | 串列資料流的取樣時脈選擇方法 |
JP5799320B1 (ja) * | 2014-03-31 | 2015-10-21 | 株式会社アクセル | 画像データ伝送制御方法及び画像表示処理装置 |
JP5883101B1 (ja) * | 2014-09-29 | 2016-03-09 | ファナック株式会社 | データ再生回路 |
CN105893291B (zh) * | 2014-11-18 | 2020-06-09 | 刘伯安 | 一种异步接收串行数据的方法及装置 |
KR101729864B1 (ko) * | 2015-11-25 | 2017-04-24 | 주식회사 긱옵틱스테라스퀘어코리아 | 고속 데이터의 신호 검출을 위한 신호 검출기 및 그 방법 |
WO2018225533A1 (ja) | 2017-06-09 | 2018-12-13 | ソニーセミコンダクタソリューションズ株式会社 | 送信装置、受信装置、制御方法、プログラム、および送受信システム |
CN113891448B (zh) * | 2021-09-15 | 2024-02-27 | 国网福建省电力有限公司福州供电公司 | 一种自组网通信方法及终端 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0744533B2 (ja) | 1985-12-30 | 1995-05-15 | 株式会社富士通ゼネラル | デ−タ抜取クロツク発生回路 |
EP0520127A1 (en) * | 1991-06-28 | 1992-12-30 | ALCATEL BELL Naamloze Vennootschap | Digital synchronizing arrangement using a tuned tapped delay line |
US5712884A (en) * | 1995-03-31 | 1998-01-27 | Samsung Electronics Co., Ltd. | Data receiving method and circuit of digital communication system |
US5905769A (en) * | 1996-05-07 | 1999-05-18 | Silicon Image, Inc. | System and method for high-speed skew-insensitive multi-channel data transmission |
CA2365608C (en) * | 1996-05-07 | 2005-06-14 | Silicon Image, Inc. | System and method for high-speed skew-insensitive multi-channel data transmission |
JP3438529B2 (ja) | 1997-05-22 | 2003-08-18 | 三菱電機株式会社 | ビット同期方式 |
US6374361B1 (en) * | 1998-04-23 | 2002-04-16 | Silicon Image, Inc. | Skew-insensitive low voltage differential receiver |
US6510503B2 (en) * | 1998-07-27 | 2003-01-21 | Mosaid Technologies Incorporated | High bandwidth memory interface |
JP2000174736A (ja) | 1998-12-08 | 2000-06-23 | Sharp Corp | ビット同期回路 |
US6735710B1 (en) * | 1999-09-09 | 2004-05-11 | Matsushita Electric Industrial Co., Ltd. | Clock extraction device |
US6498824B1 (en) * | 1999-09-27 | 2002-12-24 | Intel Corporation | Phase control signals for clock recovery circuits |
KR100346837B1 (ko) | 2000-09-02 | 2002-08-03 | 삼성전자 주식회사 | 클럭 스큐에 의한 에러를 최소화하는 데이타 복원 장치 및그 방법 |
US6907552B2 (en) * | 2001-08-29 | 2005-06-14 | Tricn Inc. | Relative dynamic skew compensation of parallel data lines |
-
2002
- 2002-03-07 JP JP2002062313A patent/JP3671920B2/ja not_active Expired - Fee Related
- 2002-05-16 TW TW091110262A patent/TWI221712B/zh not_active IP Right Cessation
- 2002-05-18 KR KR1020020027619A patent/KR100563160B1/ko not_active IP Right Cessation
- 2002-05-20 CN CNB021401039A patent/CN1307504C/zh not_active Expired - Fee Related
- 2002-06-10 US US10/164,374 patent/US7340655B2/en not_active Expired - Fee Related
- 2002-06-11 EP EP02012872A patent/EP1313257A1/en not_active Withdrawn
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI404012B (zh) * | 2009-07-01 | 2013-08-01 | Mstar Semiconductor Inc | 顯示控制器及其影像信號傳送方法與系統 |
Also Published As
Publication number | Publication date |
---|---|
JP3671920B2 (ja) | 2005-07-13 |
KR100563160B1 (ko) | 2006-03-22 |
CN1307504C (zh) | 2007-03-28 |
JP2003218843A (ja) | 2003-07-31 |
CN1420406A (zh) | 2003-05-28 |
US7340655B2 (en) | 2008-03-04 |
KR20030040002A (ko) | 2003-05-22 |
US20030091136A1 (en) | 2003-05-15 |
EP1313257A1 (en) | 2003-05-21 |
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Legal Events
Date | Code | Title | Description |
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MM4A | Annulment or lapse of patent due to non-payment of fees |