WO2009069244A1 - 送信方法および送信装置 - Google Patents
送信方法および送信装置 Download PDFInfo
- Publication number
- WO2009069244A1 WO2009069244A1 PCT/JP2008/002476 JP2008002476W WO2009069244A1 WO 2009069244 A1 WO2009069244 A1 WO 2009069244A1 JP 2008002476 W JP2008002476 W JP 2008002476W WO 2009069244 A1 WO2009069244 A1 WO 2009069244A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- transmission
- clock
- data
- circuit
- phase
- Prior art date
Links
- 230000005540 biological transmission Effects 0.000 title abstract 12
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0091—Transmitter details
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
- H04L7/033—Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
- H04L7/0337—Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009543645A JPWO2009069244A1 (ja) | 2007-11-30 | 2008-09-08 | 送信方法および送信装置 |
CN200880117662A CN101874380A (zh) | 2007-11-30 | 2008-09-08 | 发送方法以及发送装置 |
US12/790,274 US20100239059A1 (en) | 2007-11-30 | 2010-05-28 | Transmission method and transmission apparatus |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007310806 | 2007-11-30 | ||
JP2007-310806 | 2007-11-30 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US12/790,274 Continuation US20100239059A1 (en) | 2007-11-30 | 2010-05-28 | Transmission method and transmission apparatus |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2009069244A1 true WO2009069244A1 (ja) | 2009-06-04 |
Family
ID=40678160
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2008/002476 WO2009069244A1 (ja) | 2007-11-30 | 2008-09-08 | 送信方法および送信装置 |
Country Status (4)
Country | Link |
---|---|
US (1) | US20100239059A1 (ja) |
JP (1) | JPWO2009069244A1 (ja) |
CN (1) | CN101874380A (ja) |
WO (1) | WO2009069244A1 (ja) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012060677A (ja) * | 2007-12-14 | 2012-03-22 | Mosaid Technologies Inc | 複数のデバイスおよび柔軟なデータ整列を用いるメモリコントローラを有するシステムにおけるクロック再生およびタイミング方法 |
WO2013065208A1 (ja) * | 2011-11-04 | 2013-05-10 | パナソニック株式会社 | タイミングリカバリ回路およびそれを備えたレシーバ回路 |
US8781053B2 (en) | 2007-12-14 | 2014-07-15 | Conversant Intellectual Property Management Incorporated | Clock reproducing and timing method in a system having a plurality of devices |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20150078405A1 (en) * | 2013-09-18 | 2015-03-19 | Alcatel Lucent Canada Inc. | Monitoring clock accuracy in asynchronous traffic environments |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1997042731A1 (en) * | 1996-05-07 | 1997-11-13 | Silicon Image, Inc. | System and method for high-speed skew-insensitive multi-channel data transmission |
JP2003218843A (ja) * | 2001-11-15 | 2003-07-31 | Seiko Epson Corp | スキュー調整回路及びスキュー調整方法、並びに、データ同期回路及びデータ同期方法 |
WO2007099678A1 (ja) * | 2006-03-01 | 2007-09-07 | Matsushita Electric Industrial Co., Ltd. | 送信装置および送受信装置 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4623925A (en) * | 1984-10-31 | 1986-11-18 | Rca Corporation | Television receiver having character generator with non-line locked clock oscillator |
US5835498A (en) * | 1995-10-05 | 1998-11-10 | Silicon Image, Inc. | System and method for sending multiple data signals over a serial link |
JP3893167B2 (ja) * | 1996-04-26 | 2007-03-14 | 株式会社ルネサステクノロジ | 同期型半導体記憶装置 |
US6359946B1 (en) * | 1998-09-23 | 2002-03-19 | National Instruments Corp. | Clock synchronization for asynchronous data transmission |
-
2008
- 2008-09-08 CN CN200880117662A patent/CN101874380A/zh active Pending
- 2008-09-08 WO PCT/JP2008/002476 patent/WO2009069244A1/ja active Application Filing
- 2008-09-08 JP JP2009543645A patent/JPWO2009069244A1/ja active Pending
-
2010
- 2010-05-28 US US12/790,274 patent/US20100239059A1/en not_active Abandoned
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1997042731A1 (en) * | 1996-05-07 | 1997-11-13 | Silicon Image, Inc. | System and method for high-speed skew-insensitive multi-channel data transmission |
JP2003218843A (ja) * | 2001-11-15 | 2003-07-31 | Seiko Epson Corp | スキュー調整回路及びスキュー調整方法、並びに、データ同期回路及びデータ同期方法 |
WO2007099678A1 (ja) * | 2006-03-01 | 2007-09-07 | Matsushita Electric Industrial Co., Ltd. | 送信装置および送受信装置 |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012060677A (ja) * | 2007-12-14 | 2012-03-22 | Mosaid Technologies Inc | 複数のデバイスおよび柔軟なデータ整列を用いるメモリコントローラを有するシステムにおけるクロック再生およびタイミング方法 |
JP2012085318A (ja) * | 2007-12-14 | 2012-04-26 | Mosaid Technologies Inc | 複数のデバイスおよび柔軟なデータ整列を用いるメモリコントローラを有するシステムにおけるクロック再生およびタイミング方法 |
US8467486B2 (en) | 2007-12-14 | 2013-06-18 | Mosaid Technologies Incorporated | Memory controller with flexible data alignment to clock |
US8781053B2 (en) | 2007-12-14 | 2014-07-15 | Conversant Intellectual Property Management Incorporated | Clock reproducing and timing method in a system having a plurality of devices |
US8837655B2 (en) | 2007-12-14 | 2014-09-16 | Conversant Intellectual Property Management Inc. | Memory controller with flexible data alignment to clock |
WO2013065208A1 (ja) * | 2011-11-04 | 2013-05-10 | パナソニック株式会社 | タイミングリカバリ回路およびそれを備えたレシーバ回路 |
Also Published As
Publication number | Publication date |
---|---|
CN101874380A (zh) | 2010-10-27 |
US20100239059A1 (en) | 2010-09-23 |
JPWO2009069244A1 (ja) | 2011-04-07 |
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