TW558838B - A thin film semiconductor device having arrayed configuration of semiconductor crystals and a method for producing it - Google Patents

A thin film semiconductor device having arrayed configuration of semiconductor crystals and a method for producing it Download PDF

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TW558838B
TW558838B TW091114798A TW91114798A TW558838B TW 558838 B TW558838 B TW 558838B TW 091114798 A TW091114798 A TW 091114798A TW 91114798 A TW91114798 A TW 91114798A TW 558838 B TW558838 B TW 558838B
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Taiwan
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semiconductor
thin film
layer
irradiation
manufacturing
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TW091114798A
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Masakiyo Matsumura
Yasuhisa Oana
Hiroyuki Abe
Yoshitaka Yamamoto
Hideo Koseki
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Adv Lcd Tech Dev Ct Co Ltd
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Description

558838 玖、潑明說明 【發明所屬之技術領域】 本發明爲關於一種薄膜半導體元件與用於半導體元件 之半導體基板片及其製造方法。 【先前技術】 正如已知，一個薄膜半導體元件或薄膜電晶體（TFT)包 含一替代品，其中例如是矽的半導體材料的薄膜層形成在 一例如是無鹼玻璃或石英玻璃之絕緣材料的基體層之上。 在半導體的薄膜層中，複數個包含一源極區域和一汲極區 域之通道被形成，並且每一通道皆配備一閘極電極。通常 ，半導體的薄膜層由非晶或多晶矽所組成。然而，使用包 含一非晶矽的薄膜層的基板之薄膜電晶體，因爲其非常慢 的遷移率（通常，大約小於1平方公分/伏特秒）而不能作爲 需要高速操作之元件。因此，近來，包含多晶矽的薄膜層 之基板被用於增加遷移率。儘管如此，即使使用如此的基 板，遷移率的改善仍然受限於因爲電子在操作時間在結晶 晶粒間的邊界之分散之現象，其係由於多晶矽薄膜包含許 多非常小尺寸的結晶晶粒之現象。 因此，已經試著去藉由增大多晶矽的尺寸來得到因爲 避免如電子分散的缺點而使得增加遷移率成爲可能的具有 薄膜層之基板。舉例來說，已經試著去藉由在高溫熔爐退 火多晶矽層來得到一具有大約1微米大小及大約100平方 公分/伏特秒之遷移率的半導體晶粒之薄膜層。然而，以上 方法有一缺點，例如是鈉玻璃片之價廉的玻璃片無法被使 558838 用，而應該使用可以容忍高溫的昂貴之石英玻璃片，因爲 製程需要藉由非常高溫例如超過1000°C來退火。使用如此 昂貴之材料的基板就價錢而言並不適合於製造大尺寸螢幕 之元件。 一些其它的嘗試已經被提出以得到包含大尺寸晶粒之 多晶性半導體之薄層，其係藉由用例如是準分子雷射的能 量光束來照射非晶性或多晶性半導體之薄膜，以代替使用 高溫退火。藉由此種方法，藉由使用不昂貴的玻璃片作爲 基體層來增大結晶晶粒的尺寸是可能的。 儘管如此，即使藉由使用該準分子雷射的照射之方法 ，所得到結晶晶粒之大小無法超過1微米，並且晶粒大小 必然變得不均勻。舉例來說，在日本專利2001-127301的說 明書中，敘述有一種得到大尺寸結晶晶粒之多晶性半導體 之薄膜層之技術，其係包含以下步驟：亦即，藉由例如是 使用準分子雷射之照射的熔化再結晶之方法使一非晶矽薄 膜多結晶化，然後沈積一非晶矽之薄層在該再結晶後的層 之上，以及藉由固相長晶方法結晶所有的層，因而原始的 多晶晶粒長至大尺寸的晶粒。然而，在上述的技術中’其 係建議所得的結晶晶粒之最大尺寸爲大約1〇〇〇奈米（1微米 )，並且尺寸爲不均勻的。（參照在上述的專利說明書內之第 二至五圖） 此外，有一項重要的問題存在，亦即爲晶體晶粒之排 列模式之問題，其在包含多晶性半導體的半導體元件之技 術中被忽視。在藉由前述技術製造之多晶性半導體的薄層 558838 中，在二維方向中晶體晶粒之排列模式爲完全隨機的。使 如此晶體晶粒之排列成爲規則模式之嘗試從未被做過。但 是，晶體晶粒之排列之隨機性質造成一嚴重缺點。 亦即，敘述在一薄膜半導體元件內所形成之電晶體電 路之許多單元必須被排列在一種規則模式，例如，幾何排 列模式下將會是不必要的。因此，在薄膜層中，當晶體晶 粒的大小爲不均勻並且其排列是隨機的（不規則的），則具有 一電晶體之單元電路必然被設定在此種模式下，以延伸至 具有各種尺寸及位置之多個晶體晶粒（請參考第六圖）。這會 導致如此結果爲每一單元電路之遷移率與電子轉移模式爲 彼此不同，並且此於是將會對於該元件的品質帶來不良的 影響。因此，當每個單元電路的特性彼此不同時，元件不 得不全體依據低等級的特性而加以設計。這是要去解決之 一重要問題。 【發明內容】 本發明之一目的爲提供一種用於薄膜半導體元件的基 板片，其中複數個之大尺寸單結晶的晶粒之半導體是以一 種例如是矩陣-陣列型結構的規則排列模式所構成，因而使 得使用其作爲薄膜半導體元件的基板片成爲可能，在該元 件中，一包含一源極電極、一汲極電極以及一聞極電極的 單元電路係在每一晶體晶粒上形成。 本發明之進一步目的爲提供一種薄膜半導體元件，其 具有高遷移率而不受到例如是晶體晶粒大小之不均勻或在 晶體晶粒邊界中發生之電子分散的缺點影響，其係藉由設 558838 定一包含一源極電極、一汲極電極以及一閘極電極的單位 電路在每一晶體晶粒上，該等晶體晶粒係以例如是矩陣-陣 列型結構的模式規則地排列在該半導體之薄膜層之上。 本發明之另一目的爲提供一種用於製造一基板片供一 薄膜半導體元件使用之方法，其中複數個之大尺寸單結晶 的晶粒之半導體係以一種例如是矩陣-陣列型結構的規則排 列模式所構成。 本發明之另一進一步目的爲提供一種製造一薄膜半導 體元件之方法，其中一包含一源極電極、一汲極電極以及 一閘極電極的單元電路係構成於每一晶體晶粒之上，該等 晶體晶粒係以例如是矩陣-陣列型結構的模式規則地排列於 半導體之薄膜層中。 因此，本發明之薄膜半導體元件之基板片係包含：一 絕緣材料之基體層、一構成於該基體層上的半導體之薄膜 層、複數個單晶性半導體晶粒，其係構成在該半導體之薄 膜層中，並且該複數個之單晶性半導體晶粒係以一種例如 是矩陣-陣列型結構的規則結構被排列在該半導體之薄膜層 中。 本發明之薄膜半導體元件係包含：一絕緣材料之基體 層、一形成於該基體層上的半導體之薄膜層、形成於該半 導體之薄膜層上的複數個單晶性半導體晶粒，該複數個單 晶性半導體晶粒係以一種例如是矩陣-陣列型結構的規則結 構加以排列，並且每一所述的單晶性半導體晶粒皆具有一 電子電路，該電路係包含一閘極電極、一源極電極以及一 558838 汲極電極。 根據本發明之製造一用於薄膜半導體元件的基板片之 方法係包含以下步驟：亦即， (a) 形成例如是非晶性或多晶性半導體的非單晶性半導體之 一薄膜半導體層在一絕緣材料之基體層上，並且 (b) 藉由以能量光束照射該非單晶性半導體來結晶或再結晶 該非單晶性半導體，以製造複數個單晶性半導體晶粒，該 照射係被實施以使得可得最大照射強度之照射點以及可得 最小照射強度之照射點係以一種例如是矩陣-陣列型結構的 規則結構被排列。 本發明之製造一薄膜半導體元件的方法係包含以下步 驟：亦即， (a) 在一絕緣材料之基體層上形成一非晶性或多晶性薄膜半 導體層， (b) 藉由以能量光束照射該非晶性或多晶性半導體來結晶或 再結晶該非晶性或多晶性半導體，以製造複數個單晶性半 導體晶粒，該照射係被實施以使得可得最大照射強度之照 射點以及可得最小照射強度之照射點係以一種例如是矩陣-陣列型結構的規則結構被排列， (c) 在該薄膜半導體層中每一單晶性晶粒上形成一閘極電極 ，該等晶粒已藉由所述步驟（b)被製造，並且 (d) 藉由形成一源極電極以及一汲極電極在每一所述晶粒中 ，製造一電子電路在每一所述單晶性半導體晶粒中。 【實施方式】 12 558838 在本發明之薄膜半導體元件中，較佳的是使用具有不 超過700°C之應變點的玻璃片，作爲基板片之基體層材料。 但是，使用除了玻璃外之不同種類的絕緣材料是可能的， 例如，具有適當的熱阻抗之陶瓷或塑膠薄膜。 在前述的基體層上，形成一半導體之薄膜，其中單結 晶的半導體晶粒係依例如是矩陣-陣列型模式的規則排列模 式被排列。該薄膜層之形成是藉由沈積一非單結晶性質之 半導體層在基體層之上而加以實行，然後，藉由例如是準 分子雷射光束的能量光束之照射來改變該沈積層成爲二_包_ 含大尺寸結晶晶粒之多晶性半導體層。 如同非單結晶性質之半導體，非晶性半導體或包含小 尺寸多晶晶粒之多晶性半導體可以被使用。藉由根據本發 明的方法，以上半導體之任何型態都可以被變更至本發明 之薄膜半導體，其係藉由將其結晶或再結晶。所期望的是 ，薄膜半導體層之厚度爲10至200奈米，特別是50至150 奈米。 通常，當該所述的非單結晶特性之半導體層形成於該 基體層之上時，一薄控制層形成於該基體層與該半導體之 間，該薄控制層係爲了調整熱傳導以及結晶-朝向，其係包 含例如矽氧化物、矽氮化物（SiNx)之材料。此層擁有阻絕例 如從該基體層至該半導體層之玻璃成份的雜質擴散之作用 ，以及爲了控制晶體之朝向而帶給半導體層之熱分佈之故 意的一致性。其厚度係期望爲20至1000奈米，特別是200 至300奈米。 13 558838 爲了進一步於前述非單結晶半導體層(該第一控制層）上 調整熱傳導以及結晶，形成第二控制層也是很平常的。此 第二控制層擁有與第一控制層一樣之功能，就是，在藉由 照射的結晶之方法中，帶來熱分佈之一致性並且控制在半 導體層中之晶體之朝向。例如砂氧化物、砂氮化物、砂氧 氮化物或碳酸矽（SiC)之材料可以被用來爲此。該層之厚度 期望爲50至500奈米，特別是100至300奈米。 當該前述兩個控制層形成後，在該兩控制層之間形成 該薄膜半導體層。在此例中，首先第一控制層之材料在該 絕緣材料之基體層上沈積爲一薄膜，然後，非單結晶半導 體之薄膜材料沈積於該第一控制層之上，並且進一步，第 二控制層之材料沈積於該所述半導體層之上。此後，來自 上方之能量光束之照射係被實施以結晶或再結晶該非單結 晶材料層。 現在參考第一 a至Id圖，其係顯示根據本發明的方法 之每一步驟之實施例，第一 a圖顯示層的沈積之第一階段 ，其中用以調整熱傳導以及結晶之第一控制層20係沈積於 基體層10之上，並且非晶性或多晶性半導體之非單結晶層 30係沈積於該第一控制層20之上。另外，第二控制層40 係沈積於該非單結晶層30之上。 如在第一 b圖中顯示，顯示於第一 a圖之非單結晶層 30係藉由能量光束之照射而被改變爲包含單結晶的區域50 以及非單結晶區域51之一層。 當然，第一 b圖顯不一單結晶區域之部分圖樣視圖， 558838 並且本發明之一基板片係包含複數個此種單結晶半導體區 域。 接下來，如在第一 c圖中顯示，閘極電極60形成於該 基板片之上，並且源極區域70以及汲極區域71形成在該 單結晶的半導體區域50中，其係藉由使用閘極電極60作 爲該植入遮罩以植入例如是磷離子的施體雜質75進入其中 〇 此外，如在第一 d圖中顯示，一例如以矽氧化物爲材 料之絕緣層被沈積於該第二控制層40之上，並且在鑿穿接 點孔洞穿過該第二控制層40以及絕緣層80之後，源極電 極90以及汲極電極91係藉由鋁（A1)/鉬/(Mo)之沈積進入該 些接點孔洞並且加以圖樣化來形成，藉此完成一薄膜半導 體元件。 在前述第一 b圖中，使用準分子雷射照射作爲照射機 構是較佳的。然而，除了準分子雷射之外的照射機構，例 如，脈衝氬雷射或YAG雷射都可以被使用。 爲了得到一薄膜半導體層，其中單結晶的半導體晶粒 係藉由能量光束之照射，依照例如是矩陣-陣列型結構模式 的規則排列模式而被排列，該照射的實施應該是依照能量 強度分佈模式爲其中該照射能量強度在二維方向上連續地 變化在每一預定間隔之最大値以及最小値之間，並且最大 點與最小點係一個接著另一個次序出現。換言之，該照射 應該被實施以使得可得最大照射強度之照射點以及可得最 小照射強度之照射點依照例如是矩陣-陣列型結構模式的規 15 558838 則結構被排列。 舉例來說，如在第二、三與七圖所顯示，該照射被實 施在該強度分佈模式，其中照射能量係二維地（在X、y兩 方向上）重複此改變爲“最大値（Emax)->最小値（Emin)—最大 値（Emax)”，在一個5X5毫米之矩形區域內，在每隔1〇微 米之間隔下。該所述的照射能量強度之改變可以藉由利用 相移遮罩帶來該照射能量強度分佈之變化來實現。並且所 期望的是，在該最大値以及最小値之間的變化之模式爲一 連續的變化，實質如同第三圖所顯示者。 決定該最大値以及最小値之程度到多少値可以是根據 該非結晶半導體層之膜厚度以及該第一及第二控制層之膜 厚度與熱傳導性。舉例來說，最小能量強度可以被決定爲 一在該照射期間內帶來不熔化該薄膜半導體的溫度之強度 ，並且該最大値可以被決定爲在該照射期間內必須且充分 的熔化該薄膜半導體之強度。一個熔化的臨界位準（Emth)應 該存在於該最大値（Emax)與最小値（Emin)之間，如同在第三 圖中所顯示者。 當然，該照射光束之表面形狀不限於如前所提出之一 個5X5毫米之正方形，而是可以爲各種多邊形。此外，最 大値點以及最小値點之排列模式不限於該長方形格子模式 ，而是可以爲各種形式模式，例如，三角形格子之模式。 藉由實施能量光束之照射至該薄膜半導體上，照射該 最小能量強度（亦即，該強度小於熔化的臨界位準）之區域不 完全熔化，並且因此，晶核係首先形成在此區域內。然後 558838 ，晶體開始依照朝向Emax之二維方向成長，如在第四圖中 藉由箭頭提及所示。再另一方面，在其中溫度變爲最高的 最大能量強度點之區域內以及在變爲晶體成長之區域內係 產生較小的尺寸或細微尺寸的晶體或大尺寸晶體之邊界之 形成，此係由於具有不同之增長方向的長晶之相互干擾。 因此於是，一薄膜半導體之基板片可以被得到，該基板片 包含複數個單結晶性半導體，其形成於靠近該熔化的臨界 點之區域，並且每一點擁有一晶體超過4微米之尺寸（參考 第四圖）。 該單晶體之尺寸可以藉由改變照射能量之最大點之間 的間隔來調整之。舉例來說，當該308奈米之XeCl準分子 雷射之照射是藉由使得於最大強度點之間的間隔爲12微米 被實施時，其中接近5微米尺寸之單晶體晶粒被規則地排 列的薄膜半導體之基板片可以被得到。所期望的是，作爲 將被用於本發明之薄膜半導體元件的基板片，在該基板片 中每一單晶體晶粒之尺寸是不小於2微米。 然後，在藉由如同上述方法所得到之薄膜半導體基板 片中之每一單晶體晶粒上，例如是鉬-鎢合金（MoW)的電極 材料係以一適當的厚度（例如，300奈米）沈積，藉此形成一 閘極電極。然後，在使用閘極電極當作植入遮罩來分別形 成一源極區域以及一汲極區域之後，一覆蓋閘極電極之具 有例如是矽氧化物的絕緣材料之絕緣中間層係被形成。此 外，在藉由鑿穿過第二控制層在源極區域以及汲極區域上 力之位置來形成接點孔洞之後，例如鋁/鉬的電極材料係被 17 558838 沈積以及形成圖樣在該接點孔洞內。 因此，如在第五a與b圖所示，其中在每一單晶體中 之一單元電子電路被規則地排列的薄膜半導體元件可以得 到。此種形式之薄膜半導體元件可以具有高遷移率（例如， 超過300平方公分/伏特秒），超過其中使用一包含多晶性半 導體膜的基板片之傳統元件的遷移率。 省略爲了一些單晶體的電極之設定或是爲了一單晶體 設定多數個單元電路是可能的。此外，雖然前述的敘述是 在N通道形式之薄膜電晶體之製造上加以說明的，但是藉 由做成部分遮罩並且一個接著另一個地摻雜雜質來應用本 發明之技術至CMOS形式之電晶體是可能的。取代使用該 第二控制層作爲閘極絕緣體的是，藉由在形成該單晶體層 之後的蝕刻，並且在去除部分處形成新的閘極絕緣層來免 除該第二控制層也是可能的。當在相鄰電晶體之間有漏電 流發生之可能性時，藉由在該結晶程序之前或之後使用蝕 刻方法的“島分隔”可以被實施。 實例 由康寧玻璃工廠所製造之無鹼玻璃片被製備作爲基體 層，，其具有外在尺寸400 X 500毫米、0,7毫米的厚度以及 650°C的應變點。在該基體層之表面，該爲了調整熱傳導以 及結晶之200奈米厚之第一控制層係藉由用電漿化學氣相 沈積方法來沈積矽氧化物（Si02)所形成的。在該第一控制層 之上，一擁有50奈米厚度之非晶性矽層係被沈積，此外， 該擁有200奈米厚度之矽氧化物之第二控制層係被沈積於 18 558838 該非晶性矽層之上。這些藉由材料之沈積的層之形成係在 不暴露於空氣之條件之下連續地被實施。 其次，在回火以及乾燥該非晶性矽層之後，藉由從上 方的308奈米之脈衝準雷射光束之照射以結晶之。 該照射是藉由使用準雷射光束之單元加以實施的，其 中光束面係被形成爲5X5毫米之長方形之形狀並且藉由利 用一相移遮罩來在其中得到強度分佈。該強度分佈之模式 爲25萬個最大値點依照方格之形式以1〇微米間隔排成陣 列在5X5毫米之長方形內。該熔化的臨界値大約爲0.5焦 耳/平方公分，雷射光束強度之最大値以及最小値分別爲 1.8焦耳/平方公分以及0.1焦耳/平方公分。 該藉由上述模式之準分子雷射照射係被實施朝向將被 照射的整個表面，其係藉由以5毫米間隔步進地移動照射 之位置。 在完成照射之後，該照射樣品係藉由使用SECCO蝕刻 方法來接受蝕刻處理法以及在該照射層內的結晶尺寸與晶 粒邊界之形狀之觀察。由於藉由電子顯微鏡之觀察，確定 得到一基板片其中幾乎4微米尺寸之單晶體之晶粒依照矩 陣格子形式被排列。 接下來，在該第二控制層上，一鉬-鎢合金（MqW)層係 以300奈米之厚度藉由濺鍍方法被沈積並且形成圖樣在對 應於每一單晶體位置處，以形成聞極電極。然後，源極區 域以及汲極區域藉由使用該閘極作爲遮罩植入磷離子而形 成，並且該中間層絕緣係藉由電漿化學氣相沈積方法來沈 19

Claims (1)

  1. 558838 拾、申請專利範圍 1·一種用於薄膜半導體元件之基板片，其係包含： 一絕緣材料之基體層、一形成於該基體層上之半導體 薄膜層、以及形成於該半導體薄膜層之內之複數個單結晶 的半導體晶粒，該複數個單結晶的半導體晶粒係在該半導 體薄膜層中以一種矩陣-陣列型結構被排列。 2·如申請專利範圍第1項之用於薄膜半導體元件之基板 片’其中該單結晶的半導體晶粒之晶粒尺寸爲至少2微米 〇 3·如申請專利第1項或第2項之用於薄膜半導體元件之 基板片’其中用於熱傳導以及結晶之一控制層係在該基體 層與半導體薄膜層之間形成。 4·一種薄膜半導體元件包含，其係包含：一絕緣材料之 基體層、一形成於該基體層上之半導體薄膜層、以及形成 於該半導體薄膜層之內之複數個單結晶的半導體晶粒，該 複數個單結晶的半導體晶粒係以一種矩陣-陣列型結構排列 ’並且每一該單結晶的半導體晶粒皆具備一電子電路，該 電子電路係具有一閘極電極、一源極電極以及一汲極電極 〇 5·—種用於製造一薄膜半導體元件之基板片之方法，其 係包含以下步驟： (a) 在一絕緣材料之基體層上形成一非晶性半導體之薄膜半 導體層，並且 (b) 藉由以能量光束照射該非晶性半導體以結晶該非晶性半 22 558838 導體以產生複數個單結晶的半導體晶粒’該照射係被實施 使得可得最大照射強度之照射點與可得最小照射強度之照 射點係依照一種矩陣-陣列型結構被排列。 6. 如申請專利範圍第5項之用於一製造一薄膜半導體元 件之基板片之方法，其中該最大照射強度爲具有足夠熔化 該非晶性半導體之高數値，並且該最小照射強度爲具有不 能造成該非晶性半導體熔化之低數値。 7. 如申請專利範圍第5項之用於一製造一薄膜半導體元 件之基板片之方法，其中在該最大値與最小値之間的照射 強度之變化爲連續的。 8. 如申請專利範圍第5項之用於一製造一薄膜半導體元 件之基板片之方法，其中準分子雷射光束係被用來作爲該 能量光束。 9. 一種用於製造一薄膜半導體元件之基板片之方法，其 係包含下列步驟= (a) 在一絕緣材料之基體層上形成一多晶性半導體之薄膜半 導體層，並且 (b) 藉由以能量光束照射該多晶性半導體來再結晶該多晶性 半導體以產生複數個單結晶的半導體晶粒，該等晶粒係具 有至少2微米之晶粒尺寸，該照射係被實施使得可得最大 照射強度之照射點與可得最小照射強度之照射點係依照一 種矩陣-陣列型結構被排列。 10. 如申請專利範圍第9項之用於製造一薄膜半導體元 件之基板片之方法，其中該最大照射強度爲具有一足夠熔 23 558838 化該多晶性半導體之高數値，並且該最小照射強度爲具有 一不能造成該多晶性半導體熔化之低數値。 11. 如申請專利範圍第9項之用於製造一薄膜半導體元 件之基板片之方法，其中介於該最大値以及最小値之間的 照射強度之變化爲連續的。 12. 如申請專利範圍第9、10或11項之用於製造一薄膜 半導體元件之基板片之方法，其中準分子雷射光束係被用 來作爲該能量光束。 13. —種用於製造一薄膜半導體元件之方法，其係包含 以下步驟： (a) 在一絕緣材料之基體層上形成一非晶性半導體之薄膜半 導體層， (b) 藉由以能量光束照射該非晶性半導體來結晶該非晶性半 導體以產生複數個單結晶的半導體顆粒，該照射係被實施 使得可得最大照射強度之照射點與可得最小照射強度之照 射點係依照一種矩陣-陣列型結構被排列， (c) 在該薄膜半導體層中之每一所述單結晶的晶粒上形成一 閘極電極，該等晶粒係已藉由所述步驟(b)被產生，並且 (d) 藉由在其中形成一源極電極與一汲極電極已在每一所述 單結晶的半導體晶粒中製造一電子電路。 14. 如申請專利範圍第13項之用於製造一薄膜半導體元 件之方法，其中該最大照射強度爲具有一足夠熔化該非晶 性半導體之高數値，並且該最小照射強度爲具有一不能造 成該非晶性半導體熔化之低數値。 24 558838 15. 如申請專利範圍第13項之用於製造一薄膜半導體元 件之方法，其中介於該最大値以及最小値之間的照射強度 之變化爲連續的。 16. 如申請專利範圍第13、14或15項之用於製造一薄 膜半導體元件之方法，其中準分子雷射光束係被用來作爲 該能量光束。 17. —種用於製造一薄膜半導體元件之方法，其係包含 以下步驟： (a) 在一絕緣材料之基體層上形成一^多晶性半導體之薄膜半 導體層， (b) 藉由以能量光束來照射該多晶性半導體以結晶該多晶性 半導體，以產生具有至少2微米之晶粒大小之複數個單結 晶的半導體晶粒，該照射係被實施使得可得最大照射強度 之照射點與可得最小照射強度之照射點係依照一種矩陣-陣 列型結構被排列， (c) 在該薄膜半導體層中之每一單結晶的晶粒上形成一閘極 電極，該等晶粒係已藉由所述步驟（b)被產生，並且 (d) 藉由在其中形成一源極電極以及一汲極電極以在每一所 述單結晶的半導體晶粒中製造一電子電路。 18. 如申請專利範圍第17項之用於製造一薄膜半導體元 件之方法，其中該最大照射強度爲具有一足夠熔化該多晶 性半導體之高數値，並且該最小照射強度爲具有一不能造 成該多晶性半導體熔化之低數値。 19. 如申請專利範圍第17項之用於製造一薄膜半導體元 25 558838 件之方法，其中介於該最大値以及最小値之間的照射強度 之變化爲連續的。 20.如申請專利範圍第17、18或19項之用於製造一薄 膜半導體元件之方法，其中準分子雷射光束係被用來作爲 該能量光束。 26
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