TW419805B - Method for forming interconnect bumps on a semiconductor die - Google Patents
Method for forming interconnect bumps on a semiconductor die Download PDFInfo
- Publication number
- TW419805B TW419805B TW088100601A TW88100601A TW419805B TW 419805 B TW419805 B TW 419805B TW 088100601 A TW088100601 A TW 088100601A TW 88100601 A TW88100601 A TW 88100601A TW 419805 B TW419805 B TW 419805B
- Authority
- TW
- Taiwan
- Prior art keywords
- layer
- tin
- eutectic
- forming
- bumps
- Prior art date
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- Electric Connection Of Electric Components To Printed Circuits (AREA)
Description
M濟部中央標準局負工消費合作社印製 4 19 80 5 ^ a? --—-—_ B7 五、發明説明(1 ) 先前申請案參考 此申請案係已於1998年I月30曰列檔於美利堅合眾國 之專利申請案09/0 1 5,956號中。 發明範疇 本發明大致係關於半導體裝置之封裝,而特定係關於丰 導體裝置上形成互連凸粒。 發明背景 直接式晶片接合(DC A)或覆晶(flip-chip)黏結,於半導體 工業中係被使用在連接半導體晶粒至互連佈線次層,其諸 如陶瓷晶片載板、有機印刷電f板。知曉其爲控制崩潰晶 片連接(C-4)的一種DC A方法,其涉及使高鉛含量焊料凸粒 沉積於半導體晶粒可濕潤之黏結墊上。然後將此等焊料凸 粒焊接至該等印刷電路板次層互連上之軌跡或襯墊。 於焊料凸粒可被連接至印刷電路板之前,須經甴使低溫 焊料,諸如共晶錫-鉛垾料,置在位於物理及電連接性較佳 之印刷電路板上之襯墊上,以製備印刷電路板。後續於經 過焊料塗佈之襯墊上將裝置之焊料凸粒對齊並加熱,以使 共晶焊料在裝置、C-4凸粒、及印刷電路板之間產生連結 。其直接被連接至印刷電路板之C-4焊料凸粒乃需大於 330°C的高溫,並且印刷電路板材質需能夠容忍此等溫度 ,此等印刷電路板一般對大部分應用而言過於昂貴。 隨著DCA應用中之C-4技術的一個'問題爲在印刷電路板 上使用第二種低溫焊料。爲使於印刷電路板上置放共晶焊 料時能調節C-4晶粒的連結,乃需額外的時間及成本°經 -4- 本紙伕尺度適用中國囷家標準(CXS ) A4規格(210X 297公釐) (請先閱讀背面之注意事項再填寫本頁) 裝· 訂--------線 起濟部中·尤標準局員工消费合作社印製 Α7 Β7 五、發明説明(2 ) ' —-- 估計於印刷電路板上w诂业θ 虹、 ^ 置玫共日日谇枓足額外成本,每DCA晶 片成本疋在S.DO至$1.〇〇之範圍内。此額外成本對有些應用 是禁止的。已嘗試藉由使共晶物置於㈡晶粒凸粒上以克 服塗敷共晶物至電路板的成本。雖然此能去除塗敷共晶物 至電路板的成本,其仍需在塗敷共晶物之前完成整個C-4 製程,而在C-4製裎中它是—個額外步驟。與使用c_4結 構有關其尚有的另-個缺點是,M由蒸發技術形成高含鉛 量材料的成本。因此,於生產環境中使用c_4凸粒結搆偏 貴已有許多的説明被提出。 尚有之另一個長久以來的問_題是,使用c_4凸粒對時間 的衣置可靠性,特別是在當以高錫焊料連接至互連次層時 尤然。長久以來已觀察到在特定的條件下,下凸粒金屬化 (UBM)會被腐蝕而造成可靠性的問題。在極端的實例當中 ’邵分CJ B Μ冗全地自晶粒被舉起並伸進凸粒本身。此一结 果是隨後薇高鉛凸粒會與鉻層16直接接觸,其係無法提供 良好之金屬間介面。 DCA之另一種形式爲使用蒸發、延伸性共晶法(Ε_3)。 Ε-3凸粒結構包含薄的錫層或蓋,其直接地被形成於實質上 較厚之鉛層頂部。經由利用該錫蓋,此凸粒結構當被加熱 時經與小部分組成蒸發凸粒整體的鉛反應而形成共晶液態 層。使用Ε - 3凸粒係免除以共晶焊料製備印刷電路板之要 求°再者,使用Ε - 3凸粒係免除連接' 至次層基板之前需回 流焊料凸粒之要求。 雖使用Ε - 3凸粒結構已克服C - 4結構之某些缺點,其中 -5- 本紙張尺度遠用中國國家標毕(CNS )人4規格(210X29f公釐〉 !}--:-----^------,?τ----------^ (請先閲讀背面之注意事項再填寫本頁) 經濟部中央梯準局負工消費合作社印繁 4 19 8 0 5 - Α7 - —_£ 五、發明説明(3 ) 其相对上爲軟之E-3凸粒是有問題的。e-3凸粒所以相對 上爲軟乃因厚的錯層所導致。鉛是高延展性元素。雖然鉛 的延展性具備了某些優點,其有高延展性不佳之其它實例 。例如’南延展性凸粒對經由受物理外力變形較爲敏感, 諸如發生在裝置的封裝及裝運期間。一旦其受損係無法擔 保其後續之處理《因此,一旦E_3凸粒結構受到變形時, 則裝置必須被報廢。 於DC A工業中所關心之研發範疇爲共晶凸粒之使用,以 克服先前技蟄的問題。然而,使用共晶凸粒已被證明也是 有問題的。與DCA裝置上之共ώ粒有關之一問題與凸起 晶粒所被連接至之有機電路板之限制有關。一般而言,特 是在低成本應用中之印刷電路板,其被用以界定襯墊互 連位置係有寬廣之製造容限。此等寬容性的結果是印刷電 路板上實質量之鋼互連可被當作接觸位置外露。在共晶凸 起晶粒結構連接至此等電路板期間,焊料與DC Α晶粒之凸 粒、及印刷電路板上之銅互連間之濕潤爲所獲得的支座高 度’其爲自印刷電路板表面至裝置表面之間的距離,其低 於目前可取得之下塡充方法能可靠被使用的尺寸。 一種用以克服最小支座高度問題的先前技藝技衔,係以 銅支座來形成以用在晶粒上,其使高度被限制至一特定的 距離。然而,隨著使用銅支座的問題也是存在著。隨著使 用鋼支座的一個問題是大的銅支座會_將應力傳遞至该晶粒 之活性邵分内’其造成可靠性失敗。相反地,小的飼支座 會造成問題’其中它們與錫反應而造成铜支座完全地反應 _______ -6- 本紙張尺度边用中囡國萆標準(' CN’S ) Α4規格(210X297公釐) C请先閱讀背vg之注意事項存填寫本頁) T裝-----1訂 A7 419805 B7 五、發明説明(4 ) ,因此造成了較不可靠的接合。 (請先閱讀背面之注意事項再填寫本頁) 因此,鑑定凸粒結構能於已克服先前技藝問題之DC A應 用中進行使用將是有用的。 圖式簡單説明 圖1示出半導體裝置上之下凸粒冶金結構橫截面圖; 圖2示出圖1接著沉積凸粒材料後之下凸粒冶金橫截面 圖: 圖3示出接著回流圖2中凸粒材料後之晶粒凸粒橫截面 圖: 圖4示出圖3中之下凸粒冶_金頂部具有支座部分形成之 晶粒凸粒橫截面圖。 較佳實施例之詳細説明 圖1示出具有丰導體基材24、導電互連22(亦被稱爲凸 粒墊)、鈍化層3 0、及下凸粒冶金部分1 1之裝置3 2。在一 實施例中,半導體基材24爲單晶矽基材。交替地,半導體 基材1 0可爲於絕緣體上之矽基材、於藍寶石上之矽基材等。 經濟部中央標準局員工消费合作社印製 於一實袍例中,導電互連22爲用於提供物理接合之金屬 連結塾,以對裝置32外形成連結。該金屬塾一般含有鋁或 銅。交替地,導電互連2 2可爲複合物或#雜層,諸如链銅 合金、或具有氣化鈇上層的铭。 於一實施例中,鈍化層22可由任何的絕緣材料來形成。 例如,赴化層可利用經由鱗摻雜之玻璃、等離子沉積之氧 氮化碎、等離子增強之氣化物、或此等組合、或其它之絕 緣材料形成。 -7 - 本紙張尺度適用中囷國家缥準(CNS ) Λ4規格(2丨0X 297公釐) 41 9 805 A7 B7 經濟部中央標準局負工消費合作杜印製 五、發明説明(5 ) 於一實抱例中,裝置32之UBM 11含有形成在金屬墊22 上疋路層16、銅層36、及錫層40。其它層可存在UBM II 中。例如’薄相區可存在介於鉻層及銅層之間、及/或金層 38可形成在铜上,以防止後續處理之前銅被氧化。 於一實施例中,錫層40係利用蒸發方法形成,以確保後 績的凸粒結構對半導體裝置32能有適當之連結。於其它實 施例中’錫特別可由濺鍍形成,錫層4〇乃在銅層36及後 績層之間當作連結劑。一般而言,錫層4〇將會具有介於丨〇〇〇 及1 2,0 0 〇埃之間的厚度。於特殊實施例中,已由本發明人 觀察听得其具有厚度1 250-i 75J)埃之錫層40已足以克服先 前技藝中所被察覺之可靠性問題a錫層4〇之交互作用 '及 其於改良本發明整體可靠性中之效果,後續將做更詳細地 討論® 圖2示出圖1接著在UBM結構1丨上形成共晶材料42之 結構實施例。使用共晶材料以協助半導體晶粒處理之使用 。諸此處理一般是晶粒被連結至印刷電路板。於一實施例 中,該共晶材料包括高锡化合物。其中一種此等共晶材料 爲64%錫-36%鉛焊料。許多其它共晶材料已被知曉。此外 ,近似之共晶材料能容許經由本發明適當地將晶片連接至 基材。-般而言’隨著此發明被使用的焊料係以小於2霞 之峰値回流邁度進行處理,以容許使用經濟的印刷電路板。 共晶材料42能以任何之許多方法及形狀來形成;示於圖 2之賞施例中’共晶材科42 f手诗;今姑· -η- ' 你谈'至敷,使得其一全地圍繞 UBM結構I丨c經由此舉,並承〜π . '、史π確疋後% (回流步騍將 本紙張尺度逋用中國國家標华(CNS ) Α4規格(2丨^ - , 批衣------·玎------線 {诗先聞讀背面之注意事項再填寫本頁) 8- 419805 A7 B7 經濟部中央樣準局ΐ.只工消費合作让印製 五、發明説明(6 ) 以成共晶材料42濕潤結構π邊緣周圍。然而,於其它實 施例中’可將共晶材料42主要沉積在uBM結構1 1頂部而 使其不是完全地包圍UBM,其中後續之回流仍可被容許適 當地在邊緣周圍濕潤。 於尚有之另一實施例中(未示出),UBM結構11之實際 邊緣能以部分的鈍化材料3 〇覆蓋。於此等結構中,可將共 晶材枓42形成在結構Π之外露邊界内、或結構11之外露 邊界外。共晶材料42能以任何數目之焊料沉積方法沉積。 例如’焊料噴射沉積、使用模版或遮蔽的焊料印刷沉積、 或者可利用焊料膏塗敷。再者」經沉積之焊料42之實際量 將是所需最終凸粒尺寸的函數:易而言之,爲了形成大的 焊料凸粒,與經塗敷而形成小凸粒比較下將需要較多量之 烊料42材料被塗敷至裝置。經由使用較厚之沉積、或藉由 塗敷焊料至較大區域,係能調控不同量的焊料材料42。 圖2之共晶材料42係以圖3中接著回流過程或步驟後之 焊料塗粒45之圖示。如圖3所示,接著在回流步驟後,其 經過回流之共晶區45乃被形成,其大致包圍UBM結構1 1 邊緣的係由共晶區45所環繞。此外,該回流過程可容許共 晶區45獲得較佳之形狀以使用於進一步嵌裝至印刷電路 板基板上。 如先前所參考,於UBΜ銅的部分上形成含錫凸粒及共晶 焊料已造成長期的可靠性問題:先前技藝敎導過多的錫會 造成可靠性問題。根據本發明人之成果及觀察,現已相信 可靠性問題之根本原因不僅只有過多的錫,並且與銅錫介 -9- 本纸掁尺/1適用中國國家標準(C_NS )人4祀格(210Χ 297公釐) —丨-] : I1Γ-------^ (請先閒讀背面之注意事項再填寫本頁) 4 t 8 Ο ο A7 Γ— - —__ B7_ 五、發明説明(7 ) 金屬於麵廣處所形成之方法有關之不均勾應力所致。此 外本”月人已觀察到當於先前技藝中以超過2 2 〇 c之處理 m度下使用问鎮淳料時,UBM係在高增加速率下被腐姓 。此被相仏因爲當其和錫接觸時鋼錫介金屬於227c下變 成液體所致。請見馬帝潔西維克(Matijasevic)等人所著之鋼 錫多層複合焊科。 以C-4技術,它被相信UBM錫層之龜裂,係因爲當鉛錫 被熔化形成C-4凸粒時於錫-鉛凸粒中錫的動態交互作用而 發生。錫-鉛C-4凸粒以約3%錫鉛之濃度沉積。接著 在回流步驟後,肖步職形成(^凸粒,於錫_紹c_4&粒中 所觀祭到的濃度約爲2%錫-98%鉛。損失的丨%與UBM之銅 層產生父互父用。因爲在凸粒熔化期間錫和銅交互作用, 它被相信當錫與其反應時不均句的應力會發在銅層表面處 。因爲孩非對等性應力,於是形成龜裂,因此使更多的銅 外露而與錫反應。結果,分析顯示出在先前技藝C-4凸粒 中實際上所有的銅和錫產生反應。此乃造成錫_鉛&粒及鉻 ’曰丨6之間的主要初理接合。如所被觀察到的,此物理接合 對過時劣化爲敏感。 利用本發明的銅層做分折,其中均句錫層4〇係在沉積錫 -鉛焊料之前被形成,已證明能於凸粒回流後維持均勻的銅 層丨f料3然而,孩均勻錫層4 〇係具有不會造成與先前技藝 4 4層相關的龜裂之方式進行反應而所始料未及的優點 此結果之始料禾及性質係由包威爾(p〇we丨1)及特菜維弟 H^ivedi)於FR-4積體電路封裝中之覆晶所支持’其說明過 -10- 久4用中囷ntm ( CNsTA4il#- f ΙΙΟχ 297^11 〜—~— - • ml i ... (請先聞讀背面之注意事項再填寫本瓦) I---裝- -濟部中央榡準局—工消Φ:合作杈印m = I,一,aJi t-I - i --- --- 1—- 1 __ I - — -I I -叶· - r i - - - - In- A7 4 1 9 805 ____________B7 五、發明説明(8 ) 多可用的錫係會腐蝕晶片墊。 相較於先前技藝的進一步優點是,當與E3型裝置比較下 ’使用共晶區4 5係能降低裝置對物理損害的敏感性。能降 低敏感性的其中一個原因是,即使其受到損傷,在後續連 接至印刷電路板期間,共晶區45具有回流至較佳位置的傾 向。因此’ ¾以共晶材料對損傷係有較大的耐受性。與E_3 結構相反,該結構具有硬的鉛部分,—旦其受到損傷,係 傾向維持於受損之狀態下。因爲當以諸如共晶錫_鉛製造時 整個凸粒會回流’該组合過程較當使用e_3結構時更爲堅 固。^使用南體積之共晶錫H焊料接合C - 4凸粒,則结果 如同包咸爾及特莱維弟所述由UB Μ被腐蝕所造成的可靠 性問題。 於圖2之另一實施例中,層_43爲隨著技術所被使用 類型之高鉛含量焊料° 一般而言,此將爲97%的鉛、3 %的 知。於此賞施例中’圖:> 之結構4 5可表示成經回流之高鉛 含量焊錫。 參考圖4 ,本發明可替換之實施例係如圖所示。於圖4 之貫施例中,支座結構4 6係在共晶邵分4 8形成前被形成 在U Β Μ I丨之頂部。支座部分4 6係經選定以具有高於共晶 區45的熔點。後續於連接至印刷電路板期間,支座部分46 界疋了半導體裝置純化層3 0及該裝置所嵌裝至之刷電路 板(爪示出)之間的空間α當決定下膜材料以駐留在介於裝 置3 3及印剔電路板(未示出)之間時’此支座部分46可容許 权大的彈性。一般而言’支座區4 6係經使用蒸發錯之方法 ( CNS ) Α4規格(210/297公慶 1 — ~~ — ^--n ^11------線 (請先聞讀背面之注意事項再填寫本頁) 經濟部中夬樣準局員工消费合作社印51 419805 Α7 Β7 經濟部中央標準局負工消资合作社印繁 五、發明説明(9) 形成’經由任何之鉛沉積方法應已足夠。於一特殊實施例 中,支座區46實質上爲純鉛。結構46之高度係視下塡充 嵌裝在印刷電路板上之晶粒所需要之高度而定。一般而言 ,於鈍化區上約75微米的高度是有利的。接著在支座區46 被形成後,沉積共晶區48並後績使其回流以形成圖4中所 示裝置3 需注意的是,本發明其中一個優點是’形成於銅層36上 之錫層40提供均勻的錫、銅介金屬。該介金屬區的結果是 ’銅層於回流過程期間相較於先前技藝下對損傷具有較大 的抵抗性。例如,於C-4先前j支藝中,與C-4結構相關之 UBM銅層已被觀察到在回流過程期間是完全地與錫反應 。然而,由於形成於本發明中之均勻表面結構所致,UBM I銅層不會有以不均勻方式與共晶材料的錫產生反應的機 會。結果’接著在回流之後,係能維持均勻整體鋼層3 6的 存在。然而邵分原先的銅介面3 6與原先的錫層4 〇反應形 成介金屬銅錫化合物。比較之下’使用諸如該等與C - 4玦 構相關之先前技#方法,其於錯錫凸粒材料回流後並無法 維持連續之整體銅層。此外,所留下的鋼爲介金屬形式並 且已紅產生反應’使彳于每裂及開孔形成在詞锡介金屬個別,, 島狀物(i s 1 a n d s) ”間之内。銅錫介金屬之間的間隙sj·容許以 下的格外露至鉛凸粒化合物。結果,該銀與路接觸,其形 成觸點但不一定是可靠的電子互連。_ _____- 12 - 本紙乐尺度適用中S國家標準i CNS ) Λ4規格(2!0乂 297公釐) I—J^衣 訂 i » (锖先閱讀背面之注意事項再填寫本頁)
Claims (1)
- 經濟部中央標準局員工消費合作社印製 ^ ^ 0〇 5 \4 AS BS C8 DS 六、申請專利範圍 1. 一種用以於半導體裝置上形成導電凸粒之方法,其包括 之下列步驟: 提供具有多個凸粒墊(22)之半導體晶粒: 於該各多個*粒墊上形成晶種層(1 6): 於該晶種層上形成錫層(40):及 於各多個凸粒墊(22)上形成共晶層,使得共晶層 能(42)覆蓋錫層。 2. 如申請專利範圍第1項之方法,尚包括在形成錫層之步 騾前及形成晶種層之步驟後,於該各多個ώ粒墊(22)上 形成銅層(3 6)之步驟。 _ 3. 如申請專利範圍第1項之方法,尚包括在各多個導電凸 粒墊(22)上並在沉積共晶層(48)之步驟前形成支座層 (4 6)之步辕。 4. 如申請專利範圍第3項之方法,其中支座層(46)係在沉積 錫層(40)之步騍後形成。 5. —種於半導體裝置上形成導電ώ粒工方法’此方法包括 之步驟如下: 提供具有互連位置(22)之半導體裝置: 於該互連位置上形成晶種層(1 6): 形成晶種層上含銅之第一層(3 6): 使用蒸發方法於該第一層(3 6)上形成含錫之第二層 (38): 使用蒸發方法形成含鉛之第三層(46): 於該第三層(4 6)上形成含共晶材枓(4 8)之第四層: -13 - 本紙張尺度適用中國國家標準(CNS ) Α4規格(210Χ297公煃) --Ί ---------裝------ΪΤ------線 (請先閱讀背面之注意事項再填寫本頁) 5 ο 89 Λ—4 8 8 8 8 ABCD 々、申請專利範圍回流該第四層(48)以在互連位置(22)上形成共晶凸粒 ,其中第四層(48)於回流後實質上圍繞第三層(46)。 經濟部中央標隼局員工消費合作社印製 -14 - (請先聞讀背面之注意事項再填寫本頁)本纸張尺度適用中國國家標孪(CNS ) Α4規格(210Χ297公釐)
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-
1998
- 1998-01-30 US US09/015,956 patent/US6107180A/en not_active Expired - Lifetime
-
1999
- 1999-01-15 TW TW088100601A patent/TW419805B/zh not_active IP Right Cessation
- 1999-01-27 JP JP01856099A patent/JP4334647B2/ja not_active Expired - Fee Related
- 1999-01-27 KR KR1019990002501A patent/KR100632712B1/ko not_active IP Right Cessation
- 1999-01-28 CN CNB991016068A patent/CN1154167C/zh not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN103094246A (zh) * | 2011-11-08 | 2013-05-08 | 台湾积体电路制造股份有限公司 | 钝化后互连结构及其形成方法 |
Also Published As
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JPH11274200A (ja) | 1999-10-08 |
US6107180A (en) | 2000-08-22 |
CN1224926A (zh) | 1999-08-04 |
JP4334647B2 (ja) | 2009-09-30 |
CN1154167C (zh) | 2004-06-16 |
KR100632712B1 (ko) | 2006-10-13 |
KR19990068153A (ko) | 1999-08-25 |
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