CN106887420A - 凸块构造与其构成的内连结构 - Google Patents

凸块构造与其构成的内连结构 Download PDF

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Publication number
CN106887420A
CN106887420A CN201610018506.4A CN201610018506A CN106887420A CN 106887420 A CN106887420 A CN 106887420A CN 201610018506 A CN201610018506 A CN 201610018506A CN 106887420 A CN106887420 A CN 106887420A
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China
Prior art keywords
copper
pad
projection cube
cube structure
substrate
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CN201610018506.4A
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English (en)
Inventor
楼百尧
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Dunnan Science And Tech Co Ltd
Lite On Semiconductor Corp
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Dunnan Science And Tech Co Ltd
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Publication of CN106887420A publication Critical patent/CN106887420A/zh
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Abstract

本发明公开一种凸块结构，包括一焊盘，以及一钝化层，覆盖该接垫的周缘，其中所述钝化层包含一开口，显露出所述焊盘的部分表面区域。一第一部位，位于所述焊盘上，所述第一部位包含一上表面及一侧壁。一第二部位，覆盖在所述第一部位的上表面及其全部的侧壁上。

Description

凸块构造与其构成的内连结构
【技术领域】
本发明概括而言涉及凸块技术领域，特别是关于一种凸块构造，以及包含所述凸块构造，并且位于一半导体芯片(或晶圆)与一基板之间的内连结构，特别适用于具有细微间距的三维(three-dimensional，3D)覆晶接合(flip-chip bonding)或三维集成电路(integrated circuit，IC)的封装。
【背景技术】
覆晶技术为本领域公知的一种技术，可将半导体器件，例如集成电路芯片，通过设置在芯片焊垫上的焊锡凸块，连接至外部电路。焊锡凸块是在晶圆制作工艺最后的步骤阶段中，设置在晶圆顶面的芯片焊垫上。为了将所述芯片安装到外部电路(例如电路板、另一个芯片，或另一片晶圆)上，必须翻转芯片，使其顶面朝向下方，并将芯片焊垫与外部电路的配对焊垫对齐，接着进行焊锡的回流焊，以完成芯片与外部电路之间的连接。
球栅数组(Ball grid array，BGA)基板上覆晶的方法，通常包含翻转具有凸块的芯片并安装至BGA基板上、填充底层填料、模塑、附着焊锡球、切割分离等步骤。为了提高焊接点的密度，焊锡球的尺寸持续地微缩。例如，目前BGA基板使用直径0.5毫米(mm)、间距1毫米的焊锡球，将封装体安装至印刷电路板上。而封装体内使用的微凸块，直径通常小于100微米(μm)。
目前，覆晶封装是微处理器以及专用集成电路(application-specificintegrated circuit，ASIC)芯片封装时主要采用的技术。几乎大多应用处理器都已采用覆晶封装。一般而言，这种封装技术是采用焊锡来连接，是一种制作于有机基板上的铅锡(PbSn)共镕合金。为了解决电子迁移问题，许多微处理器的封装已采用铜柱的凸块结构。覆晶封装目前也采用铜柱的凸块结构，作为达到细微间距封装的主要解决方案。铜柱凸块可包含细小的铜圆柱体。不同于焊锡，所述铜圆柱体可在组装过程中维持原本的形状。
一般而言，会在半导体晶粒的铜柱凸块的自由端上，以镕融涂布的方式，形成一预定体积的焊锡。所述焊锡经过回流焊后会镕融，藉由镕融的焊锡，可在铜柱凸块的自由端与基板的连接点之间形成内连结构。。
【发明内容】
本发明的主要目的为提供一改良的铜柱凸块结构，以及提供一位于半导体芯片和基板之间，且包含所述铜柱凸块的内连结构。本发明提供的铜柱凸块结构以及内连结构，特别适用于具有细微间距的三维(3D)覆晶接合或三维集成电路的封装。
本发明一方面提供一种凸块结构，包括一焊盘；一钝化层，覆盖该接垫的周缘，其中所述钝化层包含一开口，显露出所述焊盘的部分表面区域；一第一部位，位于所述焊盘上，所述第一部位包含一上表面及一侧壁；及一第二部位，覆盖在所述第一部位的上表面及其全部的侧壁上。
根据本发明一实施例，所述第二部位直接接触到所述钝化层。
根据本发明一实施例，所述焊盘是一金属焊盘，所述第一部位包含铜。根据本发明一实施例，所述第二部位是由纯锡构成。所述金属焊盘包含铜、铝铜合金、或铝硅铜合金。
本发明另一方面提供一种内连结构，用来电连接一半导体晶粒与一基板。所述内连结构包含一第一部位，延伸于所述半导体晶粒与所述基板的一接触表面之间；一第二部位，覆盖在所述第一部位的整个的侧壁上；及一接口层，位于所述第一部位与所述基板的接触表面之间，其中所述接口层仅单纯由一铜锡金属间化合物所构成。
根据本发明一实施例，所述铜锡金属间化合物包含Cu6Sn5、Cu3Sn、或以上的组合。所述基板包含有机基板、导线架、或晶圆。
无庸置疑的，该领域的技术人士读完接下来本发明较佳实施例的详细描述与图式后，均可了解本发明的目的。
【附图说明】
所附图式提供对于此实施例更深入的了解，并纳入此说明书成为其中一部分。这些图式与描述，用来说明一些实施例的原理。图式中:
图1是本发明一实施例的示意性剖面图，说明一位于一半导体晶粒与一基板之间的内连结构。
图2是本发明一实施例的凸块结构的示意性剖面图。
图3到图7是本发明提供的制作如图2的凸块结构的方法的示意性剖面图。
图8是本发明另一实施例的凸块结构的示意性剖面图，其中的凸块结构具有焊锡帽盖。
须注意的是所有图式均为示意图，以说明和制图方便为目的，相对尺寸及比例都经过调整。相同的符号在不同的实施例中代表相对应或类似的特征。
【主要组件符号说明】
100 半导体器件
11，31 凸块结构
10 半导体晶粒
10a 表面
12 内连结构
20 基板
20a 接触面
102 焊盘
110 钝化层
110a 开口
113 凸块下金属层
111，121 第一部位
112，122 第二部位
123 第三部位
111' 金属镀膜层
111a 顶面
111b 侧壁
121a 侧壁
311 铜柱体
312 盖层
314 焊锡帽盖
210 图案化光刻胶层
210a 开口
T 厚度
t1 厚度
t2 厚度
【具体实施方式】
在下面的描述中，已提供许多具体细节以便彻底理解本发明。然而，很明显，对本领域技术人员而言，本发明还是可以在没有这些具体细节的情况下实施。此外，一些公知的系统配置和制程步骤没有被巨细靡遗的披露出来，因为这些应是本领域技术人员所熟知的。
同样地，例示的装置的实施例的附图是半示意且未按比例绘制，并且，附图中为了清楚呈现，某些尺寸可能被放大。此外，公开和描述多个实施例中具有通用的某些特征时，相同或类似的特征通常以相同的附图标记描述，以方便于说明和描述。
另外，为了容易说明，在此可以使用空间相对术语，例如“在…之下”，“在...下面”，“下部”，“在…之上”，“上部”等等，以描述一个元素或特征与另外一个或多个元素或特征的关系，如附图中绘示的。应理解除了附图中描述的定位之外，空间相对术语也包含装置在使用或操作时的不同定位。例如，如果附图中的组件被翻转，则原本描述中位在其他元素或特征“之下”或“下面”的元素，将被定位为在其它元素或特征“之上”。因此，例示性术语“在…之下”可依实际的空间相对关系，包含“之上”和“之下”的两个定位。组件也可以是其他的定位，例如旋转90度或以设置成其它定位，在此使用的空间相对术语也可相应地解释。
在此使用的术语仅是为了描述特殊实施方案的目的，而不应视为是本发明的限制。例如在此使用的，单数形式“一个”、“一种”和“所述”，除非上下文另外清楚地指明，否则也视为包括复数形式。此外，应进一步理解，本说明书中使用的术语“包含”和/或“包括”，是用来具体说明所述特征、整体、步骤、工序、器件和/或组分的存在，但是并不排除一个或多个其它特征、整体、步骤、工序、器件、组分和/或其组合的存在或增加。应进一步理解，在本说明书中，“晶粒”、“半导体芯片”与“半导体晶粒”具相同含意，可交替使用。
图1是根据本发明一实施例的半导体封装的局部示意性剖面图，其中包含内连结构12，是用来电性连接半导体晶粒(或晶圆)10与基板20。如图1所示，半导体晶粒10是通过内连结构12，电性连接至基板20。根据本发明一实施例，基板20可包含有机基板、引线框基板、晶圆、封装基板、封装芯片、芯片、电路基板或基板等，但不限于此。基板20可包含接触面20a，适用来与内连结构12对应并接合。
根据本发明一实施例，内连结构12具有小于或等于50微米(μm)的高度或厚度，T。在一些实施例中，半导体晶粒10与基板20之间可包含模塑料(图未示)，包围内连结构12。根据本发明一实施例，并未使用焊锡。因此，公知工艺中焊锡回流焊的步骤可以被省略。
需了解的是，在一些实施例中，半导体晶粒10并不是以覆晶的方式安装至基板20上。例如，在一些实施例中，半导体晶粒10可为影像感测芯片，而内连结构12是用来电性连接所述影像感测芯片背面的焊盘与基板20的接触面20a。除了上述晶粒对晶圆接合的结构，内连结构12也可应用在晶圆对晶圆接合的结构中。例如，在晶圆对晶圆接合的结构中，图1中的半导体晶粒10由一晶圆取代。
根据本发明一实施例，适合的基板20的接触面20a可例如是具有暴露的铜表面的铜焊盘。根据本发明一实施例，适用的基板20的接触面20a可暂时性地被一表面处理层(surface finish layer)覆盖，例如有机保焊剂(organic solderabilitypreservatives，OSP)，以避免接触面20a在组装前发生氧化。有机保焊剂可包含例如苯并三唑(benzotriazole)、苯并咪唑(benzimidazole)或其衍生物的材料。根据本发明一实施例，所述有机保焊剂并不包含镍/金(Ni/Au)。
根据本发明一实施例，内连结构12包含第一部位121，延伸于半导体晶粒10的表面10a与基板20的接触面20a之间。根据本发明一实施例，表面10a可为半导体晶粒10的有源面。半导体晶粒10是被翻转的，使其有源面得以面对基板20的接触面20a。根据本发明另一实施例，表面10a可为半导体晶粒10的背面。
根据本发明一实施例，第一部位121可由均质的第一材料所构成。第一材料包含导电材料。例如，第一部位121可以是由纯铜构成的铜柱体，可通过电镀法制得。第一部位121可直接设置在位于表面10a的导电焊盘(图未示)上。需理解的是，表面10a可以被钝化层(图未示)覆盖，但不限于此。
根据本发明一实施例，第一部位121包含垂直的侧壁121a。根据本发明一实施例，整个侧壁121a都被第二部位122覆盖。根据本发明一实施例，第二部位122可由均质的第二材料所构成。根据本发明一实施例，第二材料包含导电材料，例如金属元素，但并不限于此。根据本发明一实施例，第二部位122可以是由纯锡(Sn)构成，并可藉由无电镀、浸润或短时间浸泡的制作方法形成，但并不限于此。根据本发明一实施例，第二部位122可具有小于或等于10微米的厚度。
第二部位122可避免第一部位121的侧壁121a被氧化，并且可用来湿润(Wetting)第一部位121的表面，具有帮助接合的功用。第二部位122可用其他合适的方法，例如电镀、真空蒸镀、溅镀，或化学气相沉积等方法制得，但并不限于此。在一些实施例中，半导体晶粒10的表面10a被钝化层覆盖，第二部位122可直接与钝化层直接接触。
根据本发明一实施例，内连结构12另包含位于第一部位121与接触面20a之间的第三部位123。根据本发明一实施例，第三部位123为单纯由铜锡金属间化合物(copper-tinintermetallic compound)构成的薄界面层，是由第一部位121的铜、接触面20a的铜，与预先设置在第一部位121和接触面20a之间的纯锡薄层反应而形成。先将纯锡薄层设置在第一部位121和接触面20a之间，接着在后续的热压合工艺或在一温度，例如260度至300度，之下的褪火工艺中，所述纯锡薄层会完全被反应消耗掉，形成所述铜锡金属间化合物。根据本发明一实施例，形成的铜锡金属间化合物可包含Cu6Sn5、Cu3Sn或其组合，但并不限于此。第三部位123提供了第一部位121(铜柱体)与基板20的接触面20a之间一可靠且牢固的接合。
图2是根据本发明另一实施例，一具有凸块结构11的半导体器件100的示意性剖面图。如图2所示，半导体器件100包含半导体晶粒10，并且半导体晶粒10的表面10a被钝化层110覆盖。根据本发明一实施例，钝化层110可包含，例如氧化硅、氮化硅，或聚酰亚胺(polyimide)等材料，但并不限于此。半导体晶粒10的表面10a具有焊盘102。根据本发明一实施例，焊盘102是金属焊盘，例如是铜焊盘。一般而言，焊盘102的周缘被钝化层110覆盖，且焊盘102的中间区域自钝化层110的开口110a暴露出来。凸块结构11即是通过开口110a，制作在焊盘102上。
根据本发明一实施例，凸块结构11包含第一部位111(铜柱凸块)，和第二部位112(盖层)。其中，第二部位112共形的覆盖住第一部位111的顶面111a和侧壁111b。根据本发明一实施例，凸块结构11可另包含凸块下金属层(under-bump-metallurgy，UBM)113，设于第一部位111和焊盘102之间。根据本发明一实施例，第一部位111可由纯铜构成，但不限于此。根据本发明一实施例，第二部位112可由纯锡构成，并以无电镀工艺制得，但并不限于此。根据本发明一实施例，第二部位112共形的覆盖住第一部位111的整个侧壁111b。根据本发明一实施例，第二部位112与钝化层110直接接触。
根据本发明另一实施例，第二部位112可单独选自以下群组：镍/金、镍钯金、镍/银、金、锡-铅合金、银、有机保焊剂(OSPs)，及以上的组合。适用的有机保焊剂包含苯并三唑(benzotriazole)、苯并咪唑(benzimidazole)，或其个别的衍生物。
在一些实施例中，凸块下金属层113可包含一扩散阻障层(或黏着层)，其由钛(titanium)、钽(tantalum)、氮化钛(titanium nitride)，或氮化钽(tantalum nitride)等材料构成，但并不限于此。根据本发明另一实施例，所述扩散阻障层具有介于500至2000埃之间的沉积厚度，但并不限于此。在一些实施例中，凸块下金属层113可另包含一晶种层(seed layer)，例如是铜层或铜合金层。根据本发明另一实施例，所述晶种层可具有介于500至2000埃之间的沉积厚度，但并不限于此。根据本发明一实施例，第一部位111和凸块下金属层113两者的总厚度为t1，其中t1为例如小于或等于45微米(μm)。根据本发明一实施例，第二部位112的厚度为t2，其中，t2例如介于1到10微米(μm)之间，并且t1与t2的总和小于或等于50微米。
图3到图7是本发明制作如图2的凸块结构的方法的示意性剖面图。首先，请参考图3，提供一半导体晶粒10。虽然图中并未绘示，但应可理解半导体晶粒10中可包含多个半导体器件，例如金属氧化物半导体(MOS)晶体管，和电路结构，例如金属内连结构。半导体晶粒10的表面10a被钝化层110覆盖。
根据本发明一实施例，钝化层110可为半导体晶粒10的最顶层介电层，但并不限于此。根据本发明一实施例，钝化层110可包含，例如氧化硅、氮化硅、聚酰亚胺(polyimide)等材料，但并不限于此。半导体晶粒10的表面10a上设置有焊盘102。根据本发明一实施例，焊盘102为金属焊盘，优选为铜焊盘。根据本发明一实施例，焊盘102可为半导体晶粒10的最顶金属层，但并不限于此。一般而言，焊盘102的周缘被钝化层110覆盖，焊盘102的中间区域自钝化层110的开口110a暴露出来。
开口110a可通过公知的光刻工艺和蚀刻工艺制作而成。形成开口110a后，接着全面性的在表面10a上沉积凸块下金属层113。凸块下金属层113共形的覆盖钝化层110、开口110a以及焊盘102暴露出来的区域。凸块下金属层113可包含一扩散阻障层(或黏着层)，其由钛(titanium)、钽(tantalum)、氮化钛(titanium nitride)，或氮化钽(tantalumnitride)等材料构成，但并不限于此。根据本发明另一实施例，所述扩散阻障层具有介于500至2000埃之间的沉积厚度，但并不限于此。在一些实施例中，凸块下金属层113可另包含一晶种层(seed layer)，例如是铜层或铜合金层。根据本发明另一实施例，所述晶种层可具有介于500至2000埃之间的沉积厚度，但并不限于此。
请参考图4。接着，在表面10a上形成一图案化光刻胶层(或屏蔽层)210。图案化光刻胶层210包含一大致上与焊盘102对齐的开口210a。形成图案化光刻胶层210的方法可为所属领域公知的光刻工艺。根据本发明另一实施例，图案化光刻胶层210的厚度大致上等于形成在开口210a中的铜凸块或铜柱体的厚度。
接着如图5所示，通过镀膜工艺，在开口210a中填满一金属镀膜层111’，例如是铜金属。金属镀膜层111’可以通过例如电化学沉积(electro-chemical deposition，ECD)工艺形成，但并不限于此。根据本发明一实施例，金属镀膜层111’优选者具有介于40微米至50微米之间的沉积厚度。在其他实施例中，金属镀膜层111’也可以通过无电镀工艺、化学气相沉积工艺或物理气相沉积工艺而形成。
请参考图6。镀膜工艺完成后，接着将图案化光刻胶层210移除，暴露出凸块下金属层113，而原本填充在开口210a中的铜层即形成铜柱体111。接着，将未被铜柱体111覆盖的凸块下金属层113移除。凸块下金属层113可以通过所属领域公知的湿蚀刻或干蚀刻工艺，以自对准的方式被移除。形成的铜柱体111包含顶面111a和侧壁111。
请参考图7。接着，进行一无电镀工艺，形成一共形的覆盖住铜柱体111顶面111a和侧壁111的盖层112。根据本发明一实施例，盖层112是由纯锡构成。根据本发明另一实施例，盖层112可单独选自以下群组：镍/金、镍钯金、镍/银、金、锡-铅合金、银、有机保焊剂(OSPs)，及以上的组合。适用的有机保焊剂包含苯并三唑(benzotriazole)、苯并咪唑(benzimidazole)，或其个别的衍生物。根据本发明一实施例，盖层112的厚度可介于1微米至10微米之间。
图8为本发明另一实施例的示意性剖面图，其中，凸块结构具有焊锡帽盖。图中与前文相同或类似的特征以相同的附图标记描述。如图8所示，半导体晶粒10的表面10a上设有凸块结构31。凸块结构31包含自表面10a凸出的铜柱体311。铜柱体311包含顶面311a和侧壁311b。盖层312共形的设置在顶面311a和侧壁311b上。盖层312可单独选自以下群组：镍/金、镍钯金、镍/银、金、锡-铅合金、银、有机保焊剂(OSPs)，及以上的组合。适用的有机保焊剂包含苯并三唑(benzotriazole)、苯并咪唑(benzimidazole)，或其个别的衍生物。根据本发明一实施例，盖层312的厚度可介于1微米至10微米之间。凸块结构31另包含一预定体积的焊锡帽盖314，直接设置在盖层312上并邻近铜柱体311的末端。焊锡帽盖314可包含具回流性和可焊性的材料，例如锡铅共熔焊锡或无铅焊锡。
以上所述仅为本发明之较佳实施例，该领域中的技术人士可轻易知道在本发明的教示范围内，依然可做许多修改。因此，凡依本发明申请专利范围所做之均等变化与修饰，皆应属本发明之涵盖范围。

Claims (17)

1.一种凸块结构，其特征在于，包括：
一焊盘；
一钝化层，覆盖所述焊盘的周缘，其中所述钝化层包含一开口，显露出所述焊盘的部分表面区域；
一第一部位，位于所述焊盘上，所述第一部位包含一上表面及侧壁；及
一第二部位，覆盖在所述第一部位的所述上表面及其全部的所述侧壁上。
2.根据权利要求1所述的凸块结构，其特征在于，所述第二部位直接接触到所述钝化层。
3.根据权利要求1所述的凸块结构，其特征在于，所述焊盘是一金属焊盘。
4.根据权利要求3所述的凸块结构，其特征在于，所述金属焊盘包含铜、铝铜合金、或铝硅铜合金。
5.根据权利要求1所述的凸块结构，其特征在于，所述第一部位包含铜。
6.根据权利要求5所述的凸块结构，其特征在于，所述第二部位是由纯锡构成。
7.根据权利要求1所述的凸块结构，其特征在于，所述第二部位选自以下群组：镍/金、镍钯金、镍/银、金、锡-铅合金、银、有机保焊剂，及以上的组合。
8.根据权利要求1所述的凸块结构，其特征在于，所述第二部位的厚度介于1微米至10微米之间。
9.一种内连结构，用来电连接一半导体晶粒与一基板，其特征在于，包括：
一第一部位，延伸于所述半导体晶粒与所述基板的一接触表面之间；
一第二部位，覆盖在所述第一部位的整个的侧壁上；及
一接口层，位于所述第一部位与所述基板的所述接触表面之间，其中所述接口层仅单纯由一铜锡金属间化合物所构成。
10.根据权利要求9所述的内连结构，其特征在于，所述基板包含有机基板、导线架、或晶圆。
11.根据权利要求9所述的内连结构，其特征在于，所述铜锡金属间化合物包含Cu6Sn5、Cu3Sn、或以上的组合。
12.根据权利要求9所述的内连结构，其特征在于，所述第一部位是由一均质的第一材料所构成，而所述第二部位是由一均质的第二材料所构成。
13.根据权利要求12所述的内连结构，其特征在于，所述均质的第一材料包含铜。
14.根据权利要求12所述的内连结构，其特征在于，所述均质的第二材料包含一金属元素。
15.根据权利要求14所述的内连结构，其特征在于，所述金属元素包含锡。
16.根据权利要求14所述的内连结构，其特征在于，所述第二部位的厚度介于1微米至10微米。
17.一种内连结构，用来电连接两片晶圆，其特征在于，包括：
一第一部位，延伸于一第一晶圆与一第二晶圆之间；
一第二部位，覆盖在所述第一部位的整个的侧壁上；及
一界面层，位于所述第一部位与所述第一晶圆或第二晶圆的一接触表面之间，其中所述接口层仅单纯由一铜锡金属间化合物所构成。
CN201610018506.4A 2015-12-16 2016-01-12 凸块构造与其构成的内连结构 Pending CN106887420A (zh)

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