SG160302A1 - Method for manufacturing semiconductor substrate - Google Patents

Method for manufacturing semiconductor substrate

Info

Publication number
SG160302A1
SG160302A1 SG200906194-6A SG2009061946A SG160302A1 SG 160302 A1 SG160302 A1 SG 160302A1 SG 2009061946 A SG2009061946 A SG 2009061946A SG 160302 A1 SG160302 A1 SG 160302A1
Authority
SG
Singapore
Prior art keywords
insulating film
semiconductor substrate
semiconductor layer
base substrate
irradiating
Prior art date
Application number
SG200906194-6A
Other languages
English (en)
Inventor
Motomu Kurata
Shinya Sasagawa
Taiga Muraoka
Original Assignee
Semiconductor Energy Lab
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Lab filed Critical Semiconductor Energy Lab
Publication of SG160302A1 publication Critical patent/SG160302A1/en

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Thin Film Transistor (AREA)
  • Element Separation (AREA)
SG200906194-6A 2008-09-29 2009-09-17 Method for manufacturing semiconductor substrate SG160302A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008251335 2008-09-29

Publications (1)

Publication Number Publication Date
SG160302A1 true SG160302A1 (en) 2010-04-29

Family

ID=42057899

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200906194-6A SG160302A1 (en) 2008-09-29 2009-09-17 Method for manufacturing semiconductor substrate

Country Status (5)

Country Link
US (1) US8383491B2 (enExample)
JP (1) JP5666794B2 (enExample)
KR (1) KR101576815B1 (enExample)
SG (1) SG160302A1 (enExample)
TW (1) TWI529805B (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5142831B2 (ja) * 2007-06-14 2013-02-13 株式会社半導体エネルギー研究所 半導体装置及びその作製方法
US20120021588A1 (en) * 2010-07-23 2012-01-26 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing soi substrate and semiconductor device
JP5902917B2 (ja) * 2010-11-12 2016-04-13 株式会社半導体エネルギー研究所 半導体基板の作製方法
US8842358B2 (en) 2012-08-01 2014-09-23 Gentex Corporation Apparatus, method, and process with laser induced channel edge
AT515945B1 (de) * 2014-09-05 2016-01-15 Piezocryst Advanced Sensorics Sensorelement
US11127601B2 (en) * 2019-05-21 2021-09-21 Applied Materials, Inc. Phosphorus fugitive emission control
CN112599470B (zh) * 2020-12-08 2024-10-29 上海新昇半导体科技有限公司 一种绝缘体上硅结构及其方法

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ATE259098T1 (de) 1990-08-03 2004-02-15 Canon Kk Verfahren zur herstellung eines soi-substrats
US5750000A (en) 1990-08-03 1998-05-12 Canon Kabushiki Kaisha Semiconductor member, and process for preparing same and semiconductor device formed by use of same
CA2069038C (en) 1991-05-22 1997-08-12 Kiyofumi Sakaguchi Method for preparing semiconductor member
CN1132223C (zh) 1995-10-06 2003-12-24 佳能株式会社 半导体衬底及其制造方法
SG65697A1 (en) 1996-11-15 1999-06-22 Canon Kk Process for producing semiconductor article
US6054363A (en) 1996-11-15 2000-04-25 Canon Kabushiki Kaisha Method of manufacturing semiconductor article
JP3324469B2 (ja) * 1997-09-26 2002-09-17 信越半導体株式会社 Soiウエーハの製造方法ならびにこの方法で製造されるsoiウエーハ
JPH11163363A (ja) 1997-11-22 1999-06-18 Semiconductor Energy Lab Co Ltd 半導体装置およびその作製方法
JPH11307472A (ja) 1998-04-23 1999-11-05 Shin Etsu Handotai Co Ltd 水素イオン剥離法によってsoiウエーハを製造する方法およびこの方法で製造されたsoiウエーハ
JP4379927B2 (ja) * 1998-05-27 2009-12-09 信越半導体株式会社 Soiウエーハの製造方法およびsoiウエーハ
JP2000012864A (ja) 1998-06-22 2000-01-14 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法
US20020089016A1 (en) 1998-07-10 2002-07-11 Jean-Pierre Joly Thin layer semi-conductor structure comprising a heat distribution layer
JP2000077287A (ja) * 1998-08-26 2000-03-14 Nissin Electric Co Ltd 結晶薄膜基板の製造方法
JP4476390B2 (ja) 1998-09-04 2010-06-09 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP2000124092A (ja) 1998-10-16 2000-04-28 Shin Etsu Handotai Co Ltd 水素イオン注入剥離法によってsoiウエーハを製造する方法およびこの方法で製造されたsoiウエーハ
JP4379943B2 (ja) * 1999-04-07 2009-12-09 株式会社デンソー 半導体基板の製造方法および半導体基板製造装置
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US6583440B2 (en) 2000-11-30 2003-06-24 Seiko Epson Corporation Soi substrate, element substrate, semiconductor device, electro-optical apparatus, electronic equipment, method of manufacturing the soi substrate, method of manufacturing the element substrate, and method of manufacturing the electro-optical apparatus
EP1662549B1 (en) * 2003-09-01 2015-07-29 SUMCO Corporation Method for manufacturing bonded wafer
JP5110772B2 (ja) 2004-02-03 2012-12-26 株式会社半導体エネルギー研究所 半導体薄膜層を有する基板の製造方法
JP2005251912A (ja) * 2004-03-03 2005-09-15 Seiko Epson Corp 複合半導体基板の製造方法、複合半導体基板、電気光学装置および電子機器
JP4730581B2 (ja) 2004-06-17 2011-07-20 信越半導体株式会社 貼り合わせウェーハの製造方法
CN100458871C (zh) 2004-09-14 2009-02-04 东芝松下显示技术有限公司 显示器、阵列基板以及显示器制造方法
JP4977999B2 (ja) * 2005-11-21 2012-07-18 株式会社Sumco 貼合せ基板の製造方法及びその方法で製造された貼合せ基板
US7579654B2 (en) * 2006-05-31 2009-08-25 Corning Incorporated Semiconductor on insulator structure made using radiation annealing
US7608521B2 (en) 2006-05-31 2009-10-27 Corning Incorporated Producing SOI structure using high-purity ion shower
US7811900B2 (en) 2006-09-08 2010-10-12 Silicon Genesis Corporation Method and structure for fabricating solar cells using a thick layer transfer process
JP5463017B2 (ja) * 2007-09-21 2014-04-09 株式会社半導体エネルギー研究所 基板の作製方法
JP5411438B2 (ja) * 2008-03-18 2014-02-12 信越化学工業株式会社 Soi基板の製造方法
US8003483B2 (en) 2008-03-18 2011-08-23 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate

Also Published As

Publication number Publication date
JP2010103515A (ja) 2010-05-06
US8383491B2 (en) 2013-02-26
US20100081253A1 (en) 2010-04-01
KR20100036209A (ko) 2010-04-07
KR101576815B1 (ko) 2015-12-11
TW201030850A (en) 2010-08-16
TWI529805B (zh) 2016-04-11
JP5666794B2 (ja) 2015-02-12

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