KR950034830A - 전계 효과 트랜지스터 및 이 트랜지스터의 제조 방법 - Google Patents
전계 효과 트랜지스터 및 이 트랜지스터의 제조 방법 Download PDFInfo
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- KR950034830A KR950034830A KR1019950005407A KR19950005407A KR950034830A KR 950034830 A KR950034830 A KR 950034830A KR 1019950005407 A KR1019950005407 A KR 1019950005407A KR 19950005407 A KR19950005407 A KR 19950005407A KR 950034830 A KR950034830 A KR 950034830A
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- South Korea
- Prior art keywords
- layer
- gate
- deposited
- active
- active layer
- Prior art date
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- 230000005669 field effect Effects 0.000 title claims abstract 6
- 238000004519 manufacturing process Methods 0.000 title claims abstract 3
- 239000000758 substrate Substances 0.000 claims abstract 5
- 238000005530 etching Methods 0.000 claims abstract 2
- 239000004065 semiconductor Substances 0.000 claims 5
- 150000001875 compounds Chemical class 0.000 claims 3
- 239000002184 metal Substances 0.000 claims 2
- 238000000034 method Methods 0.000 claims 1
- 239000003870 refractory metal Substances 0.000 claims 1
- 125000006850 spacer group Chemical group 0.000 claims 1
- 230000002093 peripheral effect Effects 0.000 abstract 1
- 229920002120 photoresistant polymer Polymers 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66848—Unipolar field-effect transistors with a Schottky gate, i.e. MESFET
- H01L29/66856—Unipolar field-effect transistors with a Schottky gate, i.e. MESFET with an active layer made of a group 13/15 material
- H01L29/66863—Lateral single gate transistors
- H01L29/66878—Processes wherein the final gate is made before the formation, e.g. activation anneal, of the source and drain regions in the active layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0843—Source or drain regions of field-effect devices
- H01L29/0891—Source or drain regions of field-effect devices of field-effect transistors with Schottky gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1025—Channel region of field-effect devices
- H01L29/1029—Channel region of field-effect devices of field-effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
- H01L29/812—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a Schottky gate
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
전계 효과 트랜지스터(10)는 기판(12)내에 형성된 활성층(16)을 갖는다. 게이트(20)는 활성층(16)으로부터 형성된 고가 플랫폼(18)상에 침착된다. 고가 플랫폼(18)은 게이트(20)의 한쪽 측면상에서 활성 영역(13)의 상부 표면(34,36)보다 게이트(20)의 바닥 표면(21)을 높게 한다. 트랜지스터(10) 제조 방법은 게이트(20)의 바닥 표면이 주변 활성 영역(13)의 상부 표면에 비해 올라가도록 게이트(20)의 양쪽 측면에서 활성 영역표면(44)을 에칭함으로써 고가 플랫폼(18)을 형성한다. 게이트(20) 및/또는 패턴화된 포토레지스트층(116)이 이러한 에지를 수행하기 위한 마스크로서 사용될 수 있다.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 일 실시예에 따른 MESFET 구조를 예시하는 단면도, 제7도는 본 발명의 선택적인 실시예에 따른 MESFET 구조를 예시하는 단면도.
Claims (6)
- 전계 효과 트랜지스터(10)에 있어서, 자신의 상부에 활성 영역(13)을 갖고 있는 화합물 반도체기판(12)과; 상기 기판의 상기 활성 영역내에 침착되며 고가 플랫폼(18)을 갖고 있는 활성층(16)과; 상기 활성층의 제1엔드(end)와 접촉하여 침착되어 있는 소스 영역(26) 및, 상기 활성층의 제2엔드와 접촉하여 침착되되 상기 고가 플랫폼보다 그 높이가 낮은 드레인 영역(28) 및; 상기 고가 플랫폼상에 직접 침착되어 상기 게이트층과 상기 활성층 사이에 쇼트키 접합을 형성하는 게이트층(20)을 포함하는 전계 효과 트랜지스터.
- 금속 반도체 전계 효과 트랜지스터(10)에 있어서, 필드 산화물층(14)이 자신의 상부에 침착되어 표면부에서 활성영역(13)을 규정하고 있는 화합물 반도체 기판(12)과; 상기 활성 영역내에 침착되며 고가 플랫폼(18)을 갖고 있는 활성층(16)과; 상기 고가 플랫폼상에 직접 형성된 내화 금속 게이트(20) 및; 상기 게이트층의 양쪽 맞은편에서 상기 능동 영역내에 침착되되 상기 고가 플랫폼보다 그 높이들이 낮은 소스 및 드레인 영역(26,28)을 포함하는 금속 반도체 전계 효과 트랜지스터.
- 제2항에 있어서, 상기 소스 및 드레인 영역중 적어도 하나는 사실상 상기 게이트층에 대해 자기정렬되는 금속 반도체 전계 효과 트랜지스터.
- 자신의 상부에 침착되어 있는 활성층(18) 및, 이 활성층 상에 직접 형성되어 상기 활성층을 제1 및 제2부분으로 나누는 게이트층(20)을 갖고 있는 화합물 반도체 기판(12)상에 전계 효과 트랜지스터(10)를 제조하는 방법에 있어서, 상기 활성층의 상기 제1부분에 상기 게이트층의 바닥 표면 아래에 위치되는 오목한 표면(34)을 제공하기 위해 상기 활성층을 에칭하는 단계 및; 상기 게이트층의 양쪽 맞은편에 소스 및 드레인 영역을 형성하는 단계를 포함하는 전계 효과 트랜지스터 제조 방법.
- 제4항에 있어서, 상기 게이트층의 양쪽 맞은편에 그리고 이 게이트층에 인접하여 제1및 제2스페이서(22,24)를 형성하는 단계를 더 포함하는 전계 효과 트랜지스터 제조 방법.
- ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US23574594A | 1994-04-29 | 1994-04-29 | |
US235,745 | 1994-04-29 |
Publications (1)
Publication Number | Publication Date |
---|---|
KR950034830A true KR950034830A (ko) | 1995-12-28 |
Family
ID=22886749
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019950005407A KR950034830A (ko) | 1994-04-29 | 1995-03-16 | 전계 효과 트랜지스터 및 이 트랜지스터의 제조 방법 |
Country Status (5)
Country | Link |
---|---|
US (2) | US5508539A (ko) |
EP (1) | EP0680092B1 (ko) |
JP (1) | JPH07302805A (ko) |
KR (1) | KR950034830A (ko) |
DE (1) | DE69523088D1 (ko) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3761918B2 (ja) * | 1994-09-13 | 2006-03-29 | 株式会社東芝 | 半導体装置の製造方法 |
TW479364B (en) * | 1999-04-28 | 2002-03-11 | Koninkl Philips Electronics Nv | Method of manufacturing a semiconductor device comprising a field effect transistor |
US6531347B1 (en) * | 2000-02-08 | 2003-03-11 | Advanced Micro Devices, Inc. | Method of making recessed source drains to reduce fringing capacitance |
US6780703B2 (en) | 2002-08-27 | 2004-08-24 | Freescale Semiconductor, Inc. | Method for forming a semiconductor device |
US7033897B2 (en) * | 2003-10-23 | 2006-04-25 | Texas Instruments Incorporated | Encapsulated spacer with low dielectric constant material to reduce the parasitic capacitance between gate and drain in CMOS technology |
US7344951B2 (en) * | 2004-09-13 | 2008-03-18 | Texas Instruments Incorporated | Surface preparation method for selective and non-selective epitaxial growth |
US7335959B2 (en) * | 2005-01-06 | 2008-02-26 | Intel Corporation | Device with stepped source/drain region profile |
US7541239B2 (en) * | 2006-06-30 | 2009-06-02 | Intel Corporation | Selective spacer formation on transistors of different classes on the same device |
US9076817B2 (en) * | 2011-08-04 | 2015-07-07 | International Business Machines Corporation | Epitaxial extension CMOS transistor |
US8841709B2 (en) * | 2012-04-18 | 2014-09-23 | Macronix International Co., Ltd. | JFET device and method of manufacturing the same |
Family Cites Families (24)
Publication number | Priority date | Publication date | Assignee | Title |
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US4407004A (en) * | 1978-11-13 | 1983-09-27 | Xerox Corporation | Self-aligned MESFET having reduced series resistance |
CA1131367A (en) * | 1978-11-13 | 1982-09-07 | Keming W. Yeh | Self-aligned mesfet having reduced series resistance |
JPS5671980A (en) * | 1979-11-15 | 1981-06-15 | Mitsubishi Electric Corp | Schottky barrier gate type field effect transistor and preparation method thereof |
FR2493604A1 (fr) * | 1980-10-31 | 1982-05-07 | Thomson Csf | Transistors a effet de champ a grille ultra courte |
JPS57128071A (en) * | 1981-01-30 | 1982-08-09 | Fujitsu Ltd | Field-effect type semiconductor device and manufacture thereof |
US4587540A (en) * | 1982-04-05 | 1986-05-06 | International Business Machines Corporation | Vertical MESFET with mesa step defining gate length |
JPS5950567A (ja) * | 1982-09-16 | 1984-03-23 | Hitachi Ltd | 電界効果トランジスタの製造方法 |
JPS59152669A (ja) * | 1983-02-21 | 1984-08-31 | Mitsubishi Electric Corp | 電界効果トランジスタ |
GB2145558A (en) * | 1983-08-23 | 1985-03-27 | Standard Telephones Cables Ltd | Field effect transistor |
FR2557368B1 (fr) * | 1983-12-27 | 1986-04-11 | Thomson Csf | Transistor a effet de champ, de structure verticale submicronique, et son procede de realisation |
US4855246A (en) * | 1984-08-27 | 1989-08-08 | International Business Machines Corporation | Fabrication of a gaas short channel lightly doped drain mesfet |
JPS622665A (ja) * | 1985-06-28 | 1987-01-08 | Fujitsu Ltd | 半導体装置及びその製造方法 |
US4965218A (en) * | 1985-10-21 | 1990-10-23 | Itt Corporation | Self-aligned gate realignment employing planarizing overetch |
WO1987003742A1 (en) * | 1985-12-13 | 1987-06-18 | Allied Corporation | Mesfet device having a semiconductor surface barrier layer |
US4960718A (en) * | 1985-12-13 | 1990-10-02 | Allied-Signal Inc. | MESFET device having a semiconductor surface barrier layer |
JPS62262466A (ja) * | 1986-05-09 | 1987-11-14 | Toshiba Corp | Mes fetの製造方法 |
JPS63120471A (ja) * | 1986-11-08 | 1988-05-24 | Mitsubishi Electric Corp | シヨツトキ障壁ゲ−ト電界効果トランジスタ |
JPS6457759A (en) * | 1987-08-28 | 1989-03-06 | Sharp Kk | Field-effect-type semiconductor device |
JPH01161772A (ja) * | 1987-12-18 | 1989-06-26 | Fujitsu Ltd | 半導体装置およびその製造方法 |
JP2728427B2 (ja) * | 1988-04-13 | 1998-03-18 | 株式会社日立製作所 | 電界効果型トランジスタとその製法 |
JPH0444328A (ja) * | 1990-06-11 | 1992-02-14 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
EP0501275A3 (en) * | 1991-03-01 | 1992-11-19 | Motorola, Inc. | Method of making symmetrical and asymmetrical mesfets |
JPH05299441A (ja) * | 1992-04-24 | 1993-11-12 | Matsushita Electric Ind Co Ltd | 電界効果トランジスタの製造方法 |
DE69324630T2 (de) * | 1992-06-13 | 1999-10-21 | Sanyo Electric Co., Ltd. | Dotierungsverfahren, Halbleiterbauelement und Verfahren zu seiner Herstellung |
-
1995
- 1995-03-16 KR KR1019950005407A patent/KR950034830A/ko not_active Application Discontinuation
- 1995-04-18 EP EP95105789A patent/EP0680092B1/en not_active Expired - Lifetime
- 1995-04-18 DE DE69523088T patent/DE69523088D1/de not_active Expired - Lifetime
- 1995-04-20 US US08/425,733 patent/US5508539A/en not_active Expired - Lifetime
- 1995-04-26 JP JP7124516A patent/JPH07302805A/ja active Pending
-
1996
- 1996-01-17 US US08/587,434 patent/US5631175A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0680092A3 (en) | 1998-06-10 |
US5631175A (en) | 1997-05-20 |
DE69523088D1 (de) | 2001-11-15 |
EP0680092B1 (en) | 2001-10-10 |
US5508539A (en) | 1996-04-16 |
EP0680092A2 (en) | 1995-11-02 |
JPH07302805A (ja) | 1995-11-14 |
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A201 | Request for examination | ||
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E601 | Decision to refuse application |