JPS6457759A - Field-effect-type semiconductor device - Google Patents

Field-effect-type semiconductor device

Info

Publication number
JPS6457759A
JPS6457759A JP21596987A JP21596987A JPS6457759A JP S6457759 A JPS6457759 A JP S6457759A JP 21596987 A JP21596987 A JP 21596987A JP 21596987 A JP21596987 A JP 21596987A JP S6457759 A JPS6457759 A JP S6457759A
Authority
JP
Japan
Prior art keywords
gate electrode
source
gate
drain
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21596987A
Other languages
Japanese (ja)
Inventor
Toshihiko Yoshimasu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP21596987A priority Critical patent/JPS6457759A/en
Publication of JPS6457759A publication Critical patent/JPS6457759A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent increase of gate-source or gate-drain capacitance and to prevent deterioration in high-frequency characteristics, by providing a gate electrode which is in contact with a channel region in an area smaller than the size of the gate electrode. CONSTITUTION:An N-type channel region 5 in a semiconductor substrate 7 on which a gate electrode 2 is carried has a surface 5a to be in contact with the gate electrode 2 and the surface 5a has a length or effective gate length Lg2 that is smaller than an actual length Lg3 of the gate electrode 2. In other words, shoulders 5b and 5c of the N-type channel region 5 are inclined such that they reach down to an N<+> type source region 4 and an N<+> type drain region 6, respectively. Thereby, the N<+> type source and drain regions 4 and 6 are electrically isolated from the gate electrode 2. In this manner, the distance Lsd between the source and the drain can be shorter than the effective length Lg of the gate electrode without need of using any dielectric for isolating the N<+> type source and drain regions from the gate electrode 2 and without involving increase of gate-source capacitance Cgs and source-drain capacitance Cgd.
JP21596987A 1987-08-28 1987-08-28 Field-effect-type semiconductor device Pending JPS6457759A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21596987A JPS6457759A (en) 1987-08-28 1987-08-28 Field-effect-type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21596987A JPS6457759A (en) 1987-08-28 1987-08-28 Field-effect-type semiconductor device

Publications (1)

Publication Number Publication Date
JPS6457759A true JPS6457759A (en) 1989-03-06

Family

ID=16681238

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21596987A Pending JPS6457759A (en) 1987-08-28 1987-08-28 Field-effect-type semiconductor device

Country Status (1)

Country Link
JP (1) JPS6457759A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5932900A (en) * 1982-08-19 1984-02-22 化成オプトニクス株式会社 Radiation image conversion sheet
US5508539A (en) * 1994-04-29 1996-04-16 Motorola, Inc. Elevated-gate field effect transistor structure and fabrication method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5932900A (en) * 1982-08-19 1984-02-22 化成オプトニクス株式会社 Radiation image conversion sheet
US5508539A (en) * 1994-04-29 1996-04-16 Motorola, Inc. Elevated-gate field effect transistor structure and fabrication method
US5631175A (en) * 1994-04-29 1997-05-20 Motorola, Inc. Method for fabricating an elevated-gate field effect transistor

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