KR940008674U - 반도체 메모리의 번 인 테스트(Burn-In Test) 장치 - Google Patents

반도체 메모리의 번 인 테스트(Burn-In Test) 장치

Info

Publication number
KR940008674U
KR940008674U KR2019920018222U KR920018222U KR940008674U KR 940008674 U KR940008674 U KR 940008674U KR 2019920018222 U KR2019920018222 U KR 2019920018222U KR 920018222 U KR920018222 U KR 920018222U KR 940008674 U KR940008674 U KR 940008674U
Authority
KR
South Korea
Prior art keywords
burn
semiconductor memory
test device
test
semiconductor
Prior art date
Application number
KR2019920018222U
Other languages
English (en)
Other versions
KR960005387Y1 (ko
Inventor
최영근
Original Assignee
금성일렉트론 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 금성일렉트론 주식회사 filed Critical 금성일렉트론 주식회사
Priority to KR92018222U priority Critical patent/KR960005387Y1/ko
Priority to US08/125,574 priority patent/US5452253A/en
Priority to DE4332618A priority patent/DE4332618B4/de
Priority to JP23758693A priority patent/JP3397850B2/ja
Publication of KR940008674U publication Critical patent/KR940008674U/ko
Application granted granted Critical
Publication of KR960005387Y1 publication Critical patent/KR960005387Y1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/46—Test trigger logic
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50—Marginal testing, e.g. race, voltage or current testing

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Dram (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
KR92018222U 1992-09-24 1992-09-24 반도체 메모리의 번 인 테스트(Burn-In Test) 장치 KR960005387Y1 (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR92018222U KR960005387Y1 (ko) 1992-09-24 1992-09-24 반도체 메모리의 번 인 테스트(Burn-In Test) 장치
US08/125,574 US5452253A (en) 1992-09-24 1993-09-23 Burn-in test circuit for semiconductor memory device
DE4332618A DE4332618B4 (de) 1992-09-24 1993-09-24 Einbrenntestschaltung für eine Halbleiterspeichervorrichtung
JP23758693A JP3397850B2 (ja) 1992-09-24 1993-09-24 半導体メモリのバーンイン・テスト回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR92018222U KR960005387Y1 (ko) 1992-09-24 1992-09-24 반도체 메모리의 번 인 테스트(Burn-In Test) 장치

Publications (2)

Publication Number Publication Date
KR940008674U true KR940008674U (ko) 1994-04-21
KR960005387Y1 KR960005387Y1 (ko) 1996-06-28

Family

ID=19340612

Family Applications (1)

Application Number Title Priority Date Filing Date
KR92018222U KR960005387Y1 (ko) 1992-09-24 1992-09-24 반도체 메모리의 번 인 테스트(Burn-In Test) 장치

Country Status (4)

Country Link
US (1) US5452253A (ko)
JP (1) JP3397850B2 (ko)
KR (1) KR960005387Y1 (ko)
DE (1) DE4332618B4 (ko)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990055280A (ko) * 1997-12-27 1999-07-15 윤종용 번-인 테스트 장치의 모니터 보드 감시장치
KR20020069860A (ko) * 2001-02-28 2002-09-05 (주)실리콘세븐 외부 전원 전압을 이용한 번인 테스트 구동 회로
KR100439101B1 (ko) * 2001-12-24 2004-07-05 주식회사 하이닉스반도체 번인 스트레스 전압 제어 장치

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JP3142435B2 (ja) * 1994-02-15 2001-03-07 株式会社東芝 半導体集積回路装置
KR0119887B1 (ko) * 1994-06-08 1997-10-30 김광호 반도체 메모리장치의 웨이퍼 번-인 테스트 회로
KR0135108B1 (ko) * 1994-12-13 1998-04-25 김광호 스트레스 테스트 회로를 포함하는 반도체 메모리 장치
DE19524874C1 (de) * 1995-07-07 1997-03-06 Siemens Ag Verfahren zum Versetzen einer integrierten Schaltung von einer ersten in eine zweite Betriebsart
KR0172399B1 (ko) * 1995-09-19 1999-03-30 김광호 과전류를 방지하기 위한 번-인 단축회로를 내장한 반도체 메모리 장치
US5745499A (en) * 1995-10-11 1998-04-28 Micron Technology, Inc. Supervoltage detection circuit having a multi-level reference voltage
KR0179551B1 (ko) * 1995-11-01 1999-04-15 김주용 고전위 발생기
KR100214466B1 (ko) * 1995-12-26 1999-08-02 구본준 반도체 메모리의 셀프 번인회로
KR0179820B1 (ko) * 1996-02-01 1999-04-15 문정환 반도체 메모리의 번인 감지 회로
US5787096A (en) * 1996-04-23 1998-07-28 Micron Technology, Inc. Circuit and method for testing an integrated circuit
KR100228766B1 (ko) * 1996-06-29 1999-11-01 김영환 내부 전위 발생장치
US5727001A (en) * 1996-08-14 1998-03-10 Micron Technology, Inc. Circuit and method for testing an integrated circuit
US5754559A (en) * 1996-08-26 1998-05-19 Micron Technology, Inc. Method and apparatus for testing integrated circuits
KR100200926B1 (ko) * 1996-08-29 1999-06-15 윤종용 내부전원전압 발생회로
KR100319164B1 (ko) * 1997-12-31 2002-04-22 박종섭 다중레벨검출에의한다중구동장치및그방법
US6119252A (en) * 1998-02-10 2000-09-12 Micron Technology Integrated circuit test mode with externally forced reference voltage
US6137301A (en) * 1998-05-11 2000-10-24 Vanguard International Semiconductor Company EPROM used as a voltage monitor for semiconductor burn-in
US5949726A (en) * 1998-07-22 1999-09-07 Vanguard International Semiconductor Corporation Bias scheme to reduce burn-in test time for semiconductor memory while preventing junction breakdown
KR100302617B1 (ko) * 1999-09-01 2001-11-01 김영환 번인 테스트 회로
US6185139B1 (en) * 2000-01-12 2001-02-06 Motorola, Inc. Circuit and method for enabling semiconductor device burn-in
US6651199B1 (en) * 2000-06-22 2003-11-18 Xilinx, Inc. In-system programmable flash memory device with trigger circuit for generating limited duration program instruction
US6650105B2 (en) 2000-08-07 2003-11-18 Vanguard International Semiconductor Corporation EPROM used as a voltage monitor for semiconductor burn-in
KR100380344B1 (ko) * 2000-08-09 2003-04-14 삼성전자주식회사 패키지 번인 테스트가 가능한 반도체 장치 및 패키지 번인테스트방법
US6529436B1 (en) * 2001-04-26 2003-03-04 Lsi Logic Corporation Supply degradation compensation for memory self time circuits
JP2004062924A (ja) * 2002-07-25 2004-02-26 Matsushita Electric Ind Co Ltd 半導体記憶装置及びその初期化方法
KR100542695B1 (ko) * 2003-11-13 2006-01-11 주식회사 하이닉스반도체 반도체 소자의 테스트 모드 회로
KR100691486B1 (ko) * 2004-07-13 2007-03-09 주식회사 하이닉스반도체 반도체메모리소자
JP2007019094A (ja) * 2005-07-05 2007-01-25 Matsushita Electric Ind Co Ltd 半導体試験装置
US7927948B2 (en) 2005-07-20 2011-04-19 Micron Technology, Inc. Devices with nanocrystals and methods of formation
US7705600B1 (en) * 2006-02-13 2010-04-27 Cypress Semiconductor Corporation Voltage stress testing of core blocks and regulator transistors
KR100761371B1 (ko) * 2006-06-29 2007-09-27 주식회사 하이닉스반도체 액티브 드라이버
KR100816729B1 (ko) * 2006-09-28 2008-03-25 주식회사 하이닉스반도체 코어전압 생성 장치 및 그를 포함하는 반도체 메모리 장치
KR100873613B1 (ko) * 2006-11-14 2008-12-12 주식회사 하이닉스반도체 반도체 메모리 장치의 전압 생성 회로 및 방법
JP2012252733A (ja) * 2011-05-31 2012-12-20 Elpida Memory Inc 半導体装置
KR101926603B1 (ko) * 2011-12-08 2018-12-10 삼성전자 주식회사 반도체 메모리 장치 및 반도체 메모리 장치의 번-인 테스트 방법
CN109147860B (zh) * 2017-06-27 2020-11-17 华邦电子股份有限公司 存储器存储装置及其测试方法

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SU1049838A1 (ru) * 1982-04-16 1983-10-23 Организация П/Я Х-5263 Устройство контрол интегральных схем
US4680762A (en) * 1985-10-17 1987-07-14 Inmos Corporation Method and apparatus for locating soft cells in a ram
JPS62170094A (ja) * 1986-01-21 1987-07-27 Mitsubishi Electric Corp 半導体記憶回路
US5051995A (en) * 1988-03-14 1991-09-24 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device having a test mode setting circuit
JPH081747B2 (ja) * 1989-05-08 1996-01-10 三菱電機株式会社 半導体記憶装置およびその動作方法
JPH07105160B2 (ja) * 1989-05-20 1995-11-13 東芝マイクロエレクトロニクス株式会社 半導体記憶装置
DD292328A5 (de) * 1990-02-26 1991-07-25 Fz Mikroelektronik Dresden,De Verfahren und schaltungsanordnung fuer den selbsttest dynamischer halbleiterspeicher mit wahlfreiem zugriff
US5063304A (en) * 1990-04-27 1991-11-05 Texas Instruments Incorporated Integrated circuit with improved on-chip power supply control
KR930008886B1 (ko) * 1991-08-19 1993-09-16 삼성전자 주식회사 전기적으로 프로그램 할 수 있는 내부전원 발생회로
KR940008286B1 (ko) * 1991-08-19 1994-09-09 삼성전자 주식회사 내부전원발생회로

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR19990055280A (ko) * 1997-12-27 1999-07-15 윤종용 번-인 테스트 장치의 모니터 보드 감시장치
KR20020069860A (ko) * 2001-02-28 2002-09-05 (주)실리콘세븐 외부 전원 전압을 이용한 번인 테스트 구동 회로
KR100439101B1 (ko) * 2001-12-24 2004-07-05 주식회사 하이닉스반도체 번인 스트레스 전압 제어 장치

Also Published As

Publication number Publication date
DE4332618A1 (de) 1994-03-31
DE4332618B4 (de) 2004-09-16
KR960005387Y1 (ko) 1996-06-28
US5452253A (en) 1995-09-19
JP3397850B2 (ja) 2003-04-21
JPH06213977A (ja) 1994-08-05

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