KR920009078A - 이중전압원 인터페이스회로 - Google Patents

이중전압원 인터페이스회로 Download PDF

Info

Publication number
KR920009078A
KR920009078A KR1019900016388A KR900016388A KR920009078A KR 920009078 A KR920009078 A KR 920009078A KR 1019900016388 A KR1019900016388 A KR 1019900016388A KR 900016388 A KR900016388 A KR 900016388A KR 920009078 A KR920009078 A KR 920009078A
Authority
KR
South Korea
Prior art keywords
voltage source
interface circuit
source interface
dual voltage
inverter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
KR1019900016388A
Other languages
English (en)
Korean (ko)
Inventor
한교진
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019900016388A priority Critical patent/KR920009078A/ko
Priority to JP2401074A priority patent/JPH04150411A/ja
Priority to GB9027194A priority patent/GB2248988A/en
Priority to DE4040046A priority patent/DE4040046C1/de
Priority to IT02239290A priority patent/IT1244339B/it
Priority to FR9100305A priority patent/FR2668001A1/fr
Priority to NL9100046A priority patent/NL9100046A/nl
Priority to CN91100202A priority patent/CN1060724A/zh
Publication of KR920009078A publication Critical patent/KR920009078A/ko
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0013—Arrangements for reducing power consumption in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018507—Interface arrangements
    • H03K19/018521—Interface arrangements of complementary type, e.g. CMOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
KR1019900016388A 1990-10-15 1990-10-15 이중전압원 인터페이스회로 Abandoned KR920009078A (ko)

Priority Applications (8)

Application Number Priority Date Filing Date Title
KR1019900016388A KR920009078A (ko) 1990-10-15 1990-10-15 이중전압원 인터페이스회로
JP2401074A JPH04150411A (ja) 1990-10-15 1990-12-10 二重電圧源インタフェース回路
GB9027194A GB2248988A (en) 1990-10-15 1990-12-14 Interface circuits
DE4040046A DE4040046C1 (enrdf_load_stackoverflow) 1990-10-15 1990-12-14
IT02239290A IT1244339B (it) 1990-10-15 1990-12-14 Circuito interfaccia a doppia sorgente di tensione
FR9100305A FR2668001A1 (fr) 1990-10-15 1991-01-11 Circuit d'interface pour source de tension double.
NL9100046A NL9100046A (nl) 1990-10-15 1991-01-11 Interfaceschakeling met dubbele bronspanning.
CN91100202A CN1060724A (zh) 1990-10-15 1991-01-12 双重电压源的接口电路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900016388A KR920009078A (ko) 1990-10-15 1990-10-15 이중전압원 인터페이스회로

Publications (1)

Publication Number Publication Date
KR920009078A true KR920009078A (ko) 1992-05-28

Family

ID=19304696

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900016388A Abandoned KR920009078A (ko) 1990-10-15 1990-10-15 이중전압원 인터페이스회로

Country Status (8)

Country Link
JP (1) JPH04150411A (enrdf_load_stackoverflow)
KR (1) KR920009078A (enrdf_load_stackoverflow)
CN (1) CN1060724A (enrdf_load_stackoverflow)
DE (1) DE4040046C1 (enrdf_load_stackoverflow)
FR (1) FR2668001A1 (enrdf_load_stackoverflow)
GB (1) GB2248988A (enrdf_load_stackoverflow)
IT (1) IT1244339B (enrdf_load_stackoverflow)
NL (1) NL9100046A (enrdf_load_stackoverflow)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5432467A (en) * 1993-05-07 1995-07-11 Altera Corporation Programmable logic device with low power voltage level translator
US5508653A (en) * 1993-09-29 1996-04-16 Acc Microelectronics Corporation Multi-voltage circuit arrangement and method for accommodating hybrid electronic system requirements
JP3204848B2 (ja) * 1994-08-09 2001-09-04 株式会社東芝 レベル変換回路及びこのレベル変換回路を用いてレベル変換されたデータを出力する方法
KR100223744B1 (ko) * 1995-12-29 1999-10-15 김영환 혼합 전압 입력 버퍼
JP3258229B2 (ja) * 1996-03-18 2002-02-18 株式会社東芝 レベル変換回路及び半導体集積回路
DE19844674A1 (de) * 1998-09-29 1999-12-16 Siemens Ag Logikpegelkonverter
AU6108900A (en) * 1999-07-19 2001-02-05 University Of Southern California High-performance clock-powered logic
US7005893B1 (en) 1999-07-19 2006-02-28 University Of Southern California High-performance clock-powered logic
JP3701942B2 (ja) 2003-01-21 2005-10-05 沖電気工業株式会社 レベル変換回路
JP4667190B2 (ja) * 2005-09-29 2011-04-06 パナソニック株式会社 レベル変換回路
JP4702261B2 (ja) * 2005-11-24 2011-06-15 富士電機システムズ株式会社 レベルシフト回路
JP2017168965A (ja) * 2016-03-15 2017-09-21 力晶科技股▲ふん▼有限公司 レベルシフト回路

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5087746A (enrdf_load_stackoverflow) * 1973-12-07 1975-07-15
US4039862A (en) * 1976-01-19 1977-08-02 Rca Corporation Level shift circuit
JPS5775027A (en) * 1980-10-29 1982-05-11 Nec Corp Level shift circuit
CA1175503A (en) * 1981-07-17 1984-10-02 Andreas Demetriou Cmos turn-on circuit
US4644185A (en) * 1985-05-03 1987-02-17 National Semiconductor Corporation Self clocking CMOS latch
JPS6269719A (ja) * 1985-09-24 1987-03-31 Toshiba Corp レベル変換論理回路
US4695744A (en) * 1985-12-16 1987-09-22 Rca Corporation Level shift circuit including source follower output
US4897567A (en) * 1988-10-13 1990-01-30 Harris Corporation Fast level translator circuit
US4978870A (en) * 1989-07-19 1990-12-18 Industrial Technology Research Institute CMOS digital level shifter circuit

Also Published As

Publication number Publication date
GB9027194D0 (en) 1991-02-06
IT9022392A1 (it) 1992-06-14
IT9022392A0 (it) 1990-12-14
JPH04150411A (ja) 1992-05-22
NL9100046A (nl) 1992-05-06
FR2668001A1 (fr) 1992-04-17
DE4040046C1 (enrdf_load_stackoverflow) 1992-04-02
CN1060724A (zh) 1992-04-29
GB2248988A (en) 1992-04-22
IT1244339B (it) 1994-07-08

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Legal Events

Date Code Title Description
A201 Request for examination
PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 19901015

PA0201 Request for examination

Patent event code: PA02012R01D

Patent event date: 19901015

Comment text: Request for Examination of Application

PG1501 Laying open of application
PC1902 Submission of document of abandonment before decision of registration
SUBM Surrender of laid-open application requested