KR920001620A - 반도체장치 및 그의 제조방법 - Google Patents

반도체장치 및 그의 제조방법 Download PDF

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KR920001620A
KR920001620A KR1019910005741A KR910005741A KR920001620A KR 920001620 A KR920001620 A KR 920001620A KR 1019910005741 A KR1019910005741 A KR 1019910005741A KR 910005741 A KR910005741 A KR 910005741A KR 920001620 A KR920001620 A KR 920001620A
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semiconductor device
manufacturing
plasma
chemical vapor
insulating film
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KR1019910005741A
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KR940008373B1 (ko
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시게루 하라다
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시기 모리야
미쓰비시 뎅끼 가부시끼가이샤
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Abstract

내용 없음

Description

반도체장치 및 그의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 이 발명의 1실시예에 관한 반도체장치의 단면도,
제2A~제2F도는 제1도에 표시하는 반도체장치의 제조공정의 단면도,
제3도는 보호절연막의 퇴적에 사용되는 화학기상 성장장치의 개략도.

Claims (2)

  1. 소자가 수분·응력등의 외부환경에 의해 변화를 일으키지 않도록 하기 위해 소자표면부에 보호절연막이 피복되어 되는 반도체장치에 있어, 상기 소자가 형성된 반도체 기판과, 당해 반도체장치의 최상층부에 설치되어 상기 소자와 전기접속되는 배선패턴과, 상기 배선패턴을 피복하도록 상기 반도체 기판상에 퇴적된 실리콘산 질화막을 비치하고, 상기 실리콘산 질화막은, 유기실란과 질화성 가스를 포함하는 가스를 사용하여 플라즈마를 이용한 화학기상 성장법으로 퇴적되어 있는 반도체장치.
  2. 소자가 수분·응력등의 외부환경에 의해 변화를 일으키지 않도록 하기 위해 소자표면부에 보호절연막이 피복되어 있는 반도체장치의 제조방법에 있어서, 상기보호절연막을 유기실란과 질화성 가스를 포함하는 혼합가스를 사용하여 플라즈마를 이용한 화학기상 성장법 혼합가스를 사용하여 플라즈마를 이용한 화학기상 성장법으로 퇴적하는 것을 특징으로 하는 반도체장치의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019910005741A 1990-06-05 1991-04-10 반도체 장치의 제조방법 KR940008373B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP90-148185 1990-06-05
JP2-148185 1990-06-05
JP2148185A JP2814009B2 (ja) 1990-06-05 1990-06-05 半導体装置の製造方法

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KR920001620A true KR920001620A (ko) 1992-01-30
KR940008373B1 KR940008373B1 (ko) 1994-09-12

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JP (1) JP2814009B2 (ko)
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DE (1) DE4118165C2 (ko)

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US5356722A (en) * 1992-06-10 1994-10-18 Applied Materials, Inc. Method for depositing ozone/TEOS silicon oxide films of reduced surface sensitivity
US5825078A (en) * 1992-09-23 1998-10-20 Dow Corning Corporation Hermetic protection for integrated circuits
US5438022A (en) 1993-12-14 1995-08-01 At&T Global Information Solutions Company Method for using low dielectric constant material in integrated circuit fabrication
DE69435294D1 (de) * 1994-11-07 2010-07-01 Macronix Int Co Ltd Passivierungsverfahren für eine integrierte schaltung
EP0720223B1 (en) * 1994-12-30 2003-03-26 STMicroelectronics S.r.l. Process for the production of a semiconductor device having better interface adhesion between dielectric layers
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US5260600A (en) 1993-11-09
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