JPS6419760A - Semiconductor integrated circuit device - Google Patents
Semiconductor integrated circuit deviceInfo
- Publication number
- JPS6419760A JPS6419760A JP62174819A JP17481987A JPS6419760A JP S6419760 A JPS6419760 A JP S6419760A JP 62174819 A JP62174819 A JP 62174819A JP 17481987 A JP17481987 A JP 17481987A JP S6419760 A JPS6419760 A JP S6419760A
- Authority
- JP
- Japan
- Prior art keywords
- film
- photodetector
- silicon oxide
- integrated circuit
- semiconductor integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE:To improve the sensitivity of a photodetector without reducing the reliability of a whole device by a method wherein, after an insulating film containing a silicon oxide as its component adheres on a semiconductor integrated circuit comprising the photodetector, a two-layer film consisting of a silicon oxynitride film and a silicon oxide film is deposited. CONSTITUTION:An insulating film (Si oxide film) 5 containing a silicon oxide as its main component adheres to a semiconductor integrated circuit, wherein part of an element is a photodetector, and thereafter, an Al wiring 6 is formed. This n-type Si substrate 1 is installed on a stage, whereon the temperature between parallel plate electrodes is 350 deg.C, in a chamber and a silicon oxynitride film (CVD oxynitride film) 7 and a silicon oxide film (CVD oxide film) 8 are deposited by a plasma CVD method while the pressure in the chamber is kept at a pressure of 1 Torr. After the two-layer film adheres, a processing which is performed by a normal photolithography technique and the formation of a light-shielding film 9 are executed. By depositing the two-layer film in such a way, the interfacial reflection of light is inhibited without reducing the reliability of a whole device. Thereby, the sensitivity of the photodetector can be improved.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62174819A JPS6419760A (en) | 1987-07-15 | 1987-07-15 | Semiconductor integrated circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62174819A JPS6419760A (en) | 1987-07-15 | 1987-07-15 | Semiconductor integrated circuit device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6419760A true JPS6419760A (en) | 1989-01-23 |
Family
ID=15985218
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62174819A Pending JPS6419760A (en) | 1987-07-15 | 1987-07-15 | Semiconductor integrated circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6419760A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0456273A (en) * | 1990-06-25 | 1992-02-24 | Matsushita Electron Corp | Solid-state image pickup device |
| US5600165A (en) * | 1994-07-27 | 1997-02-04 | Sony Corporation | Semiconductor device with antireflection film |
| WO1999013505A1 (en) * | 1997-09-05 | 1999-03-18 | Advanced Micro Devices, Inc. | In-situ deposition of stop layer and dielectric layer during formation of local interconnects |
| WO2000031790A1 (en) * | 1998-11-25 | 2000-06-02 | Advanced Micro Devices, Inc. | Process for forming a sion/teos interlevel dielectric with after-treatment of the cvd silicum oxynitride layer |
| US6372668B2 (en) | 2000-01-18 | 2002-04-16 | Advanced Micro Devices, Inc. | Method of forming silicon oxynitride films |
| JP2010539727A (en) * | 2008-04-17 | 2010-12-16 | エルジー エレクトロニクス インコーポレイティド | Solar cell and manufacturing method thereof |
-
1987
- 1987-07-15 JP JP62174819A patent/JPS6419760A/en active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0456273A (en) * | 1990-06-25 | 1992-02-24 | Matsushita Electron Corp | Solid-state image pickup device |
| US5600165A (en) * | 1994-07-27 | 1997-02-04 | Sony Corporation | Semiconductor device with antireflection film |
| WO1999013505A1 (en) * | 1997-09-05 | 1999-03-18 | Advanced Micro Devices, Inc. | In-situ deposition of stop layer and dielectric layer during formation of local interconnects |
| US6060404A (en) * | 1997-09-05 | 2000-05-09 | Advanced Micro Devices, Inc. | In-situ deposition of stop layer and dielectric layer during formation of local interconnects |
| WO2000031790A1 (en) * | 1998-11-25 | 2000-06-02 | Advanced Micro Devices, Inc. | Process for forming a sion/teos interlevel dielectric with after-treatment of the cvd silicum oxynitride layer |
| US6124217A (en) * | 1998-11-25 | 2000-09-26 | Advanced Micro Devices, Inc. | In-situ SiON deposition/bake/TEOS deposition process for reduction of defects in interlevel dielectric for integrated circuit interconnects |
| US6372668B2 (en) | 2000-01-18 | 2002-04-16 | Advanced Micro Devices, Inc. | Method of forming silicon oxynitride films |
| JP2010539727A (en) * | 2008-04-17 | 2010-12-16 | エルジー エレクトロニクス インコーポレイティド | Solar cell and manufacturing method thereof |
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