JPS57199224A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS57199224A
JPS57199224A JP56084758A JP8475881A JPS57199224A JP S57199224 A JPS57199224 A JP S57199224A JP 56084758 A JP56084758 A JP 56084758A JP 8475881 A JP8475881 A JP 8475881A JP S57199224 A JPS57199224 A JP S57199224A
Authority
JP
Japan
Prior art keywords
layer
silicon nitride
glass layer
melting point
low melting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56084758A
Other languages
Japanese (ja)
Other versions
JPS6356704B2 (en
Inventor
Tsuneaki Isozaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56084758A priority Critical patent/JPS57199224A/en
Publication of JPS57199224A publication Critical patent/JPS57199224A/en
Publication of JPS6356704B2 publication Critical patent/JPS6356704B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate

Abstract

PURPOSE:To prevent a silicon nitride layer from cracking and improve moisture resistant property and reliability by providing an insulation material layer which becomes soft at low temperature under the silicon nitride layer for surface protection. CONSTITUTION:A diffusion layer 2 is formed on the surface of a semiconductor substrate 1 and the contact between an aluminum wiring 4 and the diffusion layer 2 is got through a hole drilled in a silicon dioxide layer 3. Then a phosphorus silica to glass layer 5 is formed on the sluminum wiring 4 on the silicon dioxide layer 3 as a protection film against moisture or impurity which penetrate from the outside. Then a PbO-B2O3-SiO2 syste low melting point glass layer 7 is formed on the phosphorus glass layer 5. Then a silicon nitride layer 6 is formed on the low melting point glass layer 7.
JP56084758A 1981-06-02 1981-06-02 Semiconductor device Granted JPS57199224A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56084758A JPS57199224A (en) 1981-06-02 1981-06-02 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56084758A JPS57199224A (en) 1981-06-02 1981-06-02 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS57199224A true JPS57199224A (en) 1982-12-07
JPS6356704B2 JPS6356704B2 (en) 1988-11-09

Family

ID=13839577

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56084758A Granted JPS57199224A (en) 1981-06-02 1981-06-02 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS57199224A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2625839A1 (en) * 1988-01-13 1989-07-13 Sgs Thomson Microelectronics METHOD OF PASSIVATING AN INTEGRATED CIRCUIT
EP1237182A3 (en) * 2001-02-19 2002-10-02 Applied Materials, Inc. Aggregate dielectric layer to reduce nitride consumption
JP2006043813A (en) * 2004-08-04 2006-02-16 Denso Corp Micro-system structure with protective film and manufacturing method thereof

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5390869A (en) * 1977-01-21 1978-08-10 Hitachi Ltd Manufacture of semiconductor device
JPS5632732A (en) * 1979-08-27 1981-04-02 Mitsubishi Electric Corp Semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5390869A (en) * 1977-01-21 1978-08-10 Hitachi Ltd Manufacture of semiconductor device
JPS5632732A (en) * 1979-08-27 1981-04-02 Mitsubishi Electric Corp Semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2625839A1 (en) * 1988-01-13 1989-07-13 Sgs Thomson Microelectronics METHOD OF PASSIVATING AN INTEGRATED CIRCUIT
EP1237182A3 (en) * 2001-02-19 2002-10-02 Applied Materials, Inc. Aggregate dielectric layer to reduce nitride consumption
US6514882B2 (en) 2001-02-19 2003-02-04 Applied Materials, Inc. Aggregate dielectric layer to reduce nitride consumption
SG97230A1 (en) * 2001-02-19 2003-07-18 Applied Materials Inc Aggregate dielectric layer to reduce nitride consumption
JP2006043813A (en) * 2004-08-04 2006-02-16 Denso Corp Micro-system structure with protective film and manufacturing method thereof

Also Published As

Publication number Publication date
JPS6356704B2 (en) 1988-11-09

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