JPS55138859A - Multilayer wiring type semiconductor device - Google Patents
Multilayer wiring type semiconductor deviceInfo
- Publication number
- JPS55138859A JPS55138859A JP4616779A JP4616779A JPS55138859A JP S55138859 A JPS55138859 A JP S55138859A JP 4616779 A JP4616779 A JP 4616779A JP 4616779 A JP4616779 A JP 4616779A JP S55138859 A JPS55138859 A JP S55138859A
- Authority
- JP
- Japan
- Prior art keywords
- film
- wiring
- semiconductor device
- type semiconductor
- insulating film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
Abstract
PURPOSE:To reduce the alkaline metallic ion contamination of the boundary between layers in a multilayer wiring type semiconductor device by forming a silicon nitride film between a wiring layer insulating film and lower layer wiring. CONSTITUTION:A main surface insulating film 2 is coated on a silicon substrate 1, and an impurity diffused element region 3 is formed in the substrate 1. An aluminum wire 4 is made contact with the region 3 and extended onto the film 2, and porous Al2O3 5 is formed to insulate between aluminum wires. A silicon nitride film 6 is formed on the upper surface of the aluminum film wiring region, and an SiO2 film 7 is formed as an insulating film between the wiring layers.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4616779A JPS55138859A (en) | 1979-04-16 | 1979-04-16 | Multilayer wiring type semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4616779A JPS55138859A (en) | 1979-04-16 | 1979-04-16 | Multilayer wiring type semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55138859A true JPS55138859A (en) | 1980-10-30 |
Family
ID=12739451
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4616779A Pending JPS55138859A (en) | 1979-04-16 | 1979-04-16 | Multilayer wiring type semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55138859A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3228399A1 (en) * | 1982-07-29 | 1984-02-02 | Siemens AG, 1000 Berlin und 8000 München | METHOD FOR PRODUCING A MONOLITHICALLY INTEGRATED CIRCUIT |
JPS59218751A (en) * | 1983-05-27 | 1984-12-10 | Nec Corp | Semiconductor device |
US4561009A (en) * | 1979-07-11 | 1985-12-24 | Tokyo Shibaura Denki Kabushiki Kaisha | Semiconductor device |
JPS62114231A (en) * | 1985-11-14 | 1987-05-26 | Fujitsu Ltd | Semiconductor device |
US5371047A (en) * | 1992-10-30 | 1994-12-06 | International Business Machines Corporation | Chip interconnection having a breathable etch stop layer |
-
1979
- 1979-04-16 JP JP4616779A patent/JPS55138859A/en active Pending
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4561009A (en) * | 1979-07-11 | 1985-12-24 | Tokyo Shibaura Denki Kabushiki Kaisha | Semiconductor device |
DE3228399A1 (en) * | 1982-07-29 | 1984-02-02 | Siemens AG, 1000 Berlin und 8000 München | METHOD FOR PRODUCING A MONOLITHICALLY INTEGRATED CIRCUIT |
JPS59218751A (en) * | 1983-05-27 | 1984-12-10 | Nec Corp | Semiconductor device |
JPS62114231A (en) * | 1985-11-14 | 1987-05-26 | Fujitsu Ltd | Semiconductor device |
JPH0738443B2 (en) * | 1985-11-14 | 1995-04-26 | 富士通株式会社 | Semiconductor device |
US5371047A (en) * | 1992-10-30 | 1994-12-06 | International Business Machines Corporation | Chip interconnection having a breathable etch stop layer |
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