JPS5632732A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5632732A
JPS5632732A JP10949679A JP10949679A JPS5632732A JP S5632732 A JPS5632732 A JP S5632732A JP 10949679 A JP10949679 A JP 10949679A JP 10949679 A JP10949679 A JP 10949679A JP S5632732 A JPS5632732 A JP S5632732A
Authority
JP
Japan
Prior art keywords
film
sio2
films
cracks
thermal expansion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10949679A
Other languages
Japanese (ja)
Other versions
JPS6232615B2 (en
Inventor
Hiroshi Sugano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP10949679A priority Critical patent/JPS5632732A/en
Publication of JPS5632732A publication Critical patent/JPS5632732A/en
Publication of JPS6232615B2 publication Critical patent/JPS6232615B2/ja
Granted legal-status Critical Current

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40—Oxides
    • C23C16/401—Oxides containing silicon
    • C23C16/402—Silicon dioxide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers

Landscapes

  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Organic Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • General Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To prevent the cracks that would be caused by the difference in the thermal expansion coefficients, by covering the top and the bottom of an Si3N4 film by a relatively soft insulating film such as an Si oxide film containing phosphorus, an Si oxide film containing excessive Si, or the like. CONSTITUTION:The first wiring layer 3 is provided on an SiO2 film 2 on an Si substrate 1; an SiO2 film 4 containing phosphorus, an Si3N4 film 5, an SiO2 film 6 are layered thereon; thereby an interlayer insulating film 7 is formed. The second wiring layer 8 is provided thereon, and the surface is covered by a surface protecting film 9. Since phosphorus is doped on the SiO2 films 4 and 6, the films have a buffering property against the thermal expansion coefficient, and the effect for preventing the cracks is enhanced. The films 4 and 6 may be an SiO2 film, which is prepared by reacting CO2 and monosilane under the reduced pressure, and contains excessive Si.
JP10949679A 1979-08-27 1979-08-27 Semiconductor device Granted JPS5632732A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10949679A JPS5632732A (en) 1979-08-27 1979-08-27 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10949679A JPS5632732A (en) 1979-08-27 1979-08-27 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS5632732A true JPS5632732A (en) 1981-04-02
JPS6232615B2 JPS6232615B2 (en) 1987-07-15

Family

ID=14511721

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10949679A Granted JPS5632732A (en) 1979-08-27 1979-08-27 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5632732A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57199224A (en) * 1981-06-02 1982-12-07 Nec Corp Semiconductor device
JPS58131733A (en) * 1982-01-29 1983-08-05 Toshiba Corp Semiconductor device
JPS62239551A (en) * 1986-04-10 1987-10-20 Nec Corp Semiconductor device
US5372974A (en) * 1993-03-19 1994-12-13 Micron Semiconductor, Inc. Approach to avoid buckling in BPSG by using an intermediate barrier layer
US5559052A (en) * 1994-12-29 1996-09-24 Lucent Technologies Inc. Integrated circuit fabrication with interlevel dielectric
US6690044B1 (en) 1993-03-19 2004-02-10 Micron Technology, Inc. Approach to avoid buckling BPSG by using an intermediate barrier layer

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5240977A (en) * 1975-09-26 1977-03-30 Matsushita Electric Ind Co Ltd Process for production of semiconductor device
JPS5342391A (en) * 1976-09-30 1978-04-17 Standex Int Corp Block for bundled assembly

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5240977A (en) * 1975-09-26 1977-03-30 Matsushita Electric Ind Co Ltd Process for production of semiconductor device
JPS5342391A (en) * 1976-09-30 1978-04-17 Standex Int Corp Block for bundled assembly

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57199224A (en) * 1981-06-02 1982-12-07 Nec Corp Semiconductor device
JPS6356704B2 (en) * 1981-06-02 1988-11-09 Nippon Electric Co
JPS58131733A (en) * 1982-01-29 1983-08-05 Toshiba Corp Semiconductor device
JPS62239551A (en) * 1986-04-10 1987-10-20 Nec Corp Semiconductor device
US5372974A (en) * 1993-03-19 1994-12-13 Micron Semiconductor, Inc. Approach to avoid buckling in BPSG by using an intermediate barrier layer
US6690044B1 (en) 1993-03-19 2004-02-10 Micron Technology, Inc. Approach to avoid buckling BPSG by using an intermediate barrier layer
US7485961B2 (en) 1993-03-19 2009-02-03 Micron Technology, Inc. Approach to avoid buckling in BPSG by using an intermediate barrier layer
US5559052A (en) * 1994-12-29 1996-09-24 Lucent Technologies Inc. Integrated circuit fabrication with interlevel dielectric

Also Published As

Publication number Publication date
JPS6232615B2 (en) 1987-07-15

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