IT1088852B - Struttura passivante per un dispositivo simeconduttore - Google Patents

Struttura passivante per un dispositivo simeconduttore

Info

Publication number
IT1088852B
IT1088852B IT28304/77A IT2830477A IT1088852B IT 1088852 B IT1088852 B IT 1088852B IT 28304/77 A IT28304/77 A IT 28304/77A IT 2830477 A IT2830477 A IT 2830477A IT 1088852 B IT1088852 B IT 1088852B
Authority
IT
Italy
Prior art keywords
simeconductor
passivating structure
passivating
simeconductor device
Prior art date
Application number
IT28304/77A
Other languages
English (en)
Original Assignee
Rca Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US05/737,850 external-priority patent/US4097889A/en
Priority claimed from US05/737,849 external-priority patent/US4091407A/en
Application filed by Rca Corp filed Critical Rca Corp
Application granted granted Critical
Publication of IT1088852B publication Critical patent/IT1088852B/it

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157Partial encapsulation or coating
    • H01L23/3171Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291Oxides or nitrides or carbides, e.g. ceramics, glass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53242Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being a noble metal, e.g. gold
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides
    • H01L23/53242Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being a noble metal, e.g. gold
    • H01L23/53252Additional layers associated with noble-metal layers, e.g. adhesion, barrier, cladding layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
IT28304/77A 1976-11-01 1977-10-05 Struttura passivante per un dispositivo simeconduttore IT1088852B (it)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US05/737,850 US4097889A (en) 1976-11-01 1976-11-01 Combination glass/low temperature deposited Siw Nx Hy O.sub.z
US05/737,849 US4091407A (en) 1976-11-01 1976-11-01 Combination glass/low temperature deposited Siw Nx Hy O.sub.z

Publications (1)

Publication Number Publication Date
IT1088852B true IT1088852B (it) 1985-06-10

Family

ID=27113266

Family Applications (1)

Application Number Title Priority Date Filing Date
IT28304/77A IT1088852B (it) 1976-11-01 1977-10-05 Struttura passivante per un dispositivo simeconduttore

Country Status (3)

Country Link
JP (1) JPS5356973A (it)
DE (1) DE2747474A1 (it)
IT (1) IT1088852B (it)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4273805A (en) * 1978-06-19 1981-06-16 Rca Corporation Passivating composite for a semiconductor device comprising a silicon nitride (Si1 3N4) layer and phosphosilicate glass (PSG) layer
USRE32351E (en) * 1978-06-19 1987-02-17 Rca Corporation Method of manufacturing a passivating composite comprising a silicon nitride (SI1 3N4) layer and a phosphosilicate glass (PSG) layer for a semiconductor device layer
JPS5642377A (en) * 1979-09-14 1981-04-20 Fujitsu Ltd Ultraviolet ray erasable type rewritable read-only memory
US4543271A (en) * 1984-07-02 1985-09-24 Hughes Aircraft Company Silicon oxynitride material and photochemical process for forming same
JPH02221643A (ja) * 1989-02-21 1990-09-04 Toyo Umpanki Co Ltd 荷役車両
JP2814009B2 (ja) * 1990-06-05 1998-10-22 三菱電機株式会社 半導体装置の製造方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5342391B2 (it) * 1973-05-10 1978-11-10
JPS5161781A (ja) * 1974-11-27 1976-05-28 Hitachi Ltd Taishitsuseiokojoshitahandotaisochi

Also Published As

Publication number Publication date
JPS5356973A (en) 1978-05-23
JPS5636575B2 (it) 1981-08-25
DE2747474A1 (de) 1978-05-03

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